From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
frieder.schrempf@kontron.de, tharvey@gateworks.com,
Fabio Estevam <festevam@gmail.com>
Subject: [PATCH 1/2] arm64: dts: imx8mm-kontron-n801x-som: Fix the SPI chipselect polarity
Date: Fri, 16 Jul 2021 10:28:44 -0300 [thread overview]
Message-ID: <20210716132845.3371666-1-festevam@gmail.com> (raw)
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
index d0456daefda8..5a2805c51361 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -63,7 +63,7 @@ opp-750M {
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
- cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
status = "okay";
spi-flash@0 {
--
2.25.1
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next reply other threads:[~2021-07-16 13:31 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 13:28 Fabio Estevam [this message]
2021-07-16 13:28 ` [PATCH 2/2] arm64: dts: imx8mm-venice: Fix the SPI chipselect polarity Fabio Estevam
2021-07-16 14:51 ` Tim Harvey
2021-07-19 10:55 ` [PATCH 1/2] arm64: dts: imx8mm-kontron-n801x-som: " Frieder Schrempf
2021-08-14 13:25 ` Fabio Estevam
2021-09-22 1:22 ` Shawn Guo
2021-09-22 2:58 ` Shawn Guo
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