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From: Lee Shawn C <shawn.c.lee@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Cooper Chiou <cooper.chiou@intel.com>,
	William Tseng <william.tseng@intel.com>
Subject: [Intel-gfx] [PATCH 4/5] drm/i915/dsi: refine send MIPI DCS command sequence
Date: Mon, 19 Jul 2021 15:22:21 +0800	[thread overview]
Message-ID: <20210719072222.13369-5-shawn.c.lee@intel.com> (raw)
In-Reply-To: <20210719072222.13369-1-shawn.c.lee@intel.com>

According to chapter "Sending Commands to the Panel" in bspec #29738
and #49188. If driver try to send DCS long pakcet, we have to program
TX payload register at first. And configure TX header HW register later.
DSC long packet would not be sent properly if we don't follow this
sequence.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: William Tseng <william.tseng@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 1780830d9909..60413bbf565f 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1807,11 +1807,6 @@ static ssize_t gen11_dsi_host_transfer(struct mipi_dsi_host *host,
 	if (msg->flags & MIPI_DSI_MSG_USE_LPM)
 		enable_lpdt = true;
 
-	/* send packet header */
-	ret  = dsi_send_pkt_hdr(intel_dsi_host, dsi_pkt, enable_lpdt);
-	if (ret < 0)
-		return ret;
-
 	/* only long packet contains payload */
 	if (mipi_dsi_packet_format_is_long(msg->type)) {
 		ret = dsi_send_pkt_payld(intel_dsi_host, dsi_pkt);
@@ -1819,6 +1814,11 @@ static ssize_t gen11_dsi_host_transfer(struct mipi_dsi_host *host,
 			return ret;
 	}
 
+	/* send packet header */
+	ret  = dsi_send_pkt_hdr(intel_dsi_host, dsi_pkt, enable_lpdt);
+	if (ret < 0)
+		return ret;
+
 	//TODO: add payload receive code if needed
 
 	ret = sizeof(dsi_pkt.header) + dsi_pkt.payload_length;
-- 
2.17.1

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  parent reply	other threads:[~2021-07-19  7:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-19  7:22 [Intel-gfx] [PATCH 0/5] MIPI DSI driver enhancements Lee Shawn C
2021-07-19  7:22 ` [Intel-gfx] [PATCH 1/5] drm/i915/dsi: send correct gpio_number on gen11 platform Lee Shawn C
2021-07-19  7:22 ` [Intel-gfx] [PATCH 2/5] drm/i915/jsl: program DSI panel GPIOs Lee Shawn C
2021-07-19  7:22 ` [Intel-gfx] [PATCH 3/5] drm/i915/dsi: wait for header and payload credit available Lee Shawn C
2021-07-19  7:22 ` Lee Shawn C [this message]
2021-07-19  7:22 ` [Intel-gfx] [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC enabled Lee Shawn C
2021-07-20 12:46   ` Kulkarni, Vandita
2021-07-20 14:30     ` Lee, Shawn C
2021-07-22  7:17       ` Kulkarni, Vandita
2021-07-19  7:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for MIPI DSI driver enhancements Patchwork
2021-07-19  7:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-07-19  8:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-19 10:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-07-22  9:37 ` [Intel-gfx] [PATCH v2 0/5] " Lee Shawn C
2021-07-22  9:37   ` [Intel-gfx] [PATCH v2 1/5] drm/i915/dsi: send correct gpio_number on gen11 platform Lee Shawn C
2021-07-22  9:37   ` [Intel-gfx] [PATCH v2 2/5] drm/i915/jsl: program DSI panel GPIOs Lee Shawn C
2021-07-22  9:37   ` [Intel-gfx] [PATCH v2 3/5] drm/i915/dsi: wait for header and payload credit available Lee Shawn C
2021-07-22  9:37   ` [Intel-gfx] [PATCH v2 4/5] drm/i915/dsi: refine send MIPI DCS command sequence Lee Shawn C
2021-07-22  9:37   ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Get proper min cdclk if vDSC enabled Lee Shawn C

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