From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D819DC6377A for ; Thu, 22 Jul 2021 02:53:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BBCB760FEA for ; Thu, 22 Jul 2021 02:53:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230453AbhGVCMa (ORCPT ); Wed, 21 Jul 2021 22:12:30 -0400 Received: from mail-il1-f177.google.com ([209.85.166.177]:42698 "EHLO mail-il1-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230093AbhGVCM3 (ORCPT ); Wed, 21 Jul 2021 22:12:29 -0400 Received: by mail-il1-f177.google.com with SMTP id m20so4098685ili.9; Wed, 21 Jul 2021 19:53:04 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=82O9pxHs2phuaInzl9cox8me6UL28Nm2JehOPgfRTdU=; b=hyAfNkrA5cirR5zSaTOB5LifoeXSldbsmJqUEsAjuGF7FAZkRZv3/fpCIpuY8Ihe6+ o/FNdoxJR68UtQc6tJI9BFeF+rkLCLWH33gJ/tW1BC6bvtQ36lbz3dPLWQdzsQrPHO7Z QWGXCIecBVMf8SW87GJ2k97pskdb3yIMPKfOeoFbUV2QMZWoX0SGdbuJDyDK3I9jRqWV hku1Ri3xcBShajAHttO22v9SM/oZi/5YETIAu7GvMtbJqUbhnIexD4DJKPw3e6L8V1jY QcNnksYeiTlv4rzKDm0w620XgYtfg66H7K+hxF40DQiKpM1w+iyYregsOjYjfvygMARh FIlA== X-Gm-Message-State: AOAM53245cTA1A6r0pRYzEZirX3BQQ2fkkRn2bCdXpG7g3IEZWKDw/6W dYhtz7xvUuhxOl9x5XD06Q== X-Google-Smtp-Source: ABdhPJyn11/pSzoHtQk9aFg6OthLDc/3e1S3UHr3amy1RP5ecpQGjtAMSWqcQHWLLIfasZwcFAYIZQ== X-Received: by 2002:a92:c805:: with SMTP id v5mr24196570iln.293.1626922384270; Wed, 21 Jul 2021 19:53:04 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id i5sm14559011ilc.16.2021.07.21.19.53.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jul 2021 19:53:03 -0700 (PDT) Received: (nullmailer pid 3205958 invoked by uid 1000); Thu, 22 Jul 2021 02:53:01 -0000 Date: Wed, 21 Jul 2021 20:53:01 -0600 From: Rob Herring To: Yong Wu Cc: Krzysztof Kozlowski , Matthias Brugger , Krzysztof Kozlowski , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, anan.sun@mediatek.com, ming-fan.chen@mediatek.com, yi.kuo@mediatek.com, anthony.huang@mediatek.com Subject: Re: [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common Message-ID: <20210722025301.GA3204448@robh.at.kernel.org> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-3-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210715121209.31024-3-yong.wu@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote: > Add the binding for smi-sub-common. The SMI block diagram like this: > > IOMMU > | | > smi-common > ------------------ > | .... | > larb0 larb7 <-max is 8 > > The smi-common connects with smi-larb and IOMMU. The maximum larbs number > that connects with a smi-common is 8. If the engines number is over 8, > sometimes we use a smi-sub-common which is nearly same with smi-common. > It supports up to 8 input and 1 output(smi-common has 2 output) > > Something like: > > IOMMU > | | > smi-common > --------------------- > | | ... > larb0 sub-common ... <-max is 8 > ----------- > | | ... <-max is 8 too. > larb2 larb5 > > We don't need extra SW setting for smi-sub-common, only the sub-common has > special clocks need to enable when the engines access dram. > > If it is sub-common, it should have a "mediatek,smi" phandle to point to > its smi-common. meanwhile, the sub-common only has one gals clock. > > Signed-off-by: Yong Wu > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 602592b6c3f5..f79d99ebc440 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -38,6 +38,7 @@ properties: > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > + - mediatek,mt8195-smi-sub-common > > - description: for mt7623 > items: > @@ -67,6 +68,10 @@ properties: > minItems: 2 > maxItems: 4 > > + mediatek,smi: > + $ref: /schemas/types.yaml#/definitions/phandle-array If only a phandle, then s/phandle-array/phandle/ > + description: a phandle to the smi-common node above. Only for sub-common. > + > required: > - compatible > - reg > @@ -93,6 +98,26 @@ allOf: > - const: smi > - const: async > > + - if: # only for sub common > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-smi-sub-common > + then: > + required: > + - mediatek,smi > + properties: > + clock: > + items: > + minItems: 3 > + maxItems: 3 > + clock-names: > + items: > + - const: apb > + - const: smi > + - const: gals0 > + > - if: # for gen2 HW that have gals > properties: > compatible: > -- > 2.18.0 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07A68C6377C for ; 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Wed, 21 Jul 2021 19:53:03 -0700 (PDT) Received: (nullmailer pid 3205958 invoked by uid 1000); Thu, 22 Jul 2021 02:53:01 -0000 Date: Wed, 21 Jul 2021 20:53:01 -0600 From: Rob Herring To: Yong Wu Subject: Re: [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common Message-ID: <20210722025301.GA3204448@robh.at.kernel.org> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-3-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210715121209.31024-3-yong.wu@mediatek.com> Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, yi.kuo@mediatek.com, srv_heupstream@mediatek.com, Krzysztof Kozlowski , Will Deacon , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, Matthias Brugger , anthony.huang@mediatek.com, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Robin Murphy , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote: > Add the binding for smi-sub-common. The SMI block diagram like this: > > IOMMU > | | > smi-common > ------------------ > | .... | > larb0 larb7 <-max is 8 > > The smi-common connects with smi-larb and IOMMU. The maximum larbs number > that connects with a smi-common is 8. If the engines number is over 8, > sometimes we use a smi-sub-common which is nearly same with smi-common. > It supports up to 8 input and 1 output(smi-common has 2 output) > > Something like: > > IOMMU > | | > smi-common > --------------------- > | | ... > larb0 sub-common ... <-max is 8 > ----------- > | | ... <-max is 8 too. > larb2 larb5 > > We don't need extra SW setting for smi-sub-common, only the sub-common has > special clocks need to enable when the engines access dram. > > If it is sub-common, it should have a "mediatek,smi" phandle to point to > its smi-common. meanwhile, the sub-common only has one gals clock. > > Signed-off-by: Yong Wu > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 602592b6c3f5..f79d99ebc440 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -38,6 +38,7 @@ properties: > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > + - mediatek,mt8195-smi-sub-common > > - description: for mt7623 > items: > @@ -67,6 +68,10 @@ properties: > minItems: 2 > maxItems: 4 > > + mediatek,smi: > + $ref: /schemas/types.yaml#/definitions/phandle-array If only a phandle, then s/phandle-array/phandle/ > + description: a phandle to the smi-common node above. Only for sub-common. > + > required: > - compatible > - reg > @@ -93,6 +98,26 @@ allOf: > - const: smi > - const: async > > + - if: # only for sub common > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-smi-sub-common > + then: > + required: > + - mediatek,smi > + properties: > + clock: > + items: > + minItems: 3 > + maxItems: 3 > + clock-names: > + items: > + - const: apb > + - const: smi > + - const: gals0 > + > - if: # for gen2 HW that have gals > properties: > compatible: > -- > 2.18.0 > > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A24DC6377A for ; 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Thu, 22 Jul 2021 02:53:01 -0000 Date: Wed, 21 Jul 2021 20:53:01 -0600 From: Rob Herring To: Yong Wu Cc: Krzysztof Kozlowski , Matthias Brugger , Krzysztof Kozlowski , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, anan.sun@mediatek.com, ming-fan.chen@mediatek.com, yi.kuo@mediatek.com, anthony.huang@mediatek.com Subject: Re: [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common Message-ID: <20210722025301.GA3204448@robh.at.kernel.org> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-3-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210715121209.31024-3-yong.wu@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210721_195305_191255_3279CAD8 X-CRM114-Status: GOOD ( 23.99 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote: > Add the binding for smi-sub-common. The SMI block diagram like this: > > IOMMU > | | > smi-common > ------------------ > | .... | > larb0 larb7 <-max is 8 > > The smi-common connects with smi-larb and IOMMU. The maximum larbs number > that connects with a smi-common is 8. If the engines number is over 8, > sometimes we use a smi-sub-common which is nearly same with smi-common. > It supports up to 8 input and 1 output(smi-common has 2 output) > > Something like: > > IOMMU > | | > smi-common > --------------------- > | | ... > larb0 sub-common ... <-max is 8 > ----------- > | | ... <-max is 8 too. > larb2 larb5 > > We don't need extra SW setting for smi-sub-common, only the sub-common has > special clocks need to enable when the engines access dram. > > If it is sub-common, it should have a "mediatek,smi" phandle to point to > its smi-common. meanwhile, the sub-common only has one gals clock. > > Signed-off-by: Yong Wu > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 602592b6c3f5..f79d99ebc440 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -38,6 +38,7 @@ properties: > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > + - mediatek,mt8195-smi-sub-common > > - description: for mt7623 > items: > @@ -67,6 +68,10 @@ properties: > minItems: 2 > maxItems: 4 > > + mediatek,smi: > + $ref: /schemas/types.yaml#/definitions/phandle-array If only a phandle, then s/phandle-array/phandle/ > + description: a phandle to the smi-common node above. Only for sub-common. > + > required: > - compatible > - reg > @@ -93,6 +98,26 @@ allOf: > - const: smi > - const: async > > + - if: # only for sub common > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-smi-sub-common > + then: > + required: > + - mediatek,smi > + properties: > + clock: > + items: > + minItems: 3 > + maxItems: 3 > + clock-names: > + items: > + - const: apb > + - const: smi > + - const: gals0 > + > - if: # for gen2 HW that have gals > properties: > compatible: > -- > 2.18.0 > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17CA8C6377B for ; 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Thu, 22 Jul 2021 02:53:01 -0000 Date: Wed, 21 Jul 2021 20:53:01 -0600 From: Rob Herring To: Yong Wu Cc: Krzysztof Kozlowski , Matthias Brugger , Krzysztof Kozlowski , Joerg Roedel , Will Deacon , Robin Murphy , Tomasz Figa , linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, youlin.pei@mediatek.com, anan.sun@mediatek.com, ming-fan.chen@mediatek.com, yi.kuo@mediatek.com, anthony.huang@mediatek.com Subject: Re: [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common Message-ID: <20210722025301.GA3204448@robh.at.kernel.org> References: <20210715121209.31024-1-yong.wu@mediatek.com> <20210715121209.31024-3-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210715121209.31024-3-yong.wu@mediatek.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210721_195305_191255_3279CAD8 X-CRM114-Status: GOOD ( 23.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote: > Add the binding for smi-sub-common. The SMI block diagram like this: > > IOMMU > | | > smi-common > ------------------ > | .... | > larb0 larb7 <-max is 8 > > The smi-common connects with smi-larb and IOMMU. The maximum larbs number > that connects with a smi-common is 8. If the engines number is over 8, > sometimes we use a smi-sub-common which is nearly same with smi-common. > It supports up to 8 input and 1 output(smi-common has 2 output) > > Something like: > > IOMMU > | | > smi-common > --------------------- > | | ... > larb0 sub-common ... <-max is 8 > ----------- > | | ... <-max is 8 too. > larb2 larb5 > > We don't need extra SW setting for smi-sub-common, only the sub-common has > special clocks need to enable when the engines access dram. > > If it is sub-common, it should have a "mediatek,smi" phandle to point to > its smi-common. meanwhile, the sub-common only has one gals clock. > > Signed-off-by: Yong Wu > --- > .../mediatek,smi-common.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > index 602592b6c3f5..f79d99ebc440 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml > @@ -38,6 +38,7 @@ properties: > - mediatek,mt8192-smi-common > - mediatek,mt8195-smi-common-vdo > - mediatek,mt8195-smi-common-vpp > + - mediatek,mt8195-smi-sub-common > > - description: for mt7623 > items: > @@ -67,6 +68,10 @@ properties: > minItems: 2 > maxItems: 4 > > + mediatek,smi: > + $ref: /schemas/types.yaml#/definitions/phandle-array If only a phandle, then s/phandle-array/phandle/ > + description: a phandle to the smi-common node above. Only for sub-common. > + > required: > - compatible > - reg > @@ -93,6 +98,26 @@ allOf: > - const: smi > - const: async > > + - if: # only for sub common > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-smi-sub-common > + then: > + required: > + - mediatek,smi > + properties: > + clock: > + items: > + minItems: 3 > + maxItems: 3 > + clock-names: > + items: > + - const: apb > + - const: smi > + - const: gals0 > + > - if: # for gen2 HW that have gals > properties: > compatible: > -- > 2.18.0 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel