[PATCH v3 0/5] SDHCI clock handling fixes and cleanups

[PATCH v3 0/5] SDHCI clock handling fixes and cleanups

[Michał Mirosław]

This patch set combines a few of code improvements for SDHCI clock
handling. First three are small fixes to the code, next two make
the clock calculation code simpler.

Michał Mirosław (5):
  mmc: sdhci: fix base clock usage in preset value
  mmc: sdhci: always obey programmable clock config in preset value
  mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN
  mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit
  mmc: sdhci: simplify v2/v3+ clock calculation

 drivers/mmc/host/sdhci-of-arasan.c  |  11 +--
 drivers/mmc/host/sdhci-of-dwcmshc.c |   9 +-
 drivers/mmc/host/sdhci.c            | 123 +++++++++++++---------------
 drivers/mmc/host/sdhci.h            |   4 +-
 4 files changed, 68 insertions(+), 79 deletions(-)

-- 
2.30.2

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[PATCH v3 1/5] mmc: sdhci: fix base clock usage in preset value

[Michał Mirosław]

Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read
is overwritten for programmable clock preset, but is carried over for
divided clock preset. This can confuse sdhci_enable_clk() if the register
has enable bits set for some reason at time time of clock calculation.
Remove the read.

Quoting Al Cooper:

sdhci_brcmstb_set_clock() assumed that sdhci_calc_clk() would always
return the divider value without the enable set, so this fixes a case
for DDR52 where the enable was not being cleared when the divider
value was changed.

Cc: stable@kernel.vger.org
Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Al Cooper <alcooperx@gmail.com>

---
v3: updated commit message
v2: removed truncated sentence from commitmsg

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
 drivers/mmc/host/sdhci.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index aba6e10b8605..c7438dd13e3e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1857,7 +1857,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 		if (host->preset_enabled) {
 			u16 pre_val;
 
-			clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
 			pre_val = sdhci_get_preset_value(host);
 			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
 			if (host->clk_mul &&
-- 
2.30.2

[PATCH v3 2/5] mmc: sdhci: always obey programmable clock config in preset value

When host controller uses programmable clock presets but doesn't
advertise programmable clock support, we can only guess what frequency
it generates. Let's at least return correct SDHCI_PROG_CLOCK_MODE bit
value in this case.

Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: added a comment for this case
v2: no changes
---
 drivers/mmc/host/sdhci.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c7438dd13e3e..3ab60e7f936b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1859,11 +1859,14 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 
 			pre_val = sdhci_get_preset_value(host);
 			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
-			if (host->clk_mul &&
-				(pre_val & SDHCI_PRESET_CLKGEN_SEL)) {
+			if (pre_val & SDHCI_PRESET_CLKGEN_SEL) {
 				clk = SDHCI_PROG_CLOCK_MODE;
 				real_div = div + 1;
 				clk_mul = host->clk_mul;
+				if (!clk_mul) {
+					/* The clock frequency is unknown. Assume undivided base. */
+					clk_mul = 1;
+				}
 			} else {
 				real_div = max_t(int, 1, div << 1);
 			}
-- 
2.30.2

[PATCH v3 3/5] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN

[Michał Mirosław]

Fix returned clock rate for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN case.
This fixes real_div value that was calculated as 1 (meaning no division)
instead of 2 with the quirk enabled.

Cc: stable@kernel.vger.org
Fixes: d1955c3a9a1d ("mmc: sdhci: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: updated commit message
v2: no changes
---
 drivers/mmc/host/sdhci.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 3ab60e7f936b..0993f7d0ce8e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1903,9 +1903,12 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 
 		if (!host->clk_mul || switch_base_clk) {
 			/* Version 3.00 divisors must be a multiple of 2. */
-			if (host->max_clk <= clock)
+			if (host->max_clk <= clock) {
 				div = 1;
-			else {
+				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
+					&& host->max_clk <= 25000000)
+					div = 2;
+			} else {
 				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
 				     div += 2) {
 					if ((host->max_clk / div) <= clock)
@@ -1914,9 +1917,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 			}
 			real_div = div;
 			div >>= 1;
-			if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-				&& !div && host->max_clk <= 25000000)
-				div = 1;
 		}
 	} else {
 		/* Version 2.00 divisors must be a power of 2. */
-- 
2.30.2

[PATCH v3 3/5] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN

[Michał Mirosław]

Fix returned clock rate for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN case.
This fixes real_div value that was calculated as 1 (meaning no division)
instead of 2 with the quirk enabled.

Cc: stable@kernel.vger.org
Fixes: d1955c3a9a1d ("mmc: sdhci: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: updated commit message
v2: no changes
---
 drivers/mmc/host/sdhci.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 3ab60e7f936b..0993f7d0ce8e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1903,9 +1903,12 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 
 		if (!host->clk_mul || switch_base_clk) {
 			/* Version 3.00 divisors must be a multiple of 2. */
-			if (host->max_clk <= clock)
+			if (host->max_clk <= clock) {
 				div = 1;
-			else {
+				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
+					&& host->max_clk <= 25000000)
+					div = 2;
+			} else {
 				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
 				     div += 2) {
 					if ((host->max_clk / div) <= clock)
@@ -1914,9 +1917,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 			}
 			real_div = div;
 			div >>= 1;
-			if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-				&& !div && host->max_clk <= 25000000)
-				div = 1;
 		}
 	} else {
 		/* Version 2.00 divisors must be a power of 2. */
-- 
2.30.2


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[PATCH v3 2/5] mmc: sdhci: always obey programmable clock config in preset value

[Michał Mirosław]

When host controller uses programmable clock presets but doesn't
advertise programmable clock support, we can only guess what frequency
it generates. Let's at least return correct SDHCI_PROG_CLOCK_MODE bit
value in this case.

Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: added a comment for this case
v2: no changes
---
 drivers/mmc/host/sdhci.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c7438dd13e3e..3ab60e7f936b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1859,11 +1859,14 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 
 			pre_val = sdhci_get_preset_value(host);
 			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
-			if (host->clk_mul &&
-				(pre_val & SDHCI_PRESET_CLKGEN_SEL)) {
+			if (pre_val & SDHCI_PRESET_CLKGEN_SEL) {
 				clk = SDHCI_PROG_CLOCK_MODE;
 				real_div = div + 1;
 				clk_mul = host->clk_mul;
+				if (!clk_mul) {
+					/* The clock frequency is unknown. Assume undivided base. */
+					clk_mul = 1;
+				}
 			} else {
 				real_div = max_t(int, 1, div << 1);
 			}
-- 
2.30.2


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[PATCH v3 1/5] mmc: sdhci: fix base clock usage in preset value

[Michał Mirosław]

Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read
is overwritten for programmable clock preset, but is carried over for
divided clock preset. This can confuse sdhci_enable_clk() if the register
has enable bits set for some reason at time time of clock calculation.
Remove the read.

Quoting Al Cooper:

sdhci_brcmstb_set_clock() assumed that sdhci_calc_clk() would always
return the divider value without the enable set, so this fixes a case
for DDR52 where the enable was not being cleared when the divider
value was changed.

Cc: stable@kernel.vger.org
Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Al Cooper <alcooperx@gmail.com>

---
v3: updated commit message
v2: removed truncated sentence from commitmsg

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
 drivers/mmc/host/sdhci.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index aba6e10b8605..c7438dd13e3e 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1857,7 +1857,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 		if (host->preset_enabled) {
 			u16 pre_val;
 
-			clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
 			pre_val = sdhci_get_preset_value(host);
 			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
 			if (host->clk_mul &&
-- 
2.30.2


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[PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[Michał Mirosław]

Push handling of clock frequency dependence for
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: rebased on v5.14-rc2 and reworded commitmsg
v2: reworded commitmsg
---
 drivers/mmc/host/sdhci-of-arasan.c  | 11 ++++-------
 drivers/mmc/host/sdhci-of-dwcmshc.c |  9 ++++++---
 drivers/mmc/host/sdhci.c            |  3 +--
 3 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 737e2bfdedc2..f2a6441ab540 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -452,8 +452,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = {
 static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = {
 	.ops = &sdhci_arasan_cqe_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
-	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };
 
 #ifdef CONFIG_PM_SLEEP
@@ -1118,7 +1117,6 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = {
 	.ops = &sdhci_arasan_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 			SDHCI_QUIRK2_STOP_WITH_TC,
 };
 
@@ -1141,7 +1139,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_emmc_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
 		SDHCI_QUIRK2_STOP_WITH_TC |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1156,7 +1153,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sd_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 		SDHCI_QUIRK2_STOP_WITH_TC |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1171,7 +1167,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sdio_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_HOST_OFF_CARD_ON |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
 };
@@ -1197,7 +1192,6 @@ static struct sdhci_arasan_of_data intel_lgm_sdxc_data = {
 static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = {
 	.ops = &sdhci_arasan_ops,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 			SDHCI_QUIRK2_STOP_WITH_TC,
 };
 
@@ -1502,6 +1496,9 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan)
 	bool dma64;
 	int ret;
 
+	if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
+		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
 	if (!sdhci_arasan->has_cqe)
 		return sdhci_add_host(host);
 
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index bac874ab0b33..9bca7cf1d1da 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -283,14 +283,14 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
 	.ops = &sdhci_dwcmshc_rk3568_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
 		  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
-	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		   SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
 };
 
 static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
 {
-	int err;
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct rk3568_priv *priv = dwc_priv->priv;
+	int err;
 
 	priv->rockchip_clks[0].id = "axi";
 	priv->rockchip_clks[1].id = "block";
@@ -318,6 +318,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
 	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
 	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
 
+	if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
+		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
 	return 0;
 }
 
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 0993f7d0ce8e..cfa314e659bc 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 			/* Version 3.00 divisors must be a multiple of 2. */
 			if (host->max_clk <= clock) {
 				div = 1;
-				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-					&& host->max_clk <= 25000000)
+				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
 					div = 2;
 			} else {
 				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
-- 
2.30.2

[PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[Michał Mirosław]

Push handling of clock frequency dependence for
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN quirk to the drivers that use it.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: rebased on v5.14-rc2 and reworded commitmsg
v2: reworded commitmsg
---
 drivers/mmc/host/sdhci-of-arasan.c  | 11 ++++-------
 drivers/mmc/host/sdhci-of-dwcmshc.c |  9 ++++++---
 drivers/mmc/host/sdhci.c            |  3 +--
 3 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 737e2bfdedc2..f2a6441ab540 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -452,8 +452,7 @@ static const struct sdhci_ops sdhci_arasan_cqe_ops = {
 static const struct sdhci_pltfm_data sdhci_arasan_cqe_pdata = {
 	.ops = &sdhci_arasan_cqe_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
-	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };
 
 #ifdef CONFIG_PM_SLEEP
@@ -1118,7 +1117,6 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = {
 	.ops = &sdhci_arasan_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 			SDHCI_QUIRK2_STOP_WITH_TC,
 };
 
@@ -1141,7 +1139,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_emmc_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
 		SDHCI_QUIRK2_STOP_WITH_TC |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1156,7 +1153,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sd_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 		SDHCI_QUIRK2_STOP_WITH_TC |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
@@ -1171,7 +1167,6 @@ static const struct sdhci_pltfm_data sdhci_keembay_sdio_pdata = {
 		SDHCI_QUIRK_32BIT_DMA_SIZE |
 		SDHCI_QUIRK_32BIT_ADMA_SIZE,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 		SDHCI_QUIRK2_HOST_OFF_CARD_ON |
 		SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
 };
@@ -1197,7 +1192,6 @@ static struct sdhci_arasan_of_data intel_lgm_sdxc_data = {
 static const struct sdhci_pltfm_data sdhci_arasan_zynqmp_pdata = {
 	.ops = &sdhci_arasan_ops,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN |
 			SDHCI_QUIRK2_STOP_WITH_TC,
 };
 
@@ -1502,6 +1496,9 @@ static int sdhci_arasan_add_host(struct sdhci_arasan_data *sdhci_arasan)
 	bool dma64;
 	int ret;
 
+	if (sdhci_pltfm_clk_get_max_clock(host) <= 25000000)
+		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
 	if (!sdhci_arasan->has_cqe)
 		return sdhci_add_host(host);
 
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index bac874ab0b33..9bca7cf1d1da 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -283,14 +283,14 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
 	.ops = &sdhci_dwcmshc_rk3568_ops,
 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
 		  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
-	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-		   SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
+	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
 };
 
 static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
 {
-	int err;
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
 	struct rk3568_priv *priv = dwc_priv->priv;
+	int err;
 
 	priv->rockchip_clks[0].id = "axi";
 	priv->rockchip_clks[1].id = "block";
@@ -318,6 +318,9 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
 	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
 	sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
 
+	if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
+		host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
+
 	return 0;
 }
 
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 0993f7d0ce8e..cfa314e659bc 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1905,8 +1905,7 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 			/* Version 3.00 divisors must be a multiple of 2. */
 			if (host->max_clk <= clock) {
 				div = 1;
-				if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-					&& host->max_clk <= 25000000)
+				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
 					div = 2;
 			} else {
 				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
-- 
2.30.2


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[PATCH v3 5/5] mmc: sdhci: simplify v2/v3+ clock calculation

[Michał Mirosław]

For base clock setting, SDHCI V2 differs from V3+ only in allowed divisor
values.  Remove the duplicate version of code and reduce indentation
levels.  We can see now, that 'real_div' can't be zero, so the check is
removed.  While at it, replace divisor search loops with divide-and-clamp
to make the code even more readable.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: squashed div-conversion and deduplication patches to avoid code churn
v2: no changes
---
 drivers/mmc/host/sdhci.c | 124 ++++++++++++++++++---------------------
 drivers/mmc/host/sdhci.h |   4 +-
 2 files changed, 58 insertions(+), 70 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index cfa314e659bc..90bda4150083 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1848,88 +1848,76 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
 u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 		   unsigned int *actual_clock)
 {
-	int div = 0; /* Initialized for compiler warning */
-	int real_div = div, clk_mul = 1;
+	unsigned int div, real_div, clk_mul = 1;
 	u16 clk = 0;
-	bool switch_base_clk = false;
 
-	if (host->version >= SDHCI_SPEC_300) {
-		if (host->preset_enabled) {
-			u16 pre_val;
+	if (clock == 0)
+		return clk;
+
+	if (host->preset_enabled) {
+		/* Only version 3.00+ can have preset_enabled */
+		u16 pre_val;
+
+		pre_val = sdhci_get_preset_value(host);
+		div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
+		if (!(pre_val & SDHCI_PRESET_CLKGEN_SEL))
+			goto base_div_set;
+
+		clk = SDHCI_PROG_CLOCK_MODE;
+		real_div = div + 1;
+		clk_mul = host->clk_mul;
+		if (!clk_mul) {
+			/* The clock frequency is unknown. Assume undivided base. */
+			clk_mul = 1;
+		}
+
+		goto clock_set;
+	}
+
+	/*
+	 * Check if the Host Controller supports Programmable Clock
+	 * Mode.
+	 */
+	if (host->version >= SDHCI_SPEC_300 && host->clk_mul) {
+		div = DIV_ROUND_UP(host->max_clk * host->clk_mul, clock);
+		if (div <= SDHCI_MAX_DIV_SPEC_300 / 2 + 1) {
+			/*
+			 * Set Programmable Clock Mode in the Clock
+			 * Control register.
+			 */
+			clk = SDHCI_PROG_CLOCK_MODE;
+			clk_mul = host->clk_mul;
+			real_div = div--;
 
-			pre_val = sdhci_get_preset_value(host);
-			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
-			if (pre_val & SDHCI_PRESET_CLKGEN_SEL) {
-				clk = SDHCI_PROG_CLOCK_MODE;
-				real_div = div + 1;
-				clk_mul = host->clk_mul;
-				if (!clk_mul) {
-					/* The clock frequency is unknown. Assume undivided base. */
-					clk_mul = 1;
-				}
-			} else {
-				real_div = max_t(int, 1, div << 1);
-			}
 			goto clock_set;
 		}
 
 		/*
-		 * Check if the Host Controller supports Programmable Clock
-		 * Mode.
+		 * Divisor is too big for requested clock rate.
+		 * Fall back to the base clock.
 		 */
-		if (host->clk_mul) {
-			for (div = 1; div <= 1024; div++) {
-				if ((host->max_clk * host->clk_mul / div)
-					<= clock)
-					break;
-			}
-			if ((host->max_clk * host->clk_mul / div) <= clock) {
-				/*
-				 * Set Programmable Clock Mode in the Clock
-				 * Control register.
-				 */
-				clk = SDHCI_PROG_CLOCK_MODE;
-				real_div = div;
-				clk_mul = host->clk_mul;
-				div--;
-			} else {
-				/*
-				 * Divisor can be too small to reach clock
-				 * speed requirement. Then use the base clock.
-				 */
-				switch_base_clk = true;
-			}
-		}
+	}
 
-		if (!host->clk_mul || switch_base_clk) {
-			/* Version 3.00 divisors must be a multiple of 2. */
-			if (host->max_clk <= clock) {
-				div = 1;
-				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-					div = 2;
-			} else {
-				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
-				     div += 2) {
-					if ((host->max_clk / div) <= clock)
-						break;
-				}
-			}
-			real_div = div;
-			div >>= 1;
-		}
+	div = DIV_ROUND_UP(host->max_clk, clock);
+
+	if (div == 1 && (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN))
+		div = 2;
+
+	if (host->version >= SDHCI_SPEC_300) {
+		/* Version 3.00 divisors must be a multiple of 2. */
+		div = min(div, SDHCI_MAX_DIV_SPEC_300);
+		div = DIV_ROUND_UP(div, 2);
 	} else {
 		/* Version 2.00 divisors must be a power of 2. */
-		for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
-			if ((host->max_clk / div) <= clock)
-				break;
-		}
-		real_div = div;
-		div >>= 1;
+		div = min(div, SDHCI_MAX_DIV_SPEC_200);
+		div = roundup_pow_of_two(div) / 2;
 	}
 
+base_div_set:
+	real_div = div * 2 + !div;
+
 clock_set:
-	if (real_div)
-		*actual_clock = (host->max_clk * clk_mul) / real_div;
+	*actual_clock = (host->max_clk * clk_mul) / real_div;
 	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
 		<< SDHCI_DIVIDER_HI_SHIFT;
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 074dc182b184..a3fa70d91410 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -284,8 +284,8 @@
  * End of controller registers.
  */
 
-#define SDHCI_MAX_DIV_SPEC_200	256
-#define SDHCI_MAX_DIV_SPEC_300	2046
+#define SDHCI_MAX_DIV_SPEC_200	256u
+#define SDHCI_MAX_DIV_SPEC_300	2046u
 
 /*
  * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2.
-- 
2.30.2

[PATCH v3 5/5] mmc: sdhci: simplify v2/v3+ clock calculation

[Michał Mirosław]

For base clock setting, SDHCI V2 differs from V3+ only in allowed divisor
values.  Remove the duplicate version of code and reduce indentation
levels.  We can see now, that 'real_div' can't be zero, so the check is
removed.  While at it, replace divisor search loops with divide-and-clamp
to make the code even more readable.

Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
v3: squashed div-conversion and deduplication patches to avoid code churn
v2: no changes
---
 drivers/mmc/host/sdhci.c | 124 ++++++++++++++++++---------------------
 drivers/mmc/host/sdhci.h |   4 +-
 2 files changed, 58 insertions(+), 70 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index cfa314e659bc..90bda4150083 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1848,88 +1848,76 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
 u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
 		   unsigned int *actual_clock)
 {
-	int div = 0; /* Initialized for compiler warning */
-	int real_div = div, clk_mul = 1;
+	unsigned int div, real_div, clk_mul = 1;
 	u16 clk = 0;
-	bool switch_base_clk = false;
 
-	if (host->version >= SDHCI_SPEC_300) {
-		if (host->preset_enabled) {
-			u16 pre_val;
+	if (clock == 0)
+		return clk;
+
+	if (host->preset_enabled) {
+		/* Only version 3.00+ can have preset_enabled */
+		u16 pre_val;
+
+		pre_val = sdhci_get_preset_value(host);
+		div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
+		if (!(pre_val & SDHCI_PRESET_CLKGEN_SEL))
+			goto base_div_set;
+
+		clk = SDHCI_PROG_CLOCK_MODE;
+		real_div = div + 1;
+		clk_mul = host->clk_mul;
+		if (!clk_mul) {
+			/* The clock frequency is unknown. Assume undivided base. */
+			clk_mul = 1;
+		}
+
+		goto clock_set;
+	}
+
+	/*
+	 * Check if the Host Controller supports Programmable Clock
+	 * Mode.
+	 */
+	if (host->version >= SDHCI_SPEC_300 && host->clk_mul) {
+		div = DIV_ROUND_UP(host->max_clk * host->clk_mul, clock);
+		if (div <= SDHCI_MAX_DIV_SPEC_300 / 2 + 1) {
+			/*
+			 * Set Programmable Clock Mode in the Clock
+			 * Control register.
+			 */
+			clk = SDHCI_PROG_CLOCK_MODE;
+			clk_mul = host->clk_mul;
+			real_div = div--;
 
-			pre_val = sdhci_get_preset_value(host);
-			div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val);
-			if (pre_val & SDHCI_PRESET_CLKGEN_SEL) {
-				clk = SDHCI_PROG_CLOCK_MODE;
-				real_div = div + 1;
-				clk_mul = host->clk_mul;
-				if (!clk_mul) {
-					/* The clock frequency is unknown. Assume undivided base. */
-					clk_mul = 1;
-				}
-			} else {
-				real_div = max_t(int, 1, div << 1);
-			}
 			goto clock_set;
 		}
 
 		/*
-		 * Check if the Host Controller supports Programmable Clock
-		 * Mode.
+		 * Divisor is too big for requested clock rate.
+		 * Fall back to the base clock.
 		 */
-		if (host->clk_mul) {
-			for (div = 1; div <= 1024; div++) {
-				if ((host->max_clk * host->clk_mul / div)
-					<= clock)
-					break;
-			}
-			if ((host->max_clk * host->clk_mul / div) <= clock) {
-				/*
-				 * Set Programmable Clock Mode in the Clock
-				 * Control register.
-				 */
-				clk = SDHCI_PROG_CLOCK_MODE;
-				real_div = div;
-				clk_mul = host->clk_mul;
-				div--;
-			} else {
-				/*
-				 * Divisor can be too small to reach clock
-				 * speed requirement. Then use the base clock.
-				 */
-				switch_base_clk = true;
-			}
-		}
+	}
 
-		if (!host->clk_mul || switch_base_clk) {
-			/* Version 3.00 divisors must be a multiple of 2. */
-			if (host->max_clk <= clock) {
-				div = 1;
-				if (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN)
-					div = 2;
-			} else {
-				for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
-				     div += 2) {
-					if ((host->max_clk / div) <= clock)
-						break;
-				}
-			}
-			real_div = div;
-			div >>= 1;
-		}
+	div = DIV_ROUND_UP(host->max_clk, clock);
+
+	if (div == 1 && (host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN))
+		div = 2;
+
+	if (host->version >= SDHCI_SPEC_300) {
+		/* Version 3.00 divisors must be a multiple of 2. */
+		div = min(div, SDHCI_MAX_DIV_SPEC_300);
+		div = DIV_ROUND_UP(div, 2);
 	} else {
 		/* Version 2.00 divisors must be a power of 2. */
-		for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
-			if ((host->max_clk / div) <= clock)
-				break;
-		}
-		real_div = div;
-		div >>= 1;
+		div = min(div, SDHCI_MAX_DIV_SPEC_200);
+		div = roundup_pow_of_two(div) / 2;
 	}
 
+base_div_set:
+	real_div = div * 2 + !div;
+
 clock_set:
-	if (real_div)
-		*actual_clock = (host->max_clk * clk_mul) / real_div;
+	*actual_clock = (host->max_clk * clk_mul) / real_div;
 	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
 		<< SDHCI_DIVIDER_HI_SHIFT;
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 074dc182b184..a3fa70d91410 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -284,8 +284,8 @@
  * End of controller registers.
  */
 
-#define SDHCI_MAX_DIV_SPEC_200	256
-#define SDHCI_MAX_DIV_SPEC_300	2046
+#define SDHCI_MAX_DIV_SPEC_200	256u
+#define SDHCI_MAX_DIV_SPEC_300	2046u
 
 /*
  * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2.
-- 
2.30.2


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Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 4472 bytes --]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: arm64-randconfig-r036-20210725 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project c63dbd850182797bc4b76124d08e1c320ab2365d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: unexpected ';' before '}'
           .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
                                                      ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: incompatible pointer types passing 'struct sdhci_pltfm_host *' to parameter of type 'struct sdhci_host *' [-Werror,-Wincompatible-pointer-types]
           if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
                                             ^~~~~~~~~~
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: passing argument to parameter 'host' here
   extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
                                                                        ^
   2 errors generated.


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 46479 bytes --]

Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 4472 bytes --]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: arm64-randconfig-r036-20210725 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project c63dbd850182797bc4b76124d08e1c320ab2365d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: unexpected ';' before '}'
           .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
                                                      ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: incompatible pointer types passing 'struct sdhci_pltfm_host *' to parameter of type 'struct sdhci_host *' [-Werror,-Wincompatible-pointer-types]
           if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
                                             ^~~~~~~~~~
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: passing argument to parameter 'host' here
   extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
                                                                        ^
   2 errors generated.


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 46479 bytes --]

[-- Attachment #3: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 4571 bytes --]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: arm64-randconfig-r036-20210725 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project c63dbd850182797bc4b76124d08e1c320ab2365d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm64 cross compiling tool for clang build
        # apt-get install binutils-aarch64-linux-gnu
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: unexpected ';' before '}'
           .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
                                                      ^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: incompatible pointer types passing 'struct sdhci_pltfm_host *' to parameter of type 'struct sdhci_host *' [-Werror,-Wincompatible-pointer-types]
           if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
                                             ^~~~~~~~~~
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: passing argument to parameter 'host' here
   extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
                                                                        ^
   2 errors generated.


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 46479 bytes --]

Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 4850 bytes --]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: riscv-randconfig-c003-20210725 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: expected '}' before ';' token
     286 |  .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
         |                                             ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:282:67: note: to match this '{'
     282 | static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
         |                                                                   ^
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_rk3568_init':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: passing argument 1 of 'sdhci_pltfm_clk_get_max_clock' from incompatible pointer type [-Werror=incompatible-pointer-types]
     321 |  if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
         |                                    ^~~~~~~~~~
         |                                    |
         |                                    struct sdhci_pltfm_host *
   In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:20:
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: expected 'struct sdhci_host *' but argument is of type 'struct sdhci_pltfm_host *'
     107 | extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
         |                                                   ~~~~~~~~~~~~~~~~~~~^~~~
   cc1: some warnings being treated as errors


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 34078 bytes --]

Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 4850 bytes --]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: riscv-randconfig-c003-20210725 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: expected '}' before ';' token
     286 |  .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
         |                                             ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:282:67: note: to match this '{'
     282 | static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
         |                                                                   ^
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_rk3568_init':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: passing argument 1 of 'sdhci_pltfm_clk_get_max_clock' from incompatible pointer type [-Werror=incompatible-pointer-types]
     321 |  if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
         |                                    ^~~~~~~~~~
         |                                    |
         |                                    struct sdhci_pltfm_host *
   In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:20:
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: expected 'struct sdhci_host *' but argument is of type 'struct sdhci_pltfm_host *'
     107 | extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
         |                                                   ~~~~~~~~~~~~~~~~~~~^~~~
   cc1: some warnings being treated as errors


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

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Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: riscv-randconfig-c003-20210725 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: expected '}' before ';' token
     286 |  .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
         |                                             ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:282:67: note: to match this '{'
     282 | static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
         |                                                                   ^
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_rk3568_init':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: passing argument 1 of 'sdhci_pltfm_clk_get_max_clock' from incompatible pointer type [-Werror=incompatible-pointer-types]
     321 |  if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
         |                                    ^~~~~~~~~~
         |                                    |
         |                                    struct sdhci_pltfm_host *
   In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:20:
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: expected 'struct sdhci_host *' but argument is of type 'struct sdhci_pltfm_host *'
     107 | extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
         |                                                   ~~~~~~~~~~~~~~~~~~~^~~~
   cc1: some warnings being treated as errors


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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