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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c16sm2717630pfb.196.2021.07.27.01.54.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jul 2021 01:54:57 -0700 (PDT) From: Zong Li To: rick@andestech.com, ycliang@andestech.com, bmeng.cn@gmail.com, seanga2@gmail.com, sjg@chromium.org, green.wan@sifive.com, paul.walmsley@sifive.com, u-boot@lists.denx.de Cc: Zong Li Subject: [PATCH 1/2] cache: add sifive composable cache driver Date: Tue, 27 Jul 2021 16:54:51 +0800 Message-Id: <20210727085452.25708-1-zong.li@sifive.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This driver is currently responsible for enabling all ccache ways. Signed-off-by: Zong Li --- drivers/cache/Kconfig | 7 +++ drivers/cache/Makefile | 1 + drivers/cache/cache-sifive-ccache.c | 69 +++++++++++++++++++++++++++++ 3 files changed, 77 insertions(+) create mode 100644 drivers/cache/cache-sifive-ccache.c diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index 1e452ad6d9..b903e3e935 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -39,4 +39,11 @@ config NCORE_CACHE controller. The driver initializes cache directories and coherent agent interfaces. +config SIFIVE_CACHE_CCACHE + bool "SiFive composable cache" + select CACHE + help + This driver is for SiFive Composable L2/L3 cache. It enables cache + ways of composable cache. + endmenu diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile index fed50be3f9..92c6c5a83f 100644 --- a/drivers/cache/Makefile +++ b/drivers/cache/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_SANDBOX) += sandbox_cache.o obj-$(CONFIG_L2X0_CACHE) += cache-l2x0.o obj-$(CONFIG_NCORE_CACHE) += cache-ncore.o obj-$(CONFIG_V5L2_CACHE) += cache-v5l2.o +obj-$(CONFIG_SIFIVE_CACHE_CCACHE) += cache-sifive-ccache.o diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c new file mode 100644 index 0000000000..9ea064912f --- /dev/null +++ b/drivers/cache/cache-sifive-ccache.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 SiFive + */ + +#include +#include +#include +#include +#include + +#define SIFIVE_CCACHE_CONFIG 0x000 +#define SIFIVE_CCACHE_ENABLE 0x008 + +#define SIFIVE_CCACHE_NUM_WAY_MASK GENMASK(15, 8) +#define SIFIVE_CCACHE_NUM_WAY_SHIFT 8 + +struct sifive_ccache { + void __iomem *base; +}; + +static int sifive_ccache_enable_all_ways(struct udevice *dev) +{ + struct sifive_ccache *priv = dev_get_priv(dev); + u32 config; + u32 ways; + + config = readl(priv->base + SIFIVE_CCACHE_CONFIG); + ways = (config & SIFIVE_CCACHE_NUM_WAY_MASK) >> SIFIVE_CCACHE_NUM_WAY_SHIFT; + + writel(ways - 1, priv->base + SIFIVE_CCACHE_ENABLE); + + return 0; +} + +static int sifive_ccache_enable(struct udevice *dev) +{ + return sifive_ccache_enable_all_ways(dev); +} + +static const struct cache_ops sifive_ccache_ops = { + .enable = sifive_ccache_enable, +}; + +static int sifive_ccache_probe(struct udevice *dev) +{ + struct sifive_ccache *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENODEV; + + return 0; +} + +static const struct udevice_id sifive_ccache_ids[] = { + { .compatible = "sifive,fu540-c000-ccache" }, + { .compatible = "sifive,fu740-c000-ccache" }, + {} +}; + +U_BOOT_DRIVER(sifive_ccache) = { + .name = "sifive_ccache", + .id = UCLASS_CACHE, + .of_match = sifive_ccache_ids, + .probe = sifive_ccache_probe, + .priv_auto = sizeof(struct sifive_ccache), + .ops = &sifive_ccache_ops, +}; -- 2.31.1