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[44.242.66.180]) by smtp.gmail.com with ESMTPSA id de19sm2037969edb.6.2021.07.27.21.00.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jul 2021 21:00:36 -0700 (PDT) From: Bin Meng To: u-boot@lists.denx.de, Simon Glass Subject: [PATCH 2/2] x86: dts: Define a default TSC timer frequency Date: Wed, 28 Jul 2021 12:00:23 +0800 Message-Id: <20210728040023.338991-2-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210728040023.338991-1-bmeng.cn@gmail.com> References: <20210728040023.338991-1-bmeng.cn@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean If for some reason, TSC timer frequency cannot be determined from hardware, nor is it specified in the device tree, U-Boot will panic resulting in endless reset during boot. Let's define a default TSC timer frequency using the Kconfig value CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of /include/ otherwise the macro is not pre-processed). Signed-off-by: Bin Meng --- arch/x86/dts/bayleybay.dts | 2 +- arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 +- arch/x86/dts/cherryhill.dts | 2 +- arch/x86/dts/chromebook_coral.dts | 3 ++- arch/x86/dts/chromebook_link.dts | 2 +- arch/x86/dts/chromebook_samus.dts | 2 +- arch/x86/dts/chromebox_panther.dts | 2 +- arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 +- arch/x86/dts/coreboot.dts | 7 ++----- arch/x86/dts/cougarcanyon2.dts | 2 +- arch/x86/dts/crownbay.dts | 2 +- arch/x86/dts/edison.dts | 2 +- arch/x86/dts/efi-x86_app.dts | 7 ++----- arch/x86/dts/efi-x86_payload.dts | 7 ++----- arch/x86/dts/galileo.dts | 7 ++----- arch/x86/dts/minnowmax.dts | 2 +- arch/x86/dts/qemu-x86_i440fx.dts | 6 +----- arch/x86/dts/qemu-x86_q35.dts | 6 +----- arch/x86/dts/slimbootloader.dts | 2 +- arch/x86/dts/tsc_timer.dtsi | 1 + 20 files changed, 25 insertions(+), 43 deletions(-) diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 70e5798403..828b851773 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index a7dc03b645..f5d1a28c09 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts index 2ce7f1aa91..99d137e321 100644 --- a/arch/x86/dts/cherryhill.dts +++ b/arch/x86/dts/cherryhill.dts @@ -12,8 +12,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 66c31efb6c..ea879c0300 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -8,7 +8,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" #if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index e529c4b63e..4367fab651 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -9,8 +9,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index ad35ab2e3f..0f0dcdcc5f 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -7,8 +7,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" #if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index 77b6ac9ab9..0169c427a1 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -4,8 +4,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index bbea99da2c..31eacc2d48 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -14,8 +14,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index 38ddaafa19..d21978d6e0 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -12,7 +12,8 @@ /include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "coreboot x86 payload"; @@ -30,10 +31,6 @@ stdout-path = "/serial"; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index 602523333e..f850becaaa 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -12,8 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index a7166a9749..5768352531 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -13,8 +13,8 @@ /include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index 8d245bffc2..64b6228363 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -10,8 +10,8 @@ /include/ "skeleton.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/efi-x86_app.dts b/arch/x86/dts/efi-x86_app.dts index 20150f6ede..04e044a07a 100644 --- a/arch/x86/dts/efi-x86_app.dts +++ b/arch/x86/dts/efi-x86_app.dts @@ -6,7 +6,8 @@ /dts-v1/; /include/ "skeleton.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "EFI x86 Application"; @@ -16,10 +17,6 @@ stdout-path = &serial; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - serial: serial { compatible = "efi,uart"; }; diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts index 5ccb986774..087865f225 100644 --- a/arch/x86/dts/efi-x86_payload.dts +++ b/arch/x86/dts/efi-x86_payload.dts @@ -12,7 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "EFI x86 Payload"; @@ -30,10 +31,6 @@ stdout-path = "/serial"; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index b5ba1181dd..4120e8f5c4 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -11,7 +11,8 @@ /include/ "skeleton.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" + +#include "tsc_timer.dtsi" / { model = "Intel Galileo"; @@ -41,10 +42,6 @@ }; }; - tsc-timer { - clock-frequency = ; - }; - mrc { compatible = "intel,quark-mrc"; flags = ; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 133d55bc20..110450bb55 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -13,8 +13,8 @@ /include/ "serial.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts index c33a11d593..6556e9ebcd 100644 --- a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -12,8 +12,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -42,10 +42,6 @@ }; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; #address-cells = <3>; diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index 9faae7fb56..d0830892e8 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -22,8 +22,8 @@ /include/ "keyboard.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" #include "smbios.dtsi" / { @@ -53,10 +53,6 @@ }; }; - tsc-timer { - clock-frequency = <1000000000>; - }; - pci { compatible = "pci-x86"; #address-cells = <3>; diff --git a/arch/x86/dts/slimbootloader.dts b/arch/x86/dts/slimbootloader.dts index d04095c4f8..9b581c8489 100644 --- a/arch/x86/dts/slimbootloader.dts +++ b/arch/x86/dts/slimbootloader.dts @@ -7,7 +7,7 @@ /include/ "skeleton.dtsi" /include/ "reset.dtsi" -/include/ "tsc_timer.dtsi" +#include "tsc_timer.dtsi" / { model = "slimbootloader x86 payload"; diff --git a/arch/x86/dts/tsc_timer.dtsi b/arch/x86/dts/tsc_timer.dtsi index 4f5021d96f..4df8e9d7fc 100644 --- a/arch/x86/dts/tsc_timer.dtsi +++ b/arch/x86/dts/tsc_timer.dtsi @@ -1,6 +1,7 @@ / { tsc-timer { compatible = "x86,tsc-timer"; + clock-frequency = ; u-boot,dm-pre-reloc; }; }; -- 2.25.1