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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/6] drm/i915: correct name of GT forcewake domain in error messages
Date: Wed, 28 Jul 2021 22:41:13 -0700	[thread overview]
Message-ID: <20210729054118.2458523-2-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20210729054118.2458523-1-matthew.d.roper@intel.com>

For historical reasons, the GT forcewake domain used to be referred to
as the "blitter" domain; that name is no longer accurate since the GT
domain contains a lot of additional registers and functionality besides
just the blitter.  Although we renamed the domain in the driver in
commit 55e3c170950f ("drm/i915: Rename FORCEWAKE_BLITTER to
FORCEWAKE_GT"), we neglected to update the string that gets printed in
driver error messages; let's do that now to avoid confusion.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 8cf53f54559d..bca548c81572 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -64,7 +64,7 @@ static void mmio_debug_resume(struct intel_uncore_mmio_debug *mmio_debug)
 
 static const char * const forcewake_domain_names[] = {
 	"render",
-	"blitter",
+	"gt",
 	"media",
 	"vdbox0",
 	"vdbox1",
-- 
2.25.4

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  reply	other threads:[~2021-07-29  5:41 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-29  5:41 [Intel-gfx] [PATCH 0/6] Forcewake and shadowed register updates Matt Roper
2021-07-29  5:41 ` Matt Roper [this message]
2021-07-29 14:13   ` [Intel-gfx] [PATCH 1/6] drm/i915: correct name of GT forcewake domain in error messages Yokoyama, Caz
2021-07-29  5:41 ` [Intel-gfx] [PATCH 2/6] drm/i915: Re-use gen11 forcewake read functions on gen12 Matt Roper
2021-07-29 21:02   ` Yokoyama, Caz
2021-07-29  5:41 ` [Intel-gfx] [PATCH 3/6] drm/i915: Make shadow tables range-based Matt Roper
2021-07-29 15:21   ` [Intel-gfx] [PATCH v2 " Matt Roper
2021-07-29 21:55     ` Yokoyama, Caz
2021-07-29 21:59       ` Matt Roper
2021-08-10 22:02         ` Yokoyama, Caz
2021-07-29  5:41 ` [Intel-gfx] [PATCH 4/6] drm/i915/gen11: Update shadowed register table Matt Roper
2021-08-10 22:03   ` Yokoyama, Caz
2021-07-29  5:41 ` [Intel-gfx] [PATCH 5/6] drm/i915/gen12: " Matt Roper
2021-08-10 22:04   ` Yokoyama, Caz
2021-07-29  5:41 ` [Intel-gfx] [PATCH 6/6] drm/i915/xehp: Xe_HP shadowed registers are a strict superset of gen12 Matt Roper
2021-07-29 23:36   ` Yokoyama, Caz
2021-07-29  6:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Forcewake and shadowed register updates Patchwork
2021-07-29  6:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-29 13:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-29 20:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Forcewake and shadowed register updates (rev2) Patchwork
2021-07-29 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-30  8:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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