From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D586CC4338F for ; Sat, 31 Jul 2021 12:23:48 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E346D60F35 for ; Sat, 31 Jul 2021 12:23:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E346D60F35 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4852E83244; Sat, 31 Jul 2021 14:23:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="GaYCMWtl"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1B18F83252; Sat, 31 Jul 2021 14:23:33 +0200 (CEST) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 63DB682CE2 for ; Sat, 31 Jul 2021 14:23:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: by mail.kernel.org (Postfix) with ESMTPSA id 62E1D60EBB; Sat, 31 Jul 2021 12:23:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627734203; bh=H+34bxRR2AjgiX9Qj746bmMUteuCm5DA3uKPv1NVZ0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GaYCMWtltgw0cQupb0LvhaTr6hsPum0POFDV4qLdJ/N6pHD8j+DMZopy97fHO46rT 8pMQv57DqF4u1KqVhmE7g1s/NW0LbJB79W4jBd22J0utatcYcn4WnIGGJQ99vu2whc f+xG3FPQoV1qjsbZqJTRrwsAP0lIVaXA3bH5PlrK19j7OrVzAM7fBSbfaS1pfWS48r dR9+sFBhsBZW74A+K3jtz5k1itYR1nfpQwhP+Itc4B5GRkyxC1Fs3BcRy0ikl2yfSG y6kWtXrk5F0EG9FmEsSp4Rkc1LF8aut6pLBS9akBy3ROq6K5+cm0dIm1GrJvbccZ9Q rN0TRtL72mdow== Received: by pali.im (Postfix) id 9DB04EF1; Sat, 31 Jul 2021 14:23:21 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , Chris Packham , Baruch Siach , Dirk Eibach , u-boot@lists.denx.de Cc: =?UTF-8?q?Marek=20Beh=C3=BAn?= , Dennis Gilmore , Mario Six , Jon Nettleton Subject: [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Date: Sat, 31 Jul 2021 14:22:52 +0200 Message-Id: <20210731122256.6546-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210731122256.6546-1-pali@kernel.org> References: <20210731122256.6546-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár --- arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++----- include/configs/clearfog.h | 1 - include/configs/controlcenterdc.h | 2 -- include/configs/db-88f6820-amc.h | 2 -- include/configs/db-88f6820-gp.h | 2 -- include/configs/helios4.h | 1 - include/configs/turris_omnia.h | 1 - include/configs/x530.h | 2 -- 8 files changed, 8 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 3f3b15aa8ab6..cb323aa59a76 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -33,11 +33,6 @@ #define MV_88F68XX_A0_ID 0x4 #define MV_88F68XX_B0_ID 0xa -/* TCLK Core Clock definition */ -#ifndef CONFIG_SYS_TCLK -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ -#endif - /* SOC specific definations */ #define INTREG_BASE 0xd0000000 #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080) @@ -170,6 +165,9 @@ #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 + +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \ + 200000000 : 250000000) #elif defined(CONFIG_ARMADA_MSYS) /* SAR values for MSYS */ #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200) @@ -207,4 +205,9 @@ #define BOOT_FROM_SPI 0x3 #endif +/* TCLK Core Clock definition */ +#ifndef CONFIG_SYS_TCLK +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ +#endif + #endif /* _MVEBU_SOC_H */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index fbdd2f0a244c..705217067b30 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -17,7 +17,6 @@ * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index e81d05aa2e83..d9802d2a3b8d 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -20,8 +20,6 @@ * U-Boot into it. */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ - #define CONFIG_LOADADDR 1000000 /* diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 757fbc0b9bcd..83f5b71839e2 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -10,8 +10,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index d50eb2c12011..feab46cbcbc5 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -10,8 +10,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ - /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 1368080f036b..b5814ed55cf2 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -17,7 +17,6 @@ * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 0a824b79397c..18b9861160b0 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -16,7 +16,6 @@ * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI diff --git a/include/configs/x530.h b/include/configs/x530.h index 515c6e7ff45c..64d68276234c 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -12,8 +12,6 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ - /* * NS16550 Configuration */ -- 2.20.1