From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1654C4338F for ; Mon, 2 Aug 2021 14:18:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C210D60F41 for ; Mon, 2 Aug 2021 14:18:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236359AbhHBOSK (ORCPT ); Mon, 2 Aug 2021 10:18:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237714AbhHBORM (ORCPT ); Mon, 2 Aug 2021 10:17:12 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30FE6C04984F; Mon, 2 Aug 2021 07:00:50 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id x11so30137135ejj.8; Mon, 02 Aug 2021 07:00:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=1Za1Yj9NjOylf2JMkcBxcOLagUVAwLPeusWL40lZlvQ=; b=MSGxR1uk7XakGmBg8RmnXvyK+9XAw3uOmK5Gsan1JlNVQR7Jhno7DDrsx/b/jLMTLs lm0Q6Pr2wKLfbgm2wpBnqrmetXUDpzTlEH/WSfxUwqHfD9Tc8e4HNgSotM+ptcT8jkFU uBXRHi9S1qZxzDCUT73n3knQAfcA/vuYS+/RWBbU7lWUcUHXyd1pzBgXBY8kexmtFtc5 opfsXTOD+5fwJXVwQrayavSWnhwbcg3Ii6ZAVxLSYo7JqAuHgH93VusKI/ReNK3yoOxh aTCH1pqsWXZRQdoyQTCyhF+4QqnVAg61RKAOibqnkofWQ/E2WGhcAcXRReoV9faA2TyX 2nFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=1Za1Yj9NjOylf2JMkcBxcOLagUVAwLPeusWL40lZlvQ=; b=VybDHjJT/hYIOu9FFKme9q6lHYyngymABE0lruyKgrRy1xoN7Um1Oog86hMLMgaB+H UnhblHAlHpt8agCz6q5+zI1jSau4SEqpTGZl/DqeJEomVu8459mCqcpoJFQhP0jeZrU4 DnG97iN6+Qcue9RCd1U5uUK8OSDWginKmgYSCZRzQwzDEw01ozENLdkY8+M21Mfg6FTe FV5NSjDQ2jAU0kSUaGtp0NX/5a1nKUL0eZGsY3TP83N0lTqpE08R8Uufzj1N7PZk2bl7 5Y6aBRrw3S1EO3sffNx3ru9V/UertZszmJ19k15qUbhZ1atzIdpUGddhiiFg1wx2fgLR 8S3Q== X-Gm-Message-State: AOAM531q7PN2xaBVA38kbbvUzJshJIZfjuhd+ai/fRH6mS1xctqQ2XTJ 08PMjnS0r7K9DXga2JQsX14= X-Google-Smtp-Source: ABdhPJwmc3U0XGaiP4J/l7ORgTTqgzAjE7GqluO8BvZQx+46vEUHJ1XXO4CAuCJ9aLlCbQQgtaQ0iQ== X-Received: by 2002:a17:906:40d5:: with SMTP id a21mr15739258ejk.325.1627912848843; Mon, 02 Aug 2021 07:00:48 -0700 (PDT) Received: from skbuf ([188.25.144.60]) by smtp.gmail.com with ESMTPSA id oz31sm4567170ejb.54.2021.08.02.07.00.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Aug 2021 07:00:48 -0700 (PDT) Date: Mon, 2 Aug 2021 17:00:46 +0300 From: Vladimir Oltean To: Oleksij Rempel Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , "David S. Miller" , Jakub Kicinski , Russell King , Pengutronix Kernel Team , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: Re: [PATCH net-next v3 1/6] net: dsa: qca: ar9331: reorder MDIO write sequence Message-ID: <20210802140046.locxzehdjdw3cjua@skbuf> References: <20210802131037.32326-1-o.rempel@pengutronix.de> <20210802131037.32326-2-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210802131037.32326-2-o.rempel@pengutronix.de> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 02, 2021 at 03:10:32PM +0200, Oleksij Rempel wrote: > In case of this switch we work with 32bit registers on top of 16bit > bus. Some registers (for example access to forwarding database) have > trigger bit on the first 16bit half of request and the result + > configuration of request in the second half. Without this patch, we would > trigger database operation and overwrite result in one run. > > To make it work properly, we should do the second part of transfer > before the first one is done. > > So far, this rule seems to work for all registers on this switch. > > Signed-off-by: Oleksij Rempel > Reviewed-by: Andrew Lunn > --- Reviewed-by: Vladimir Oltean