From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64020C4338F for ; Mon, 9 Aug 2021 13:52:29 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 21D0960F35 for ; Mon, 9 Aug 2021 13:52:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 21D0960F35 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2rL2gw9VSqP+7coHqpEonbXa47XRupL91yDnWw46hmg=; b=Z24WDzqCeZwKOu 1u/5RNw+cRIMhj92sKzSsalGjGfq+y7Wa/qnO3ZtEf+nSBbdSN5wtVdhG5ycL0/uJlmdgGjME6eQi PfRlal6FtT6/4NLU4B48QFO+360G9kw6zZTGP8MVklYIMYkvjydgOIT30/H+hJ7zJrHdlBFs8ELzk 5O0wePEIbEjpdN/MruTnQQkWMVmqkucQxLbmzVMv6KhvGHMZc3lvM+YiwEJR6H/u22HRk98VQhfIn VJ8+B5GAGb7D2caAJEXqYRS5G3+6xae22zoT1H3VzD8X4Dy+ppakzWhInH8zqneQHSBUCH8ZU+rE+ i57wPtxcZlWtYgCEho/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mD5g2-000pG4-NG; Mon, 09 Aug 2021 13:50:50 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mD5fy-000pFI-VY for linux-arm-kernel@lists.infradead.org; Mon, 09 Aug 2021 13:50:48 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 31AC060F35; Mon, 9 Aug 2021 13:50:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1628517046; bh=TwGag8YVq1DWwB2iDX60i1KMUx31UuFASViSAW73fYI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CbN5mwnCjuMVGRFVS52gcFS9EgIOJq/7SHhBy3zeXtsf6npjhNCgfB0SgyVqCTG64 7D71KHEqAVMB/Wz6YZloP35MQm7acmpHjUiazzRj40BcszQZT+TPA1IYrMcGECSNvf GIwTjitv6/9dI0aOdVdhdygQuiQoXSnJXrX23wrCaVdgekwvS7UvNzI6UU2dH7qlcA lUEAbpTOacchdlj7Aq8VcePYBmKuxxOX5ZPimCCVXjoz9ZQKphQ22UMJwJ38bqx2vG V4BUFIIHyDgmxhNfD1cFiVbZyP+D4NplfbK7s9ju1TKs0zUEPNkfDPEWhBU94kxrrO OoBGzR83eUyeg== Date: Mon, 9 Aug 2021 14:50:41 +0100 From: Will Deacon To: Frank Li Cc: Catalin Marinas , Zhi Li , Shenwei Wang , Han Xu , Nitin Garg , Jason Liu , "linux-arm-kernel@lists.infradead.org" Subject: Re: [EXT] Re: The problem about arm64: io: Relax implicit barriers in default I/O accessors Message-ID: <20210809135041.GC1207@willie-the-truck> References: <20210621162641.GA29595@willie-the-truck> <20210621165941.GB29595@willie-the-truck> <20210621181326.GD29713@willie-the-truck> <20210622091140.GA30677@willie-the-truck> <20210706171106.GE20750@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210809_065047_078560_227876B3 X-CRM114-Status: GOOD ( 22.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 22, 2021 at 07:14:19PM +0000, Frank Li wrote: > > > On Wed, Jun 23, 2021 at 03:48:10PM +0000, Frank Li wrote: > > > > > I think you had a support case open with Arm [1] which I'm not able > > to > > > > > access -- please can you ask them about the two examples above? > > > > > > > > Still not get feedback from ARM. > > > > > > Just wondering if you were able to solve this without the need to change > > > Linux? > > > > Sorry for late reply > > > > For CCI-500 and 550, ARM removed support for barrier transactions but CCI- > > 400 supports barrier transactions. With CCI-400 it is a valid configuration > > to have SYSBARDISABLE LOW in Cortex-A processors. This change in Linux > > kernel is assuming that the SYSBARDISABLE is set to HIGH hence its not > > correct change for all products having various versions of ARM CCI IP. > > > > Frank Li > > Deacon: > > Did you plan fix this problem by changing dma_wmb()? No. As far as I understand this problem, you're driving SYSBARDISABLE 'low' yet you have your own bus fabric downstream of the CCI which doesn't respect barrier transactions. Even if we bodge dma_wmb(), store-release to non-cacheable memory cannot be made to work on your system as you're effectively putting some of your non-coherent DMA devices into a separate outer-shareable domain from the CPUs. So you have two options: 1. Drive SYSBARDISABLE 'high' so that the CPU handles ordering for you - or - 2. Quirk Linux so that we patch dma_wmb() when we detect your system at runtime (so we can extend this in future if we need to emit a different sequence for store release) (1) is definitely the easiest option if it's possible. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel