From: Ido Schimmel <idosch@idosch.org>
To: netdev@vger.kernel.org
Cc: davem@davemloft.net, kuba@kernel.org, andrew@lunn.ch,
mkubecek@suse.cz, pali@kernel.org, jacob.e.keller@intel.com,
jiri@nvidia.com, vadimp@nvidia.com, mlxsw@nvidia.com,
Ido Schimmel <idosch@nvidia.com>
Subject: [RFC PATCH net-next v2 2/6] mlxsw: reg: Add Port Module Memory Map Properties register
Date: Wed, 18 Aug 2021 18:51:58 +0300 [thread overview]
Message-ID: <20210818155202.1278177-3-idosch@idosch.org> (raw)
In-Reply-To: <20210818155202.1278177-1-idosch@idosch.org>
From: Ido Schimmel <idosch@nvidia.com>
Add the Port Module Memory Map Properties register. It will be used to
set the power mode of a module in subsequent patches.
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 44 +++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index 16092a1f68bb..e30e6d3482f6 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -5883,6 +5883,49 @@ static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port,
mlxsw_reg_pddr_page_select_set(payload, page_select);
}
+/* PMMP - Port Module Memory Map Properties Register
+ * -------------------------------------------------
+ * The PMMP register allows to override the module memory map advertisement.
+ * The register can only be set when the module is disabled by PMAOS register.
+ */
+#define MLXSW_REG_PMMP_ID 0x5044
+#define MLXSW_REG_PMMP_LEN 0x2C
+
+MLXSW_REG_DEFINE(pmmp, MLXSW_REG_PMMP_ID, MLXSW_REG_PMMP_LEN);
+
+/* reg_pmmp_module
+ * Module number.
+ * Access: Index
+ */
+MLXSW_ITEM32(reg, pmmp, module, 0x00, 16, 8);
+
+/* reg_pmmp_eeprom_override_mask
+ * Write mask bit (negative polarity).
+ * 0 - Allow write
+ * 1 - Ignore write
+ * On write, indicates which of the bits from eeprom_override field are
+ * updated.
+ * Access: WO
+ */
+MLXSW_ITEM32(reg, pmmp, eeprom_override_mask, 0x04, 16, 16);
+
+enum {
+ /* Set module to low power mode */
+ MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK = BIT(8),
+};
+
+/* reg_pmmp_eeprom_override
+ * Override / ignore EEPROM advertisement properties bitmask
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, pmmp, eeprom_override, 0x04, 0, 16);
+
+static inline void mlxsw_reg_pmmp_pack(char *payload, u8 module)
+{
+ MLXSW_REG_ZERO(pmmp, payload);
+ mlxsw_reg_pmmp_module_set(payload, module);
+}
+
/* PMTM - Port Module Type Mapping Register
* ----------------------------------------
* The PMTM allows query or configuration of module types.
@@ -12225,6 +12268,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(pplr),
MLXSW_REG(pmpe),
MLXSW_REG(pddr),
+ MLXSW_REG(pmmp),
MLXSW_REG(pmtm),
MLXSW_REG(htgt),
MLXSW_REG(hpkt),
--
2.31.1
next prev parent reply other threads:[~2021-08-18 15:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-18 15:51 [RFC PATCH net-next v2 0/6] ethtool: Add ability to control transceiver modules' power mode Ido Schimmel
2021-08-18 15:51 ` [RFC PATCH net-next v2 1/6] " Ido Schimmel
2021-08-18 22:32 ` Jakub Kicinski
2021-08-18 22:55 ` Andrew Lunn
2021-08-19 7:50 ` Ido Schimmel
2021-08-19 13:13 ` Andrew Lunn
2021-08-19 14:34 ` Ido Schimmel
2021-08-19 14:42 ` Jakub Kicinski
2021-08-19 22:38 ` Keller, Jacob E
2021-08-19 7:47 ` Ido Schimmel
2021-08-19 14:38 ` Jakub Kicinski
2021-08-18 15:51 ` Ido Schimmel [this message]
2021-08-18 15:51 ` [RFC PATCH net-next v2 3/6] mlxsw: reg: Add Management Cable IO and Notifications register Ido Schimmel
2021-08-18 15:52 ` [RFC PATCH net-next v2 4/6] mlxsw: Add ability to control transceiver modules' power mode Ido Schimmel
2021-08-18 15:52 ` [RFC PATCH net-next v2 5/6] ethtool: Add transceiver module extended states Ido Schimmel
2021-08-18 15:52 ` [RFC PATCH net-next v2 6/6] mlxsw: Add support for " Ido Schimmel
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