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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id p18sm3425902wrt.13.2021.08.19.10.16.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Aug 2021 10:16:02 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 3/3] hw/usb/xhci: Always expect 'dma' link property to be set Date: Thu, 19 Aug 2021 19:15:47 +0200 Message-Id: <20210819171547.2879725-4-philmd@redhat.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210819171547.2879725-1-philmd@redhat.com> References: <20210819171547.2879725-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Sergio Lopez , "Michael S. Tsirkin" , Richard Henderson , Gerd Hoffmann , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Simplify by always passing a MemoryRegion property to the device. Doing so we can move the AddressSpace field to the device struct, removing need for heap allocation. Update the MicroVM machine to pass the default system memory instead of a NULL value. We don't need to change the Versal machine, as the link property is initialize as "versal.dwc3_alias" MemoryRegion alias. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- Versal untested --- hw/usb/hcd-xhci.h | 2 +- hw/i386/microvm.c | 2 ++ hw/usb/hcd-xhci-pci.c | 3 ++- hw/usb/hcd-xhci-sysbus.c | 13 ++++++------- hw/usb/hcd-xhci.c | 20 ++++++++++---------- 5 files changed, 21 insertions(+), 19 deletions(-) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 98f598382ad..ea76ec4f277 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -180,7 +180,7 @@ typedef struct XHCIState { USBBus bus; MemoryRegion mem; MemoryRegion *dma_mr; - AddressSpace *as; + AddressSpace as; MemoryRegion mem_cap; MemoryRegion mem_oper; MemoryRegion mem_runtime; diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index aba0c832190..642bf0d6811 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -219,6 +219,8 @@ static void microvm_devices_init(MicrovmMachineState *mms) qdev_prop_set_uint32(dev, "slots", XHCI_MAXSLOTS); qdev_prop_set_uint32(dev, "p2", 8); qdev_prop_set_uint32(dev, "p3", 8); + object_property_set_link(OBJECT(dev), "dma", + OBJECT(get_system_memory()), &error_fatal); sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MICROVM_XHCI_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 71f6629ccde..a959943d856 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -116,6 +116,8 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) dev->config[0x60] = 0x30; /* release number */ object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), &error_fatal); + object_property_set_link(OBJECT(dev), "dma", + OBJECT(pci_dma_memory_region(dev)), &error_fatal); s->xhci.intr_update = xhci_pci_intr_update; s->xhci.intr_raise = xhci_pci_intr_raise; if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { @@ -161,7 +163,6 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) &s->xhci.mem, 0, OFF_MSIX_PBA, 0x90, NULL); } - s->xhci.as = pci_get_address_space(dev); } static void usb_xhci_pci_exit(PCIDevice *dev) diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c index a14e4381960..f212ce785bd 100644 --- a/hw/usb/hcd-xhci-sysbus.c +++ b/hw/usb/hcd-xhci-sysbus.c @@ -36,6 +36,11 @@ static void xhci_sysbus_realize(DeviceState *dev, Error **errp) { XHCISysbusState *s = XHCI_SYSBUS(dev); + if (!s->xhci.dma_mr) { + error_setg(errp, TYPE_XHCI_SYSBUS " 'dma' link not set"); + return; + } + object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); if (!qdev_realize(DEVICE(&s->xhci), NULL, errp)) { return; @@ -43,13 +48,7 @@ static void xhci_sysbus_realize(DeviceState *dev, Error **errp) s->irq = g_new0(qemu_irq, s->xhci.numintrs); qdev_init_gpio_out_named(dev, s->irq, SYSBUS_DEVICE_GPIO_IRQ, s->xhci.numintrs); - if (s->xhci.dma_mr) { - s->xhci.as = g_malloc0(sizeof(AddressSpace)); - address_space_init(s->xhci.as, s->xhci.dma_mr, NULL); - } else { - s->xhci.as = &address_space_memory; - } - + address_space_init(&s->xhci.as, s->xhci.dma_mr, "usb-xhci-dma"); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->xhci.mem); } diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index e01700039b1..011f1233ef3 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -487,7 +487,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, dma_addr_t addr, assert((len % sizeof(uint32_t)) == 0); - dma_memory_read(xhci->as, addr, buf, len); + dma_memory_read(&xhci->as, addr, buf, len); for (i = 0; i < (len / sizeof(uint32_t)); i++) { buf[i] = le32_to_cpu(buf[i]); @@ -507,7 +507,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci, dma_addr_t addr, for (i = 0; i < n; i++) { tmp[i] = cpu_to_le32(buf[i]); } - dma_memory_write(xhci->as, addr, tmp, len); + dma_memory_write(&xhci->as, addr, tmp, len); } static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) @@ -618,7 +618,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v) ev_trb.status, ev_trb.control); addr = intr->er_start + TRB_SIZE*intr->er_ep_idx; - dma_memory_write(xhci->as, addr, &ev_trb, TRB_SIZE); + dma_memory_write(&xhci->as, addr, &ev_trb, TRB_SIZE); intr->er_ep_idx++; if (intr->er_ep_idx >= intr->er_size) { @@ -679,7 +679,7 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb, while (1) { TRBType type; - dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE); + dma_memory_read(&xhci->as, ring->dequeue, trb, TRB_SIZE); trb->addr = ring->dequeue; trb->ccs = ring->ccs; le64_to_cpus(&trb->parameter); @@ -726,7 +726,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring) while (1) { TRBType type; - dma_memory_read(xhci->as, dequeue, &trb, TRB_SIZE); + dma_memory_read(&xhci->as, dequeue, &trb, TRB_SIZE); le64_to_cpus(&trb.parameter); le32_to_cpus(&trb.status); le32_to_cpus(&trb.control); @@ -781,7 +781,7 @@ static void xhci_er_reset(XHCIState *xhci, int v) xhci_die(xhci); return; } - dma_memory_read(xhci->as, erstba, &seg, sizeof(seg)); + dma_memory_read(&xhci->as, erstba, &seg, sizeof(seg)); le32_to_cpus(&seg.addr_low); le32_to_cpus(&seg.addr_high); le32_to_cpus(&seg.size); @@ -1393,7 +1393,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, int in_xfer) int i; xfer->int_req = false; - qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, xhci->as); + qemu_sglist_init(&xfer->sgl, DEVICE(xhci), xfer->trb_count, &xhci->as); for (i = 0; i < xfer->trb_count; i++) { XHCITRB *trb = &xfer->trbs[i]; dma_addr_t addr; @@ -2059,7 +2059,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, unsigned int slotid, assert(slotid >= 1 && slotid <= xhci->numslots); dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high); - poctx = ldq_le_dma(xhci->as, dcbaap + 8 * slotid); + poctx = ldq_le_dma(&xhci->as, dcbaap + 8 * slotid); ictx = xhci_mask64(pictx); octx = xhci_mask64(poctx); @@ -2397,7 +2397,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState *xhci, uint64_t pctx) /* TODO: actually implement real values here */ bw_ctx[0] = 0; memset(&bw_ctx[1], 80, xhci->numports); /* 80% */ - dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); + dma_memory_write(&xhci->as, ctx, bw_ctx, sizeof(bw_ctx)); return CC_SUCCESS; } @@ -3434,7 +3434,7 @@ static int usb_xhci_post_load(void *opaque, int version_id) continue; } slot->ctx = - xhci_mask64(ldq_le_dma(xhci->as, dcbaap + 8 * slotid)); + xhci_mask64(ldq_le_dma(&xhci->as, dcbaap + 8 * slotid)); xhci_dma_read_u32s(xhci, slot->ctx, slot_ctx, sizeof(slot_ctx)); slot->uport = xhci_lookup_uport(xhci, slot_ctx); if (!slot->uport) { -- 2.31.1