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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT060.mail.protection.outlook.com (10.13.175.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4436.19 via Frontend Transport; Fri, 20 Aug 2021 05:33:07 +0000 Received: from rocm-perf01.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Fri, 20 Aug 2021 00:33:06 -0500 From: Joseph Greathouse To: CC: Joseph Greathouse Subject: [PATCH 3/3] drm/amdkfd: Spread out XGMI SDMA allocations Date: Fri, 20 Aug 2021 00:32:45 -0500 Message-ID: <20210820053245.340945-3-Joseph.Greathouse@amd.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210820053245.340945-1-Joseph.Greathouse@amd.com> References: <20210820053245.340945-1-Joseph.Greathouse@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: be10cdca-4624-403b-c96c-08d9639bfdd4 X-MS-TrafficTypeDiagnostic: MN2PR12MB4408: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(4636009)(136003)(39860400002)(346002)(396003)(376002)(36840700001)(46966006)(36860700001)(36756003)(83380400001)(426003)(2906002)(6916009)(70206006)(82740400003)(5660300002)(34020700004)(26005)(86362001)(478600001)(2616005)(7696005)(8936002)(70586007)(16526019)(47076005)(81166007)(336012)(4326008)(356005)(8676002)(186003)(82310400003)(1076003)(316002)(6666004)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2021 05:33:07.7738 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: be10cdca-4624-403b-c96c-08d9639bfdd4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4408 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Avoid hotspotting of allocations of SDMA engines from the XGMI pool by making each process attempt to allocate engines starting from the engine after the last one that was allocated. Signed-off-by: Joseph Greathouse --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 8 +++++++- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 2 ++ drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 + drivers/gpu/drm/amd/amdkfd/kfd_process.c | 1 + 4 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c index 86bdb765f350..7f06ad6bdcd2 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c @@ -1096,9 +1096,12 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm, return -ENOMEM; } } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) { + if (qpd->initial_xgmi_engine == -1) + qpd->initial_xgmi_engine = dqm->next_xgmi_engine; num_engines = get_num_xgmi_sdma_engines(dqm); for_each_set_bit(engine, &(qpd->xgmi_sdma_engine_bitmap), num_engines) { - available_queue_bitmap = sdma_engine_mask(engine, num_engines); + available_queue_bitmap = sdma_engine_mask( + qpd->initial_xgmi_engine + engine, num_engines); available_queue_bitmap &= dqm->xgmi_sdma_bitmap; if (!available_queue_bitmap) @@ -1109,6 +1112,9 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm, qpd->xgmi_sdma_engine_bitmap &= ~(1ULL << engine); found_sdma = true; + dqm->next_xgmi_engine = qpd->initial_xgmi_engine + engine + 1; + dqm->next_xgmi_engine %= num_engines; + bit = __ffs64(available_queue_bitmap); dqm->xgmi_sdma_bitmap &= ~(1ULL << bit); q->sdma_id = bit; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h index c8719682c4da..b5955e7401e5 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h @@ -183,6 +183,8 @@ struct device_queue_manager { unsigned int *allocated_queues; uint64_t sdma_bitmap; uint64_t xgmi_sdma_bitmap; + /* which XGMI engine the next process should attempt to start on */ + unsigned int next_xgmi_engine; /* the pasid mapping for each kfd vmid */ uint16_t vmid_pasid[VMID_NUM]; uint64_t pipelines_addr; diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h index c38eebc9db4d..bcf56280c7ed 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h @@ -578,6 +578,7 @@ struct qcm_process_device { unsigned int queue_count; unsigned long sdma_engine_bitmap; unsigned long xgmi_sdma_engine_bitmap; + int initial_xgmi_engine; unsigned int vmid; bool is_debug; unsigned int evicted; /* eviction counter, 0=active */ diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c index 13c85624bf7d..24ce1b52a1d5 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c @@ -1449,6 +1449,7 @@ struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, pdd->qpd.mapped_gws_queue = false; pdd->qpd.sdma_engine_bitmap = BIT_ULL(dev_info->num_sdma_engines) - 1; pdd->qpd.xgmi_sdma_engine_bitmap = BIT_ULL(dev_info->num_xgmi_sdma_engines) - 1; + pdd->qpd.initial_xgmi_engine = -1; pdd->process = p; pdd->bound = PDD_UNBOUND; pdd->already_dequeued = false; -- 2.20.1