* [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD
@ 2021-08-23 3:21 Vandita Kulkarni
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
` (5 more replies)
0 siblings, 6 replies; 18+ messages in thread
From: Vandita Kulkarni @ 2021-08-23 3:21 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Vandita Kulkarni
The delta from TGL is wrt the ESC clock, and an additional
WA needed. With that support in place, extend the support
for mipi dsi.
Vandita Kulkarni (2):
drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
drm/i915/dsi/xelpd: Enable mipi dsi support.
drivers/gpu/drm/i915/display/icl_dsi.c | 24 ++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 8 +++++++
3 files changed, 33 insertions(+)
--
2.32.0
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
@ 2021-08-23 3:21 ` Vandita Kulkarni
2021-08-23 4:38 ` [Intel-gfx] [v2] " Vandita Kulkarni
` (3 more replies)
2021-08-23 3:21 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support Vandita Kulkarni
` (4 subsequent siblings)
5 siblings, 4 replies; 18+ messages in thread
From: Vandita Kulkarni @ 2021-08-23 3:21 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Vandita Kulkarni
Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
field to account for the repeaters on the HS Request/Ready PPI signaling
between the Display engine and the DPHY.
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 24 ++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
2 files changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 43ec7fcd3f5d..61aea695c565 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1270,6 +1270,27 @@ static void icl_apply_kvmr_pipe_a_wa(struct intel_encoder *encoder,
IGNORE_KVMR_PIPE_A,
enable ? IGNORE_KVMR_PIPE_A : 0);
}
+
+/*
+ * Wa_16012360555:ADLP
+ * SW will have to program the "LP to HS Wakeup Guardband"
+ * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
+ * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
+ * on the HS Request/Ready PPI signaling between
+ * the Display engine and the DPHY.
+ */
+static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
+ enum port port;
+
+ if (DISPLAY_VER(dev_priv) == 13)
+ for_each_dsi_port(port, intel_dsi->ports)
+ intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
+ TGL_DSI_CHKN_LSHS_GB, 0x4);
+}
+
static void gen11_dsi_enable(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1283,6 +1304,9 @@ static void gen11_dsi_enable(struct intel_atomic_state *state,
/* Wa_1409054076:icl,jsl,ehl */
icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);
+ /* Wa_16012360555: adlp */
+ adlp_set_lp_hs_wakeup_gb(encoder);
+
/* step6d: enable dsi transcoder */
gen11_dsi_enable_transcoder(encoder);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 72dd3a6d205d..34ad288de748 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -11614,6 +11614,14 @@ enum skl_power_gate {
_ICL_DSI_IO_MODECTL_1)
#define COMBO_PHY_MODE_DSI (1 << 0)
+/* TGL DSI Chicken register */
+#define TGL_DSI_CHKN_REG_0 0x6B0C0
+#define TGL_DSI_CHKN_REG_1 0x6B8C0
+#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
+ _TGL_DSI_CHKN_REG_0, \
+ _TGL_DSI_CHKN_REG_1)
+#define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
+
/* Display Stream Splitter Control */
#define DSS_CTL1 _MMIO(0x67400)
#define SPLITTER_ENABLE (1 << 31)
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support.
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
@ 2021-08-23 3:21 ` Vandita Kulkarni
2021-08-25 12:07 ` Jani Nikula
2021-08-23 3:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 18+ messages in thread
From: Vandita Kulkarni @ 2021-08-23 3:21 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Vandita Kulkarni
Enable MIPI DSI support on ADL-P platform.
The esc clock changes, WA changes are taken care
in the previous patches.
As per the Bspec the seq remains to be same as TGL.
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a257e5dc381c..55142b9ec976 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11488,6 +11488,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_TC2);
intel_ddi_init(dev_priv, PORT_TC3);
intel_ddi_init(dev_priv, PORT_TC4);
+ icl_dsi_init(dev_priv);
} else if (IS_ALDERLAKE_S(dev_priv)) {
intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_TC1);
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
2021-08-23 3:21 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support Vandita Kulkarni
@ 2021-08-23 3:58 ` Patchwork
2021-08-23 4:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2) Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-08-23 3:58 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: Enable mipi dsi on XELPD
URL : https://patchwork.freedesktop.org/series/93917/
State : failure
== Summary ==
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/display/icl_dsi.o
In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10,
from drivers/gpu/drm/i915/display/icl_dsi.c:35:
drivers/gpu/drm/i915/display/icl_dsi.c: In function ‘adlp_set_lp_hs_wakeup_gb’:
./drivers/gpu/drm/i915/i915_reg.h:11623:11: error: ‘_TGL_DSI_CHKN_REG_0’ undeclared (first use in this function); did you mean ‘TGL_DSI_CHKN_REG_0’?
_TGL_DSI_CHKN_REG_0, \
^~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro ‘_MMIO’
#define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
^
./drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro ‘_PICK_EVEN’
#define _PORT(port, a, b) _PICK_EVEN(port, a, b)
^~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro ‘_PORT’
#define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
^~~~~
./drivers/gpu/drm/i915/i915_reg.h:11622:33: note: in expansion of macro ‘_MMIO_PORT’
#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro ‘TGL_DSI_CHKN_REG’
intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:11623:11: note: each undeclared identifier is reported only once for each function it appears in
_TGL_DSI_CHKN_REG_0, \
^~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro ‘_MMIO’
#define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
^
./drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro ‘_PICK_EVEN’
#define _PORT(port, a, b) _PICK_EVEN(port, a, b)
^~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro ‘_PORT’
#define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
^~~~~
./drivers/gpu/drm/i915/i915_reg.h:11622:33: note: in expansion of macro ‘_MMIO_PORT’
#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro ‘TGL_DSI_CHKN_REG’
intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
^~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:11624:11: error: ‘_TGL_DSI_CHKN_REG_1’ undeclared (first use in this function); did you mean ‘TGL_DSI_CHKN_REG_1’?
_TGL_DSI_CHKN_REG_1)
^~~~~~~~~~~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro ‘_MMIO’
#define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
^
./drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro ‘_PICK_EVEN’
#define _PORT(port, a, b) _PICK_EVEN(port, a, b)
^~~~~~~~~~
./drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro ‘_PORT’
#define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
^~~~~
./drivers/gpu/drm/i915/i915_reg.h:11622:33: note: in expansion of macro ‘_MMIO_PORT’
#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro ‘TGL_DSI_CHKN_REG’
intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: error: suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]
if (DISPLAY_VER(dev_priv) == 13)
^
cc1: all warnings being treated as errors
scripts/Makefile.build:271: recipe for target 'drivers/gpu/drm/i915/display/icl_dsi.o' failed
make[4]: *** [drivers/gpu/drm/i915/display/icl_dsi.o] Error 1
scripts/Makefile.build:514: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:514: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:514: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1851: recipe for target 'drivers' failed
make: *** [drivers] Error 2
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
@ 2021-08-23 4:38 ` Vandita Kulkarni
2021-08-25 14:08 ` Jani Nikula
2021-08-23 6:54 ` kernel test robot
` (2 subsequent siblings)
3 siblings, 1 reply; 18+ messages in thread
From: Vandita Kulkarni @ 2021-08-23 4:38 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Vandita Kulkarni
Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
field to account for the repeaters on the HS Request/Ready PPI signaling
between the Display engine and the DPHY.
v2: Fix build issue.
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 25 +++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 43ec7fcd3f5d..b075defb88bb 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1270,6 +1270,28 @@ static void icl_apply_kvmr_pipe_a_wa(struct intel_encoder *encoder,
IGNORE_KVMR_PIPE_A,
enable ? IGNORE_KVMR_PIPE_A : 0);
}
+
+/*
+ * Wa_16012360555:ADLP
+ * SW will have to program the "LP to HS Wakeup Guardband"
+ * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
+ * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
+ * on the HS Request/Ready PPI signaling between
+ * the Display engine and the DPHY.
+ */
+static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
+ enum port port;
+
+ if (DISPLAY_VER(dev_priv) == 13) {
+ for_each_dsi_port(port, intel_dsi->ports)
+ intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
+ TGL_DSI_CHKN_LSHS_GB, 0x4);
+ }
+}
+
static void gen11_dsi_enable(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -1283,6 +1305,9 @@ static void gen11_dsi_enable(struct intel_atomic_state *state,
/* Wa_1409054076:icl,jsl,ehl */
icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);
+ /* Wa_16012360555: adlp */
+ adlp_set_lp_hs_wakeup_gb(encoder);
+
/* step6d: enable dsi transcoder */
gen11_dsi_enable_transcoder(encoder);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 72dd3a6d205d..4c90d45343d6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -11614,6 +11614,14 @@ enum skl_power_gate {
_ICL_DSI_IO_MODECTL_1)
#define COMBO_PHY_MODE_DSI (1 << 0)
+/* TGL DSI Chicken register */
+#define _TGL_DSI_CHKN_REG_0 0x6B0C0
+#define _TGL_DSI_CHKN_REG_1 0x6B8C0
+#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
+ _TGL_DSI_CHKN_REG_0, \
+ _TGL_DSI_CHKN_REG_1)
+#define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
+
/* Display Stream Splitter Control */
#define DSS_CTL1 _MMIO(0x67400)
#define SPLITTER_ENABLE (1 << 31)
--
2.32.0
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2)
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
` (2 preceding siblings ...)
2021-08-23 3:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD Patchwork
@ 2021-08-23 4:59 ` Patchwork
2021-08-23 5:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-23 6:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-08-23 4:59 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
== Series Details ==
Series: Enable mipi dsi on XELPD (rev2)
URL : https://patchwork.freedesktop.org/series/93917/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1374:34: expected struct i915_address_space *vm
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1374:34: got struct i915_address_space [noderef] __rcu *vm
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1374:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: expected struct i915_address_space [noderef] __rcu *vm
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: got struct i915_address_space *
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:43:25: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: expected struct i915_address_space *vm
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: got struct i915_address_space [noderef] __rcu *vm
+drivers/gpu/drm/i915/gem/selftests/mock_context.c:60:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_ring_submission.c:1268:24: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+./include/linux/stddef.h:17:9: this was the original definition
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
+/usr/lib/gcc/x86_64-linux-gnu/8/include/stddef.h:417:9: warning: preprocessor token offsetof redefined
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Enable mipi dsi on XELPD (rev2)
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
` (3 preceding siblings ...)
2021-08-23 4:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2) Patchwork
@ 2021-08-23 5:29 ` Patchwork
2021-08-23 6:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-08-23 5:29 UTC (permalink / raw)
To: Vandita Kulkarni; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5724 bytes --]
== Series Details ==
Series: Enable mipi dsi on XELPD (rev2)
URL : https://patchwork.freedesktop.org/series/93917/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10506 -> Patchwork_20869
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/index.html
Known issues
------------
Here are the changes found in Patchwork_20869 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271]) +11 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][3] ([i915#1886] / [i915#2291])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_busy@basic@modeset:
- fi-tgl-1115g4: [PASS][4] -> [DMESG-WARN][5] ([i915#4002])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-tgl-1115g4/igt@kms_busy@basic@modeset.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-tgl-1115g4/igt@kms_busy@basic@modeset.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-kbl-7500u: [PASS][7] -> [DMESG-FAIL][8] ([i915#165])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-1115g4: [DMESG-WARN][10] ([i915#4002]) -> [PASS][11] +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4: [FAIL][12] ([i915#1888]) -> [DMESG-WARN][13] ([i915#4002])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html
* igt@kms_chamelium@dp-hpd-fast:
- fi-tgl-1115g4: [SKIP][14] ([fdo#111827] / [i915#1385]) -> [SKIP][15] ([fdo#111827])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-tgl-1115g4/igt@kms_chamelium@dp-hpd-fast.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-tgl-1115g4/igt@kms_chamelium@dp-hpd-fast.html
* igt@kms_psr@primary_page_flip:
- fi-tgl-1115g4: [SKIP][16] ([i915#1072]) -> [SKIP][17] ([i915#1072] / [i915#1385])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/fi-tgl-1115g4/igt@kms_psr@primary_page_flip.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/fi-tgl-1115g4/igt@kms_psr@primary_page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (38 -> 34)
------------------------------
Additional (1): fi-kbl-soraka
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan bat-jsl-1 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10506 -> Patchwork_20869
CI-20190529: 20190529
CI_DRM_10506: d6681095a2aa987fa64c6d0ed991674745589c06 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6181: e7a9ab2f21a67b1ab3f4093ec0bd775647308ba6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20869: 306fe7961b521e08fcc8f4e9dfa7d7d1daae9b3d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
306fe7961b52 drm/i915/dsi/xelpd: Enable mipi dsi support.
9b7bcf6ac19a drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/index.html
[-- Attachment #2: Type: text/html, Size: 7131 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Enable mipi dsi on XELPD (rev2)
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
` (4 preceding siblings ...)
2021-08-23 5:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-08-23 6:44 ` Patchwork
5 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2021-08-23 6:44 UTC (permalink / raw)
To: Kulkarni, Vandita; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30254 bytes --]
== Series Details ==
Series: Enable mipi dsi on XELPD (rev2)
URL : https://patchwork.freedesktop.org/series/93917/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10506_full -> Patchwork_20869_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_20869_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-apl: NOTRUN -> [DMESG-WARN][1] ([i915#180])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_ctx_persistence@legacy-engines-mixed:
- shard-snb: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +5 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-snb7/igt@gem_ctx_persistence@legacy-engines-mixed.html
* igt@gem_eio@unwedge-stress:
- shard-skl: [PASS][3] -> [TIMEOUT][4] ([i915#2369] / [i915#3063])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl6/igt@gem_eio@unwedge-stress.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl9/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][5] -> [FAIL][6] ([i915#2846])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-glk9/igt@gem_exec_fair@basic-deadline.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-glk8/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][7] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-glk7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-glk5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][12] -> [SKIP][13] ([fdo#109271]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][14] -> [SKIP][15] ([i915#2190])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-tglb1/igt@gem_huc_copy@huc-copy.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-tglb6/igt@gem_huc_copy@huc-copy.html
* igt@gem_media_vme:
- shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271]) +58 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@gem_media_vme.html
* igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#307])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb5/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][19] ([i915#2658])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl6/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-exhaustion:
- shard-skl: NOTRUN -> [WARN][20] ([i915#2658])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@gem_pwrite@basic-exhaustion.html
* igt@i915_selftest@live@gt_pm:
- shard-skl: NOTRUN -> [DMESG-FAIL][21] ([i915#1886] / [i915#2291])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@i915_selftest@live@gt_pm.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [PASS][22] -> [FAIL][23] ([i915#2521])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl9/igt@kms_async_flips@alternate-sync-async-flip.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl2/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][24] ([i915#3722])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3886]) +3 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +6 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
- shard-snb: NOTRUN -> [SKIP][27] ([fdo#109271]) +521 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-snb7/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html
* igt@kms_chamelium@hdmi-hpd-fast:
- shard-snb: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111827]) +27 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-snb7/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_chamelium@vga-hpd:
- shard-apl: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827]) +19 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl6/igt@kms_chamelium@vga-hpd.html
* igt@kms_color_chamelium@pipe-d-degamma:
- shard-skl: NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +5 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@kms_color_chamelium@pipe-d-degamma.html
* igt@kms_content_protection@lic:
- shard-apl: NOTRUN -> [TIMEOUT][31] ([i915#1319]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl1/igt@kms_content_protection@lic.html
* igt@kms_content_protection@uevent:
- shard-apl: NOTRUN -> [FAIL][32] ([i915#2105])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl6/igt@kms_content_protection@uevent.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: NOTRUN -> [FAIL][33] ([i915#2346])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@flip-vs-suspend-interruptible@b-dp1:
- shard-apl: [PASS][34] -> [DMESG-WARN][35] ([i915#180])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1:
- shard-skl: [PASS][36] -> [FAIL][37] ([i915#2122])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#2672])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][39] -> [FAIL][40] ([i915#1188])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-apl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#533])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][42] -> [FAIL][43] ([fdo#108145] / [i915#265])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][44] ([fdo#108145] / [i915#265]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][45] ([i915#265])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl1/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
- shard-skl: NOTRUN -> [FAIL][46] ([i915#265])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][47] ([fdo#108145] / [i915#265])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
- shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#2733])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
- shard-apl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#658]) +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#658]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl10/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][51] -> [SKIP][52] ([fdo#109441]) +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-apl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2437])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf_pmu@module-unload:
- shard-skl: [PASS][54] -> [DMESG-WARN][55] ([i915#1982] / [i915#262])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl4/igt@perf_pmu@module-unload.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl7/igt@perf_pmu@module-unload.html
* igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271]) +165 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html
* igt@sysfs_clients@busy:
- shard-skl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2994])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@sysfs_clients@busy.html
* igt@sysfs_clients@pidname:
- shard-apl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#2994]) +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@sysfs_clients@pidname.html
#### Possible fixes ####
* igt@gem_ctx_persistence@legacy-engines-hang@blt:
- {shard-rkl}: [FAIL][59] ([i915#2410]) -> [PASS][60] +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-5/igt@gem_ctx_persistence@legacy-engines-hang@blt.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-1/igt@gem_ctx_persistence@legacy-engines-hang@blt.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][61] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-tglb5/igt@gem_eio@unwedge-stress.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-tglb5/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][63] ([i915#2846]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][65] ([i915#2842]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb2/igt@gem_exec_fair@basic-none-share@rcs0.html
- {shard-rkl}: [FAIL][67] ([i915#2842]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-1/igt@gem_exec_fair@basic-none-share@rcs0.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-2/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-tglb: [FAIL][69] ([i915#2842]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs0.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-tglb2/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [FAIL][71] ([i915#2842]) -> [PASS][72] +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_reloc@basic-wc-read:
- shard-apl: [DMESG-WARN][73] ([i915#165]) -> [PASS][74] +12 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl1/igt@gem_exec_reloc@basic-wc-read.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@gem_exec_reloc@basic-wc-read.html
* igt@gem_exec_suspend@basic-s4-devices:
- {shard-rkl}: [INCOMPLETE][75] ([i915#3189] / [i915#3810]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-2/igt@gem_exec_suspend@basic-s4-devices.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-1/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [INCOMPLETE][77] ([i915#3921]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-snb5/igt@i915_selftest@live@hangcheck.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-snb7/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [DMESG-WARN][79] ([i915#180]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl8/igt@i915_suspend@fence-restore-untiled.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl1/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_color@pipe-c-ctm-0-75:
- shard-skl: [DMESG-WARN][81] ([i915#1982]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl8/igt@kms_color@pipe-c-ctm-0-75.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl4/igt@kms_color@pipe-c-ctm-0-75.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
- shard-apl: [DMESG-WARN][83] ([i915#203]) -> [PASS][84] +8 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl1/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-skl: [FAIL][85] ([i915#2346]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1:
- shard-skl: [FAIL][87] ([i915#2122]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl4/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl7/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
- shard-glk: [FAIL][89] ([i915#79]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-glk7/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][91] ([i915#1188]) -> [PASS][92] +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid:
- shard-apl: [DMESG-WARN][93] ([i915#165] / [i915#180] / [i915#62]) -> [PASS][94] +23 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][95] ([fdo#108145] / [i915#265]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_cursor@pipe-a-overlay-size-64:
- shard-apl: [DMESG-WARN][97] ([i915#180] / [i915#203] / [i915#62]) -> [PASS][98] +2 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl1/igt@kms_plane_cursor@pipe-a-overlay-size-64.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@kms_plane_cursor@pipe-a-overlay-size-64.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][99] ([fdo#109441]) -> [PASS][100] +2 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb3/igt@kms_psr@psr2_sprite_plane_move.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][101] ([i915#180] / [i915#295]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-skl: [INCOMPLETE][103] ([i915#198] / [i915#2828]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl3/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
* igt@perf@blocking-parameterized:
- {shard-rkl}: [FAIL][105] ([i915#3793]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-5/igt@perf@blocking-parameterized.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-1/igt@perf@blocking-parameterized.html
* igt@perf@polling-parameterized:
- shard-glk: [FAIL][107] ([i915#1542]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-glk8/igt@perf@polling-parameterized.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-glk1/igt@perf@polling-parameterized.html
* igt@perf@polling-small-buf:
- shard-skl: [FAIL][109] ([i915#1722]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl7/igt@perf@polling-small-buf.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl1/igt@perf@polling-small-buf.html
* igt@sysfs_timeslice_duration@timeout@rcs0:
- {shard-rkl}: [FAIL][111] ([i915#3259]) -> [PASS][112] +3 similar issues
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-rkl-5/igt@sysfs_timeslice_duration@timeout@rcs0.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-rkl-1/igt@sysfs_timeslice_duration@timeout@rcs0.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][113] ([i915#2684]) -> [WARN][114] ([i915#1804] / [i915#2684])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb7/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][115] ([i915#1804] / [i915#2684]) -> [WARN][116] ([i915#2684])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-skl: [FAIL][117] ([i915#3743]) -> [FAIL][118] ([i915#3722])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][119] ([i915#2920]) -> [SKIP][120] ([i915#658])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2:
- shard-iclb: [SKIP][121] ([i915#658]) -> [SKIP][122] ([i915#2920]) +2 similar issues
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-2.html
* igt@runner@aborted:
- shard-apl: ([FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][127], [FAIL][128], [FAIL][129]) ([i915#180] / [i915#3002] / [i915#3363])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl2/igt@runner@aborted.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl3/igt@runner@aborted.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl3/igt@runner@aborted.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-apl8/igt@runner@aborted.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl7/igt@runner@aborted.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl8/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-apl3/igt@runner@aborted.html
- shard-skl: [FAIL][130] ([i915#3002] / [i915#3363]) -> ([FAIL][131], [FAIL][132]) ([i915#2029] / [i915#3002] / [i915#3363])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10506/shard-skl8/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl3/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/shard-skl3/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#203]: https://gitlab.freedesktop.org/drm/intel/issues/203
[i915#2105]: https://gitlab.freedesktop.org/drm/intel/issues/2105
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2733]: https://gitlab.freedesktop.org/drm/intel/issues/2733
[i915#2828]: https://gitlab.freedesktop.org/drm/intel/issues/2828
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#307]: https://gitlab.freedesktop.org/drm/intel/issues/307
[i915#3189]: https://gitlab.freedesktop.org/drm/intel/issues/3189
[i915#3259]: https://gitlab.freedesktop.org/drm/intel/issues/3259
[i915#3343]: https://gitlab.freedesktop.org/drm/intel/issues/3343
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3648]: https://gitlab.freedesktop.org/drm/intel/issues/3648
[i915#3722]: https://gitlab.freedesktop.org/drm/intel/issues/3722
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3793]: https://gitlab.freedesktop.org/drm/intel/issues/3793
[i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
[i915#3811]: https://gitlab.freedesktop.org/drm/intel/issues/3811
[i
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20869/index.html
[-- Attachment #2: Type: text/html, Size: 37240 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
@ 2021-08-23 6:54 ` kernel test robot
2021-08-23 6:54 ` kernel test robot
` (2 subsequent siblings)
3 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 6:54 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: kbuild-all, jani.nikula, Vandita Kulkarni
[-- Attachment #1: Type: text/plain, Size: 6431 bytes --]
Hi Vandita,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a006-20210822 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10,
from drivers/gpu/drm/i915/display/icl_dsi.c:35:
drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb':
drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'?
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'?
11620 | _TGL_DSI_CHKN_REG_1)
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: error: suggest explicit braces to avoid ambiguous 'else' [-Werror=dangling-else]
1288 | if (DISPLAY_VER(dev_priv) == 13)
| ^
cc1: all warnings being treated as errors
vim +/else +1288 drivers/gpu/drm/i915/display/icl_dsi.c
1273
1274 /*
1275 * Wa_16012360555:ADLP
1276 * SW will have to program the "LP to HS Wakeup Guardband"
1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
1279 * on the HS Request/Ready PPI signaling between
1280 * the Display engine and the DPHY.
1281 */
1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
1283 {
1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1286 enum port port;
1287
> 1288 if (DISPLAY_VER(dev_priv) == 13)
1289 for_each_dsi_port(port, intel_dsi->ports)
> 1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
1291 TGL_DSI_CHKN_LSHS_GB, 0x4);
1292 }
1293
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
@ 2021-08-23 6:54 ` kernel test robot
0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 6:54 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6551 bytes --]
Hi Vandita,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a006-20210822 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10,
from drivers/gpu/drm/i915/display/icl_dsi.c:35:
drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb':
drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'?
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'?
11620 | _TGL_DSI_CHKN_REG_1)
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: error: suggest explicit braces to avoid ambiguous 'else' [-Werror=dangling-else]
1288 | if (DISPLAY_VER(dev_priv) == 13)
| ^
cc1: all warnings being treated as errors
vim +/else +1288 drivers/gpu/drm/i915/display/icl_dsi.c
1273
1274 /*
1275 * Wa_16012360555:ADLP
1276 * SW will have to program the "LP to HS Wakeup Guardband"
1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
1279 * on the HS Request/Ready PPI signaling between
1280 * the Display engine and the DPHY.
1281 */
1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
1283 {
1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1286 enum port port;
1287
> 1288 if (DISPLAY_VER(dev_priv) == 13)
1289 for_each_dsi_port(port, intel_dsi->ports)
> 1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
1291 TGL_DSI_CHKN_LSHS_GB, 0x4);
1292 }
1293
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
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^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
@ 2021-08-23 7:40 ` kernel test robot
2021-08-23 6:54 ` kernel test robot
` (2 subsequent siblings)
3 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 7:40 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx
Cc: clang-built-linux, kbuild-all, jani.nikula, Vandita Kulkarni
[-- Attachment #1: Type: text/plain, Size: 4417 bytes --]
Hi Vandita,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a015-20210822 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 79b55e5038324e61a3abf4e6a9a949c473edd858)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_0'
intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
^
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_0, \
^
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_1'
drivers/gpu/drm/i915/i915_reg.h:11620:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_1)
^
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_0'
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_0, \
^
>> drivers/gpu/drm/i915/display/icl_dsi.c:1289:3: warning: add explicit braces to avoid dangling else [-Wdangling-else]
for_each_dsi_port(port, intel_dsi->ports)
^
drivers/gpu/drm/i915/display/intel_dsi.h:145:2: note: expanded from macro 'for_each_dsi_port'
for_each_port_masked(__port, __ports_mask)
^
drivers/gpu/drm/i915/display/intel_display.h:374:3: note: expanded from macro 'for_each_port_masked'
for_each_if((__ports_mask) & BIT(__port))
^
include/drm/drm_util.h:63:53: note: expanded from macro 'for_each_if'
#define for_each_if(condition) if (!(condition)) {} else
^
1 warning and 3 errors generated.
vim +1289 drivers/gpu/drm/i915/display/icl_dsi.c
1273
1274 /*
1275 * Wa_16012360555:ADLP
1276 * SW will have to program the "LP to HS Wakeup Guardband"
1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
1279 * on the HS Request/Ready PPI signaling between
1280 * the Display engine and the DPHY.
1281 */
1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
1283 {
1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1286 enum port port;
1287
1288 if (DISPLAY_VER(dev_priv) == 13)
> 1289 for_each_dsi_port(port, intel_dsi->ports)
1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
1291 TGL_DSI_CHKN_LSHS_GB, 0x4);
1292 }
1293
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 37549 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
@ 2021-08-23 7:40 ` kernel test robot
0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 7:40 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 4505 bytes --]
Hi Vandita,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a015-20210822 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 79b55e5038324e61a3abf4e6a9a949c473edd858)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_0'
intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
^
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_0, \
^
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_1'
drivers/gpu/drm/i915/i915_reg.h:11620:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_1)
^
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: error: use of undeclared identifier '_TGL_DSI_CHKN_REG_0'
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: expanded from macro 'TGL_DSI_CHKN_REG'
_TGL_DSI_CHKN_REG_0, \
^
>> drivers/gpu/drm/i915/display/icl_dsi.c:1289:3: warning: add explicit braces to avoid dangling else [-Wdangling-else]
for_each_dsi_port(port, intel_dsi->ports)
^
drivers/gpu/drm/i915/display/intel_dsi.h:145:2: note: expanded from macro 'for_each_dsi_port'
for_each_port_masked(__port, __ports_mask)
^
drivers/gpu/drm/i915/display/intel_display.h:374:3: note: expanded from macro 'for_each_port_masked'
for_each_if((__ports_mask) & BIT(__port))
^
include/drm/drm_util.h:63:53: note: expanded from macro 'for_each_if'
#define for_each_if(condition) if (!(condition)) {} else
^
1 warning and 3 errors generated.
vim +1289 drivers/gpu/drm/i915/display/icl_dsi.c
1273
1274 /*
1275 * Wa_16012360555:ADLP
1276 * SW will have to program the "LP to HS Wakeup Guardband"
1277 * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
1278 * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
1279 * on the HS Request/Ready PPI signaling between
1280 * the Display engine and the DPHY.
1281 */
1282 static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
1283 {
1284 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1285 struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
1286 enum port port;
1287
1288 if (DISPLAY_VER(dev_priv) == 13)
> 1289 for_each_dsi_port(port, intel_dsi->ports)
1290 intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
1291 TGL_DSI_CHKN_LSHS_GB, 0x4);
1292 }
1293
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 37549 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
@ 2021-08-23 7:47 ` kernel test robot
2021-08-23 6:54 ` kernel test robot
` (2 subsequent siblings)
3 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 7:47 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: kbuild-all, jani.nikula, Vandita Kulkarni
[-- Attachment #1: Type: text/plain, Size: 5945 bytes --]
Hi Vandita,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a005-20210822 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
mkdir build_dir
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10,
from drivers/gpu/drm/i915/display/icl_dsi.c:35:
drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb':
>> drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'?
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'?
11620 | _TGL_DSI_CHKN_REG_1)
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: warning: suggest explicit braces to avoid ambiguous 'else' [-Wdangling-else]
1288 | if (DISPLAY_VER(dev_priv) == 13)
| ^
vim +11619 drivers/gpu/drm/i915/i915_reg.h
11614
11615 /* TGL DSI Chicken register */
11616 #define TGL_DSI_CHKN_REG_0 0x6B0C0
11617 #define TGL_DSI_CHKN_REG_1 0x6B8C0
11618 #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
11619 _TGL_DSI_CHKN_REG_0, \
11620 _TGL_DSI_CHKN_REG_1)
11621 #define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
11622
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39900 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
@ 2021-08-23 7:47 ` kernel test robot
0 siblings, 0 replies; 18+ messages in thread
From: kernel test robot @ 2021-08-23 7:47 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6051 bytes --]
Hi Vandita,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip next-20210820]
[cannot apply to v5.14-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a005-20210822 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# https://github.com/0day-ci/linux/commit/d75ce0657c5bed32b206ab0461ea42eea7514436
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Vandita-Kulkarni/Enable-mipi-dsi-on-XELPD/20210823-112313
git checkout d75ce0657c5bed32b206ab0461ea42eea7514436
# save the attached .config to linux build tree
mkdir build_dir
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/display/intel_ddi.h:10,
from drivers/gpu/drm/i915/display/icl_dsi.c:35:
drivers/gpu/drm/i915/display/icl_dsi.c: In function 'adlp_set_lp_hs_wakeup_gb':
>> drivers/gpu/drm/i915/i915_reg.h:11619:11: error: '_TGL_DSI_CHKN_REG_0' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_0'?
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:11619:11: note: each undeclared identifier is reported only once for each function it appears in
11619 | _TGL_DSI_CHKN_REG_0, \
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/i915_reg.h:11620:11: error: '_TGL_DSI_CHKN_REG_1' undeclared (first use in this function); did you mean 'TGL_DSI_CHKN_REG_1'?
11620 | _TGL_DSI_CHKN_REG_1)
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:185:47: note: in definition of macro '_MMIO'
185 | #define _MMIO(r) ((const i915_reg_t){ .reg = (r) })
| ^
drivers/gpu/drm/i915/i915_reg.h:231:28: note: in expansion of macro '_PICK_EVEN'
231 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b)
| ^~~~~~~~~~
drivers/gpu/drm/i915/i915_reg.h:238:39: note: in expansion of macro '_PORT'
238 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
| ^~~~~
drivers/gpu/drm/i915/i915_reg.h:11618:33: note: in expansion of macro '_MMIO_PORT'
11618 | #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
| ^~~~~~~~~~
drivers/gpu/drm/i915/display/icl_dsi.c:1290:27: note: in expansion of macro 'TGL_DSI_CHKN_REG'
1290 | intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
| ^~~~~~~~~~~~~~~~
>> drivers/gpu/drm/i915/display/icl_dsi.c:1288:5: warning: suggest explicit braces to avoid ambiguous 'else' [-Wdangling-else]
1288 | if (DISPLAY_VER(dev_priv) == 13)
| ^
vim +11619 drivers/gpu/drm/i915/i915_reg.h
11614
11615 /* TGL DSI Chicken register */
11616 #define TGL_DSI_CHKN_REG_0 0x6B0C0
11617 #define TGL_DSI_CHKN_REG_1 0x6B8C0
11618 #define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
11619 _TGL_DSI_CHKN_REG_0, \
11620 _TGL_DSI_CHKN_REG_1)
11621 #define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
11622
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 39900 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support.
2021-08-23 3:21 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support Vandita Kulkarni
@ 2021-08-25 12:07 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2021-08-25 12:07 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: Vandita Kulkarni
On Mon, 23 Aug 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> Enable MIPI DSI support on ADL-P platform.
> The esc clock changes, WA changes are taken care
> in the previous patches.
> As per the Bspec the seq remains to be same as TGL.
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a257e5dc381c..55142b9ec976 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11488,6 +11488,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> intel_ddi_init(dev_priv, PORT_TC2);
> intel_ddi_init(dev_priv, PORT_TC3);
> intel_ddi_init(dev_priv, PORT_TC4);
> + icl_dsi_init(dev_priv);
> } else if (IS_ALDERLAKE_S(dev_priv)) {
> intel_ddi_init(dev_priv, PORT_A);
> intel_ddi_init(dev_priv, PORT_TC1);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-23 4:38 ` [Intel-gfx] [v2] " Vandita Kulkarni
@ 2021-08-25 14:08 ` Jani Nikula
2021-08-26 5:59 ` Kulkarni, Vandita
0 siblings, 1 reply; 18+ messages in thread
From: Jani Nikula @ 2021-08-25 14:08 UTC (permalink / raw)
To: Vandita Kulkarni, intel-gfx; +Cc: Vandita Kulkarni
On Mon, 23 Aug 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
> field to account for the repeaters on the HS Request/Ready PPI signaling
> between the Display engine and the DPHY.
>
> v2: Fix build issue.
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 25 +++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 43ec7fcd3f5d..b075defb88bb 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1270,6 +1270,28 @@ static void icl_apply_kvmr_pipe_a_wa(struct intel_encoder *encoder,
> IGNORE_KVMR_PIPE_A,
> enable ? IGNORE_KVMR_PIPE_A : 0);
> }
> +
> +/*
> + * Wa_16012360555:ADLP
It should be adl-p, i.e. lower case and with a hyphen.
> + * SW will have to program the "LP to HS Wakeup Guardband"
> + * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
> + * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
> + * on the HS Request/Ready PPI signaling between
> + * the Display engine and the DPHY.
> + */
I think that's a bit verbose for the comment. In particular the register
addresses and bits and values are redundant with the code.
> +static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
i915 variable name is preferred for all new code.
> + struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> + enum port port;
> +
> + if (DISPLAY_VER(dev_priv) == 13) {
> + for_each_dsi_port(port, intel_dsi->ports)
> + intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
> + TGL_DSI_CHKN_LSHS_GB, 0x4);
> + }
> +}
> +
> static void gen11_dsi_enable(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> @@ -1283,6 +1305,9 @@ static void gen11_dsi_enable(struct intel_atomic_state *state,
> /* Wa_1409054076:icl,jsl,ehl */
> icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);
>
> + /* Wa_16012360555: adlp */
No space after : and adl-p.
> + adlp_set_lp_hs_wakeup_gb(encoder);
> +
> /* step6d: enable dsi transcoder */
> gen11_dsi_enable_transcoder(encoder);
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 72dd3a6d205d..4c90d45343d6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -11614,6 +11614,14 @@ enum skl_power_gate {
> _ICL_DSI_IO_MODECTL_1)
> #define COMBO_PHY_MODE_DSI (1 << 0)
>
> +/* TGL DSI Chicken register */
> +#define _TGL_DSI_CHKN_REG_0 0x6B0C0
> +#define _TGL_DSI_CHKN_REG_1 0x6B8C0
> +#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
> + _TGL_DSI_CHKN_REG_0, \
> + _TGL_DSI_CHKN_REG_1)
> +#define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
Please use REG_GENMASK(15, 12)
With the issues fixed,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> +
> /* Display Stream Splitter Control */
> #define DSS_CTL1 _MMIO(0x67400)
> #define SPLITTER_ENABLE (1 << 31)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-25 14:08 ` Jani Nikula
@ 2021-08-26 5:59 ` Kulkarni, Vandita
2021-09-01 7:45 ` Kulkarni, Vandita
0 siblings, 1 reply; 18+ messages in thread
From: Kulkarni, Vandita @ 2021-08-26 5:59 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx
Thanks for the review. Have fixed in the latest version, will merge once CI is green.
> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Wednesday, August 25, 2021 7:38 PM
> To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>
> Subject: Re: [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup
> guardband
>
> On Mon, 23 Aug 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> > Wa_16012360555 SW will have to program the "LP to HS Wakeup
> Guardband"
> > field to account for the repeaters on the HS Request/Ready PPI
> > signaling between the Display engine and the DPHY.
> >
> > v2: Fix build issue.
> >
> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/icl_dsi.c | 25
> +++++++++++++++++++++++++
> > drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
> > 2 files changed, 33 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> > b/drivers/gpu/drm/i915/display/icl_dsi.c
> > index 43ec7fcd3f5d..b075defb88bb 100644
> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > @@ -1270,6 +1270,28 @@ static void icl_apply_kvmr_pipe_a_wa(struct
> intel_encoder *encoder,
> > IGNORE_KVMR_PIPE_A,
> > enable ? IGNORE_KVMR_PIPE_A : 0); }
> > +
> > +/*
> > + * Wa_16012360555:ADLP
>
> It should be adl-p, i.e. lower case and with a hyphen.
>
> > + * SW will have to program the "LP to HS Wakeup Guardband"
> > + * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
> > + * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
> > + * on the HS Request/Ready PPI signaling between
> > + * the Display engine and the DPHY.
> > + */
>
> I think that's a bit verbose for the comment. In particular the register
> addresses and bits and values are redundant with the code.
>
> > +static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder) {
> > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> i915 variable name is preferred for all new code.
>
> > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> > + enum port port;
> > +
> > + if (DISPLAY_VER(dev_priv) == 13) {
> > + for_each_dsi_port(port, intel_dsi->ports)
> > + intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
> > + TGL_DSI_CHKN_LSHS_GB, 0x4);
> > + }
> > +}
> > +
> > static void gen11_dsi_enable(struct intel_atomic_state *state,
> > struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state, @@ -
> 1283,6 +1305,9
> > @@ static void gen11_dsi_enable(struct intel_atomic_state *state,
> > /* Wa_1409054076:icl,jsl,ehl */
> > icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);
> >
> > + /* Wa_16012360555: adlp */
>
> No space after : and adl-p.
>
> > + adlp_set_lp_hs_wakeup_gb(encoder);
> > +
> > /* step6d: enable dsi transcoder */
> > gen11_dsi_enable_transcoder(encoder);
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h index 72dd3a6d205d..4c90d45343d6
> > 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -11614,6 +11614,14 @@ enum skl_power_gate {
> > _ICL_DSI_IO_MODECTL_1)
> > #define COMBO_PHY_MODE_DSI (1 << 0)
> >
> > +/* TGL DSI Chicken register */
> > +#define _TGL_DSI_CHKN_REG_0 0x6B0C0
> > +#define _TGL_DSI_CHKN_REG_1 0x6B8C0
> > +#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port, \
> > + _TGL_DSI_CHKN_REG_0, \
> > + _TGL_DSI_CHKN_REG_1)
> > +#define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
>
> Please use REG_GENMASK(15, 12)
>
> With the issues fixed,
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
>
> > +
> > /* Display Stream Splitter Control */
> > #define DSS_CTL1 _MMIO(0x67400)
> > #define SPLITTER_ENABLE (1 << 31)
>
> --
> Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
2021-08-26 5:59 ` Kulkarni, Vandita
@ 2021-09-01 7:45 ` Kulkarni, Vandita
0 siblings, 0 replies; 18+ messages in thread
From: Kulkarni, Vandita @ 2021-09-01 7:45 UTC (permalink / raw)
To: Kulkarni, Vandita, Nikula, Jani, intel-gfx
Thanks for the review, patches pushed.
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Kulkarni, Vandita
> Sent: Thursday, August 26, 2021 11:30 AM
> To: Nikula, Jani <jani.nikula@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS
> wakeup guardband
>
> Thanks for the review. Have fixed in the latest version, will merge once CI is
> green.
> > -----Original Message-----
> > From: Nikula, Jani <jani.nikula@intel.com>
> > Sent: Wednesday, August 25, 2021 7:38 PM
> > To: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>
> > Subject: Re: [v2] drm/i915/dsi/xelpd: Add WA to program LP to HS
> > wakeup guardband
> >
> > On Mon, 23 Aug 2021, Vandita Kulkarni <vandita.kulkarni@intel.com>
> wrote:
> > > Wa_16012360555 SW will have to program the "LP to HS Wakeup
> > Guardband"
> > > field to account for the repeaters on the HS Request/Ready PPI
> > > signaling between the Display engine and the DPHY.
> > >
> > > v2: Fix build issue.
> > >
> > > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/icl_dsi.c | 25
> > +++++++++++++++++++++++++
> > > drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
> > > 2 files changed, 33 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> > > b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > index 43ec7fcd3f5d..b075defb88bb 100644
> > > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > @@ -1270,6 +1270,28 @@ static void icl_apply_kvmr_pipe_a_wa(struct
> > intel_encoder *encoder,
> > > IGNORE_KVMR_PIPE_A,
> > > enable ? IGNORE_KVMR_PIPE_A : 0); }
> > > +
> > > +/*
> > > + * Wa_16012360555:ADLP
> >
> > It should be adl-p, i.e. lower case and with a hyphen.
> >
> > > + * SW will have to program the "LP to HS Wakeup Guardband"
> > > + * field (bits 15:12) of register offset 0x6B0C0 (DSI0)
> > > + * and 0x6B8C0 (DSI1) to a value of 4 to account for the repeaters
> > > + * on the HS Request/Ready PPI signaling between
> > > + * the Display engine and the DPHY.
> > > + */
> >
> > I think that's a bit verbose for the comment. In particular the
> > register addresses and bits and values are redundant with the code.
> >
> > > +static void adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
> {
> > > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >
> > i915 variable name is preferred for all new code.
> >
> > > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> > > + enum port port;
> > > +
> > > + if (DISPLAY_VER(dev_priv) == 13) {
> > > + for_each_dsi_port(port, intel_dsi->ports)
> > > + intel_de_rmw(dev_priv, TGL_DSI_CHKN_REG(port),
> > > + TGL_DSI_CHKN_LSHS_GB, 0x4);
> > > + }
> > > +}
> > > +
> > > static void gen11_dsi_enable(struct intel_atomic_state *state,
> > > struct intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state, @@ -
> > 1283,6 +1305,9
> > > @@ static void gen11_dsi_enable(struct intel_atomic_state *state,
> > > /* Wa_1409054076:icl,jsl,ehl */
> > > icl_apply_kvmr_pipe_a_wa(encoder, crtc->pipe, true);
> > >
> > > + /* Wa_16012360555: adlp */
> >
> > No space after : and adl-p.
> >
> > > + adlp_set_lp_hs_wakeup_gb(encoder);
> > > +
> > > /* step6d: enable dsi transcoder */
> > > gen11_dsi_enable_transcoder(encoder);
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h index 72dd3a6d205d..4c90d45343d6
> > > 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -11614,6 +11614,14 @@ enum skl_power_gate {
> > > _ICL_DSI_IO_MODECTL_1)
> > > #define COMBO_PHY_MODE_DSI (1 << 0)
> > >
> > > +/* TGL DSI Chicken register */
> > > +#define _TGL_DSI_CHKN_REG_0 0x6B0C0
> > > +#define _TGL_DSI_CHKN_REG_1 0x6B8C0
> > > +#define TGL_DSI_CHKN_REG(port) _MMIO_PORT(port,
> \
> > > + _TGL_DSI_CHKN_REG_0, \
> > > + _TGL_DSI_CHKN_REG_1)
> > > +#define TGL_DSI_CHKN_LSHS_GB (0xF << 12)
> >
> > Please use REG_GENMASK(15, 12)
> >
> > With the issues fixed,
> >
> > Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> >
> >
> > > +
> > > /* Display Stream Splitter Control */
> > > #define DSS_CTL1 _MMIO(0x67400)
> > > #define SPLITTER_ENABLE (1 << 31)
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2021-09-01 7:45 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-23 3:21 [Intel-gfx] [PATCH 0/2] Enable mipi dsi on XELPD Vandita Kulkarni
2021-08-23 3:21 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband Vandita Kulkarni
2021-08-23 4:38 ` [Intel-gfx] [v2] " Vandita Kulkarni
2021-08-25 14:08 ` Jani Nikula
2021-08-26 5:59 ` Kulkarni, Vandita
2021-09-01 7:45 ` Kulkarni, Vandita
2021-08-23 6:54 ` [Intel-gfx] [PATCH 1/2] " kernel test robot
2021-08-23 6:54 ` kernel test robot
2021-08-23 7:40 ` kernel test robot
2021-08-23 7:40 ` kernel test robot
2021-08-23 7:47 ` kernel test robot
2021-08-23 7:47 ` kernel test robot
2021-08-23 3:21 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsi/xelpd: Enable mipi dsi support Vandita Kulkarni
2021-08-25 12:07 ` Jani Nikula
2021-08-23 3:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable mipi dsi on XELPD Patchwork
2021-08-23 4:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable mipi dsi on XELPD (rev2) Patchwork
2021-08-23 5:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-23 6:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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