From: lik008@sina.com
To: eric.auger@redhat.com, peter.maydell@linaro.org
Cc: renwei.liu@verisilicon.com, qemu-arm@nongnu.org,
jianxian.wen@verisilicon.com, qemu-devel@nongnu.org,
LCM <chunming.li@verisilicon.com>
Subject: [PATCH v3 0/4] hw/arm/smmuv3: Support non PCI/PCIe devices
Date: Tue, 24 Aug 2021 09:57:30 +0800 [thread overview]
Message-ID: <20210824015732.1810-1-lik008@sina.com> (raw)
From: LCM <chunming.li@verisilicon.com>
The current SMMU v3 model only support PCI/PCIe devices, so we update it for
non-PCI/PCIe devices.
. Add independent IOMMU memory regions for non-PCI/PCIe devices
. Add SID value property setting for non-PCI/PCIe devices
. Add PL330 DMA controller into "virt" machine and connect with SMMU v3
. Test PL330 DMA controller and PCIe e1000 network with SMMU v3 enabled
Notes:
You need apply PL330 memory region patch before compile "virt" machine:
https://patchew.org/QEMU/4C23C17B8E87E74E906A25A3254A03F4FA1FEC31@SHASXM03.verisilicon.com/
The old PL330 model cannot configure its memory region manually.
So we update it and provide path.
The patch was reviewed and will be merged in target-arm.next for 6.2.
LCM (4):
hw/arm/smmuv3: Support non PCI/PCIe device connect with SMMU v3
hw/arm/smmuv3: Update implementation of CFGI commands based on device
SID
hw/arm/virt: Update SMMU v3 creation to support non PCI/PCIe device
connection
hw/arm/virt: Add PL330 DMA controller and connect with SMMU v3
hw/arm/smmuv3.c | 81 ++++++++++++++++++--------
hw/arm/virt.c | 108 ++++++++++++++++++++++++++++++++++-
include/hw/arm/smmu-common.h | 12 +++-
include/hw/arm/smmuv3.h | 2 +
include/hw/arm/virt.h | 3 +
5 files changed, 178 insertions(+), 28 deletions(-)
--
next reply other threads:[~2021-08-24 12:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 1:57 lik008 [this message]
-- strict thread matches above, loose matches on Subject: below --
2021-08-23 9:14 [PATCH v3 0/4] hw/arm/smmuv3: Support non PCI/PCIe devices Li, Chunming
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