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From: Eugen Hristev <eugen.hristev@microchip.com>
To: <jic23@kernel.org>, <linux-iio@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <nicolas.ferre@microchip.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
	<ludovic.desroches@microchip.com>,
	Eugen Hristev <eugen.hristev@microchip.com>
Subject: [PATCH v2 09/10] ARM: dts: at91: sama7g5: add node for the ADC
Date: Tue, 24 Aug 2021 14:54:40 +0300	[thread overview]
Message-ID: <20210824115441.681253-10-eugen.hristev@microchip.com> (raw)
In-Reply-To: <20210824115441.681253-1-eugen.hristev@microchip.com>

Add node for the ADC controller in sama7g5 SoC.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f9ad5365862f..de960519c72a 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
 			clocks = <&clk32k 0>;
 		};
 
+		adc: adc@e1000000 {
+			compatible = "microchip,sama7g5-adc";
+			reg = <0xe1000000 0x200>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clock-rates = <100000000>;
+			clock-names = "adc_clk";
+			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+			dma-names = "rx";
+			atmel,min-sample-rate-hz = <200000>;
+			atmel,max-sample-rate-hz = <20000000>;
+			atmel,startup-time-ms = <4>;
+			status = "disabled";
+		};
+
 		sdmmc0: mmc@e1204000 {
 			compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 			reg = <0xe1204000 0x4000>;
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Eugen Hristev <eugen.hristev@microchip.com>
To: <jic23@kernel.org>, <linux-iio@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <nicolas.ferre@microchip.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
	<ludovic.desroches@microchip.com>,
	Eugen Hristev <eugen.hristev@microchip.com>
Subject: [PATCH v2 09/10] ARM: dts: at91: sama7g5: add node for the ADC
Date: Tue, 24 Aug 2021 14:54:40 +0300	[thread overview]
Message-ID: <20210824115441.681253-10-eugen.hristev@microchip.com> (raw)
In-Reply-To: <20210824115441.681253-1-eugen.hristev@microchip.com>

Add node for the ADC controller in sama7g5 SoC.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f9ad5365862f..de960519c72a 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
 			clocks = <&clk32k 0>;
 		};
 
+		adc: adc@e1000000 {
+			compatible = "microchip,sama7g5-adc";
+			reg = <0xe1000000 0x200>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+			assigned-clock-rates = <100000000>;
+			clock-names = "adc_clk";
+			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+			dma-names = "rx";
+			atmel,min-sample-rate-hz = <200000>;
+			atmel,max-sample-rate-hz = <20000000>;
+			atmel,startup-time-ms = <4>;
+			status = "disabled";
+		};
+
 		sdmmc0: mmc@e1204000 {
 			compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
 			reg = <0xe1204000 0x4000>;
-- 
2.25.1


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  parent reply	other threads:[~2021-08-24 11:56 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-24 11:54 [PATCH v2 00/10] iio: adc: at91-sama5d2_adc: add support for sama7g5 Eugen Hristev
2021-08-24 11:54 ` Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 01/10] dt-bindings: iio: adc: at91-sama5d2: add compatible for sama7g5-adc Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 02/10] iio: adc: at91-sama5d2_adc: initialize hardware after clock is started Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 03/10] iio: adc: at91-sama5d2_adc: remove unused definition Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 04/10] iio: adc: at91-sama5d2_adc: convert to platform specific data structures Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-30 12:21   ` Jonathan Cameron
2021-08-30 12:21     ` Jonathan Cameron
2021-08-30 12:28     ` Eugen.Hristev
2021-08-30 12:28       ` Eugen.Hristev
2021-08-30 12:31   ` Eugen.Hristev
2021-08-30 12:31     ` Eugen.Hristev
2021-08-30 14:44     ` Jonathan Cameron
2021-08-30 14:44       ` Jonathan Cameron
2021-08-31 11:50       ` Eugen.Hristev
2021-08-31 11:50         ` Eugen.Hristev
2021-09-05 10:08         ` Jonathan Cameron
2021-09-05 10:08           ` Jonathan Cameron
2021-08-24 11:54 ` [PATCH v2 05/10] iio: adc: at91-sama5d2-adc: add support for separate end of conversion registers Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-31  6:45   ` Eugen.Hristev
2021-08-31  6:45     ` Eugen.Hristev
2021-09-05 10:12     ` Jonathan Cameron
2021-09-05 10:12       ` Jonathan Cameron
2021-08-24 11:54 ` [PATCH v2 06/10] iio: adc: at91-sama5d2_adc: add helper for COR register Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-30 12:18   ` Jonathan Cameron
2021-08-30 12:18     ` Jonathan Cameron
2021-08-24 11:54 ` [PATCH v2 07/10] iio: adc: at91-sama5d2_adc: add support for sama7g5 device Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 08/10] iio: adc: at91-sama5d2_adc: update copyright and authors information Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-24 11:54 ` Eugen Hristev [this message]
2021-08-24 11:54   ` [PATCH v2 09/10] ARM: dts: at91: sama7g5: add node for the ADC Eugen Hristev
2021-08-24 11:54 ` [PATCH v2 10/10] ARM: dts: at91: sama7g5ek: enable ADC on the board Eugen Hristev
2021-08-24 11:54   ` Eugen Hristev
2021-08-30 12:26 ` [PATCH v2 00/10] iio: adc: at91-sama5d2_adc: add support for sama7g5 Jonathan Cameron
2021-08-30 12:26   ` Jonathan Cameron
2021-09-01  9:47   ` Nicolas Ferre
2021-09-01  9:47     ` Nicolas Ferre

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