From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B1CCC4338F for ; Tue, 24 Aug 2021 12:59:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 626756135F for ; Tue, 24 Aug 2021 12:59:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236952AbhHXNAL (ORCPT ); Tue, 24 Aug 2021 09:00:11 -0400 Received: from first.geanix.com ([116.203.34.67]:37278 "EHLO first.geanix.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236910AbhHXNAL (ORCPT ); Tue, 24 Aug 2021 09:00:11 -0400 Received: from skn-laptop (unknown [185.17.218.86]) by first.geanix.com (Postfix) with ESMTPSA id 86910440F4E; Tue, 24 Aug 2021 12:59:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=geanix.com; s=first; t=1629809965; bh=IpuyqW3nFGzrvA6myjD6qcMlcb4Gw3WjLyCuiQql5O8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=MyQv+yHI+mFJVbVOm7WPuL6RwS5gEjW8yTdhJ/z/V81audt8sj9AlxcIKlsXTSKPA vgmdfpNlyOXZ7DWLk+HUueaDcZAJ33rjNYWWAsf4DMa8TNp63/h4qHJJPzpY1uXPUq tMnT29bNSwNcL2gnum2Z/8UJTdJ4BNIWUxvHOHoQjHKfQSsiWbCpK/DwYWewPf5Mca TutLBEWU0VctM/BDyMb/QqOJwKsquOEQI95hOir2pODA/hNWGLDxqmV53joxQ00X5h XC8BgrZPB4YCjBYED++g25Ira1J7xuaLzVGd5+46hPYBQr6T9a4uqCtWz3ZQKyHqcW wrgfHqZXzXDzQ== Date: Tue, 24 Aug 2021 14:59:24 +0200 From: Sean Nyekjaer To: Andy Shevchenko Cc: Jonathan Cameron , Andy Shevchenko , linux-iio Subject: Re: [PATCH v2 1/2] iio: accel: fxls8962af: add threshold event handling Message-ID: <20210824125924.7z3ufe6zdvgdb7am@skn-laptop> References: <20210824113709.1834195-1-sean@geanix.com> <20210824123245.z5o452x5s5m2wcyx@skn-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org On Tue, Aug 24, 2021 at 03:42:58PM +0300, Andy Shevchenko wrote: > On Tue, Aug 24, 2021 at 3:32 PM Sean Nyekjaer wrote: > > On Tue, Aug 24, 2021 at 03:15:28PM +0300, Andy Shevchenko wrote: > > > On Tue, Aug 24, 2021 at 2:38 PM Sean Nyekjaer wrote: > > ... > > > > > + /* > > > > + * Add the same value to the lower-threshold register with a reversed sign > > > > + * in 2-complement 12 bit format. > > > > + */ > > > > + data->lower_thres = (~val & GENMASK(11, 0)) + 1; > > > > > > This looks suspicious. > > > > > > 0 => 0xfff + 1 => 0x1000. Is it what is wanted? > > > I thought that -val & mask is what you need. > > > > > > Can you explain more in the comment (maybe with examples) on what is > > > coming and what is expected? > > > > It's a bit messy I know :) > > > > Some examples: > > val = 0 => upper = 0x0, lower = 0x0 > > val = 500 => upper = 0x1F4, lower = 0xe0c > > val = 1000 => upper = 0x3e8, lower = 0xc18 > > > > Guess it could work if we special case val = 0... > > > > It doesn't even makes sense to write 0 to this register as noise would > > trigger events. > > > > > > + data->upper_thres = val & GENMASK(10, 0); > > So, I just tested all three and with '-' (minus) it works, while your > code is buggy :-) Agree, just tested with: --- #include int main() { signed int lower_thres, upper_thres, lower, upper; int val; for (val = 0; val <= 1000; val+=500) { lower = -val & 0xFFF; upper = val & 0x7FF; printf("val %d, upper 0x%x, lower 0x%x\n", val, upper, lower); } } --- val 0, upper 0x0, lower 0x0 val 500, upper 0x1f4, lower 0xe0c val 1000, upper 0x3e8, lower 0xc18 Thanks :) /Sean