From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00C10C4338F for ; Wed, 25 Aug 2021 15:15:55 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7600561026 for ; Wed, 25 Aug 2021 15:15:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7600561026 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7D5DC82F4C; Wed, 25 Aug 2021 17:15:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 10CB883140; Wed, 25 Aug 2021 17:15:19 +0200 (CEST) Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6B98B82DBA for ; Wed, 25 Aug 2021 17:15:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=ziswiler.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=marcel@ziswiler.com Received: from toolbox.cardiotech.int ([81.221.236.183]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LllV0-1msFQq1CHw-00ZLb0; Wed, 25 Aug 2021 17:14:52 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Cc: Fabio Estevam , Heiko Thiery , Stefano Babic , Frieder Schrempf , Marcel Ziswiler , Max Krummenacher , "NXP i.MX U-Boot Team" , Simon Glass Subject: [PATCH v3 02/10] verdin-imx8mm: fix ethernet Date: Wed, 25 Aug 2021 17:14:33 +0200 Message-Id: <20210825151441.485419-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210825151441.485419-1-marcel@ziswiler.com> References: <20210825151441.485419-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:3R4Kxk9Qrt0zBu3vTYumImhTnkGeZRQTw9uW8hkJ8tVJ5PC/KOC RhMWCTvHUWKMMjCA/CamswPHuWjwLb+3X0HuyouL8bbzQ1XvEP6pzVp1fhDWOhngGalHSTy dic7hxH4gEHwWfrruEHQFrf4sDEVOIx+OWwsFyOc2H9Ofg/NdHdVgImFu14tKFZYo/oOAzR tAHRqEmgfy11KbTEEgQMw== X-UI-Out-Filterresults: notjunk:1;V03:K0:T0RmqitfQjA=:JBE4/V9tRr6tkxhN6dyZzC J9V3lpW6t61AzTJX5eJ/forLcEykXlWQNCugo9ZQ8Z0GKwsLZ+UhJo5yKpYmKdMns8KrDnohv Z+WGu9B2uuYXdzItSg79ZmFnz2zktYIQZmCnTY13B5B3e8Jxy0dMtch+w+nFTECop67bVEfsZ 3rNmxhsLQl95VYVoVwJ4nto4iF3i4JSf32G3G6SmFQpoRZAbiJLwQFZVt2qm7wMNUqcIoHMq/ ajea0ukKBrrlkENWU3QUP+0lCkwLJ6WCDZOyKKaKqm2T/TNHoMPW0atr8AsVoEQU4B6eg6MKY FIvOPfmJryVQJ4WqONg9WiyEMgXMSmpdUB4EH3BM6jj9ROO3U1YeNZBfTh2+WDL2S1ojOu4y3 ulT5shZeDxUq1zVrRpV78245Glg/31yueDsrjI8kwsmHc3YcySaFEVvhsaLrVfPDAWo25gAd6 AJS/ugAn/4rFsOdwUg+Vep7s8c9O/XjsvFj6Fzeo6FNHYOObRkP+PynCno0negxb/YxpL0lPc bvQD1kNWMKOzx5IFe3IcCcWYrhAY9bXWuwbeOqAULkxxENowSM8BNcyBmg/NNTtrIfi0yS6TF EsbAzvPH1/CifZ/PEEZbojxQSiUpfbx0fLly0/88mJqJ3IR0YEJLxnNkfpFDoCGv5WdZnTYA/ bw7UrVKzjR/rb4a1urqBnOdDMJrjDtPc1xy7CFonS70cqbnQbOYzPdWEh0WjDWUx2kTQufgrP +qWYJBM3NsY2X5sK38yi1jXTSDVzBgdHbGbFtw== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Marcel Ziswiler Turns out Microship (formerly Micrel) meanwhile integrated proper support for the DLL setup on their KSZ9131. Unfortunately, this conflicts with our previous board code doing that. Fix this by getting rid of our board code and just relying on the generic implementation relying on rgmii-id being used as phy-mode. Fixes: commit c6df0e2ffdc4 ("net: phy: micrel: add support for DLL setup on ksz9131") Signed-off-by: Marcel Ziswiler Reviewed-by: Fabio Estevam --- (no changes since v1) arch/arm/dts/imx8mm-verdin.dts | 2 +- board/toradex/verdin-imx8mm/verdin-imx8mm.c | 64 --------------------- 2 files changed, 1 insertion(+), 65 deletions(-) diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts index fb0756d6e19..ac2a4b69d3c 100644 --- a/arch/arm/dts/imx8mm-verdin.dts +++ b/arch/arm/dts/imx8mm-verdin.dts @@ -160,7 +160,7 @@ &fec1 { fsl,magic-packet; phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_ethphy>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_fec1>; diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c index 76f4a1e209a..1644f4b3081 100644 --- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c +++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c @@ -36,70 +36,6 @@ static int setup_fec(void) return 0; } - -int board_phy_config(struct phy_device *phydev) -{ - int tmp; - - switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) { - case PHY_ID_KSZ9031: - /* - * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by - * default. The MAC and the layout don't add a skew between - * clock and data. - * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for - * the TXC path to get the required clock skews. - */ - /* control data pad skew - devaddr = 0x02, register = 0x04 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0070); - /* rx data pad skew - devaddr = 0x02, register = 0x05 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x7777); - /* tx data pad skew - devaddr = 0x02, register = 0x06 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x0000); - /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */ - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x03f4); - break; - case PHY_ID_KSZ9131: - default: - /* read rxc dll control - devaddr = 0x2, register = 0x4c */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable rxdll bypass (enable 2ns skew delay on RXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - /* read txc dll control - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_read(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC); - /* disable txdll bypass (enable 2ns skew delay on TXC) */ - tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS; - /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */ - tmp = ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL, - MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp); - break; - } - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} #endif int board_init(void) -- 2.26.2