From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A4D0C4320E for ; Wed, 25 Aug 2021 15:34:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F3AA8610A4 for ; Wed, 25 Aug 2021 15:34:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241972AbhHYPfl (ORCPT ); Wed, 25 Aug 2021 11:35:41 -0400 Received: from mslow1.mail.gandi.net ([217.70.178.240]:50191 "EHLO mslow1.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241906AbhHYPfh (ORCPT ); Wed, 25 Aug 2021 11:35:37 -0400 Received: from relay6-d.mail.gandi.net (unknown [217.70.183.198]) by mslow1.mail.gandi.net (Postfix) with ESMTP id 5BC8EC6994; Wed, 25 Aug 2021 15:26:42 +0000 (UTC) Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay6-d.mail.gandi.net (Postfix) with ESMTPSA id E8FC9C0018; Wed, 25 Aug 2021 15:26:15 +0000 (UTC) From: Miquel Raynal To: Jonathan Cameron , Lars-Peter Clausen , Peter Meerwald-Stadler , Rob Herring , Lee Jones , bcousson@baylibre.com, Tony Lindgren , Tero Kristo , Michael Turquette , Stephen Boyd Cc: Thomas Petazzoni , "Ryan J . Barnett" , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-input@vger.kernel.org, linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, Miquel Raynal Subject: [PATCH 27/40] mfd: ti_am335x_tscadc: Move control register configuration Date: Wed, 25 Aug 2021 17:25:05 +0200 Message-Id: <20210825152518.379386-28-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210825152518.379386-1-miquel.raynal@bootlin.com> References: <20210825152518.379386-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The datasheet states that most of the configuration should be set in the control register in the first place, before actually enabling the hardware. So far only half of the configuration was made in the first step, which does not make really sense and would complicating the code when introducing support for the am437x hardware. Let's move that register write a bit below to enclose more configuration. Signed-off-by: Miquel Raynal --- drivers/mfd/ti_am335x_tscadc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index a40091830cea..1a30610dc65f 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -224,7 +224,6 @@ static int ti_tscadc_probe(struct platform_device *pdev) tscadc->ctrl = CNTRLREG_STEPID; if (tscadc->data->has_tsc) { tscadc->ctrl |= CNTRLREG_TSC_STEPCONFIGWRT; - regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); if (use_tsc) { tscadc->ctrl |= CNTRLREG_TSC_ENB; if (tscmag_wires == 5) @@ -235,6 +234,8 @@ static int ti_tscadc_probe(struct platform_device *pdev) } + regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); + tscadc_idle_config(tscadc); /* Enable the TSC module enable bit */ -- 2.27.0