From: Aurabindo Pillai <aurabindo.pillai@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Harry.Wentland@amd.com>, <nicholas.kazlauskas@amd.com>,
<alexander.deucher@amd.com>, <aurabindo.pillai@amd.com>,
<stable@vger.kernel.org>
Subject: [PATCH 1/4] drm/amd/display: Update number of DCN3 clock states
Date: Wed, 25 Aug 2021 21:09:59 -0400 [thread overview]
Message-ID: <20210826011002.425361-1-aurabindo.pillai@amd.com> (raw)
[Why & How]
The DCN3 SoC parameter num_states was calculated but not saved into the
object.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: stable@vger.kernel.org
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 1333f0541f1b..43ac6f42dd80 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2467,6 +2467,7 @@ void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params
dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;
}
+ dcn3_0_soc.num_states = num_states;
for (i = 0; i < dcn3_0_soc.num_states; i++) {
dcn3_0_soc.clock_limits[i].state = i;
dcn3_0_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i];
--
2.30.2
next reply other threads:[~2021-08-26 1:10 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-26 1:09 Aurabindo Pillai [this message]
2021-08-26 1:10 ` [PATCH 2/4] drm/amd/display: Update bounding box states (v2) Aurabindo Pillai
2021-08-26 1:10 ` [PATCH 3/4] drm/amd/display: Remove duplicate dml init Aurabindo Pillai
2021-08-26 1:10 ` [PATCH 4/4] drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box Aurabindo Pillai
2021-08-26 2:00 ` [PATCH 1/4] drm/amd/display: Update number of DCN3 clock states Alex Deucher
2021-08-26 2:00 ` Alex Deucher
2021-08-26 13:34 ` Aurabindo Pillai
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