From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A96E0C4320A for ; Thu, 26 Aug 2021 18:34:03 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id 5B72C60F45 for ; Thu, 26 Aug 2021 18:34:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5B72C60F45 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D3C9A41267; Thu, 26 Aug 2021 20:33:37 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 7293241262 for ; Thu, 26 Aug 2021 20:33:35 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10088"; a="217847228" X-IronPort-AV: E=Sophos;i="5.84,354,1620716400"; d="scan'208";a="217847228" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2021 11:33:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,354,1620716400"; d="scan'208";a="685030872" Received: from silpixa00399126.ir.intel.com ([10.237.223.29]) by fmsmga006.fm.intel.com with ESMTP; 26 Aug 2021 11:33:32 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: conor.walsh@intel.com, kevin.laatz@intel.com, Chengwen Feng , jerinj@marvell.com, Bruce Richardson Date: Thu, 26 Aug 2021 19:33:01 +0100 Message-Id: <20210826183301.333442-8-bruce.richardson@intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210826183301.333442-1-bruce.richardson@intel.com> References: <20210826183301.333442-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [RFC PATCH 7/7] app/test: add dmadev fill tests X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kevin Laatz For dma devices which support the fill operation, run unit tests to verify fill behaviour is correct. Signed-off-by: Kevin Laatz Signed-off-by: Bruce Richardson --- app/test/test_dmadev.c | 68 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c index 9b34632cbc..cc04689adb 100644 --- a/app/test/test_dmadev.c +++ b/app/test/test_dmadev.c @@ -649,6 +649,62 @@ test_completion_status(int dev_id, uint16_t vchan, bool fence) return 0; } +static int +test_enqueue_fill(int dev_id, uint16_t vchan) +{ + const unsigned int lengths[] = {8, 64, 1024, 50, 100, 89}; + struct rte_mbuf *dst; + char *dst_data; + uint64_t pattern = 0xfedcba9876543210; + unsigned int i, j; + + dst = rte_pktmbuf_alloc(pool); + if (dst == NULL) { + PRINT_ERR("Failed to allocate mbuf\n"); + return -1; + } + dst_data = rte_pktmbuf_mtod(dst, char *); + + for (i = 0; i < RTE_DIM(lengths); i++) { + /* reset dst_data */ + memset(dst_data, 0, rte_pktmbuf_data_len(dst)); + + /* perform the fill operation */ + int id = rte_dmadev_fill(dev_id, vchan, pattern, + rte_pktmbuf_iova(dst), lengths[i], RTE_DMA_OP_FLAG_SUBMIT); + if (id < 0) { + PRINT_ERR("Error with rte_ioat_enqueue_fill\n"); + return -1; + } + usleep(10); + + if (rte_dmadev_completed(dev_id, vchan, 1, NULL, NULL) != 1) { + PRINT_ERR("Error: fill operation failed (length: %u)\n", lengths[i]); + return -1; + } + /* check the data from the fill operation is correct */ + for (j = 0; j < lengths[i]; j++) { + char pat_byte = ((char *)&pattern)[j % 8]; + if (dst_data[j] != pat_byte) { + PRINT_ERR("Error with fill operation (lengths = %u): got (%x), not (%x)\n", + lengths[i], dst_data[j], pat_byte); + return -1; + } + } + /* check that the data after the fill operation was not written to */ + for (; j < rte_pktmbuf_data_len(dst); j++) { + if (dst_data[j] != 0) { + PRINT_ERR("Error, fill operation wrote too far (lengths = %u): got (%x), not (%x)\n", + lengths[i], dst_data[j], 0); + return -1; + } + } + } + + rte_pktmbuf_free(dst); + return 0; +} + static int test_dmadev_instance(uint16_t dev_id) { @@ -735,6 +791,18 @@ test_dmadev_instance(uint16_t dev_id) printf("Ops completed: %"PRIu64"\n", stats.completed); } + if ((info.dev_capa & RTE_DMADEV_CAPA_OPS_FILL) == 0) + printf("DMA Dev: %u, No device fill support - skipping fill tests\n", dev_id); + else { + printf("DMA Dev: %u, Running Fill Tests\n", dev_id); + + if (test_enqueue_fill(dev_id, vchan) != 0) + goto err; + + rte_dmadev_stats_get(dev_id, 0, &stats); + printf("Ops submitted: %"PRIu64"\t", stats.submitted); + printf("Ops completed: %"PRIu64"\n", stats.completed); + } rte_mempool_free(pool); rte_dmadev_stop(dev_id); -- 2.30.2