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From: Marijn Suijten <marijn.suijten@somainline.org>
To: phone-devel@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@somainline.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Martin Botka <martin.botka@somainline.org>,
	Jami Kettunen <jami.kettunen@somainline.org>,
	Pavel Dubrova <pashadubrova@gmail.com>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Andy Gross <agross@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 1/3] arm: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference
Date: Sun, 29 Aug 2021 22:30:25 +0200	[thread overview]
Message-ID: <20210829203027.276143-2-marijn.suijten@somainline.org> (raw)
In-Reply-To: <20210829203027.276143-1-marijn.suijten@somainline.org>

The 28NM DSI PLL driver for msm8960 calculates with a 27MHz reference
clock and should hence use PXO, not CXO which runs at 19.2MHz.

Note that none of the DSI PHY/PLL drivers currently use this "ref"
clock; they all rely on (sometimes inexistant) global clock names and
usually function normally without a parent clock.  This discrepancy will
be corrected in a future patch, for which this change needs to be in
place first.

Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 2687c4e890ba..77659b783759 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -198,7 +198,7 @@ cxo_board: cxo_board {
 			clock-frequency = <19200000>;
 		};
 
-		pxo_board {
+		pxo_board: pxo_board {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
 			clock-frequency = <27000000>;
@@ -1306,7 +1306,7 @@ dsi0_phy: dsi-phy@4700200 {
 			reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
 			clock-names = "iface_clk", "ref";
 			clocks = <&mmcc DSI_M_AHB_CLK>,
-				 <&cxo_board>;
+				 <&pxo_board>;
 		};
 
 
-- 
2.33.0


  reply	other threads:[~2021-08-29 20:30 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-29 20:30 [PATCH 0/3] Use "ref" clocks from firmware for DSI PLL VCO parent Marijn Suijten
2021-08-29 20:30 ` Marijn Suijten [this message]
2021-08-30  1:18   ` [PATCH 1/3] arm: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference Dmitry Baryshkov
2021-08-30  8:28     ` Marijn Suijten
2021-08-30 13:24       ` Dmitry Baryshkov
2021-08-30 14:13         ` Marijn Suijten
2021-08-30 14:18           ` Dmitry Baryshkov
2021-08-30 14:25             ` Marijn Suijten
2021-08-30 15:17               ` Bjorn Andersson
2021-08-30 15:37                 ` Marijn Suijten
2021-08-30 15:58                   ` Bjorn Andersson
2021-08-30 18:33                     ` Marijn Suijten
2021-08-29 20:30 ` [PATCH 2/3] drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parent Marijn Suijten
2021-08-29 20:30   ` Marijn Suijten
2021-08-29 20:39   ` Dmitry Baryshkov
2021-08-29 20:39     ` Dmitry Baryshkov
2021-08-29 21:53     ` Marijn Suijten
2021-08-29 21:53       ` Marijn Suijten
2021-08-30  1:17       ` Dmitry Baryshkov
2021-08-30  1:17         ` Dmitry Baryshkov
2021-08-30 14:22         ` Marijn Suijten
2021-08-30 14:22           ` Marijn Suijten
2021-08-29 20:30 ` [PATCH 3/3] clk: qcom: gcc-sdm660: Remove transient global "xo" clock Marijn Suijten

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