All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>, CQ Tang <cq.tang@intel.com>
Subject: [Intel-gfx] [PATCH V3 1/8] drm/i915/gt: Add support of mocs propagation
Date: Mon, 30 Aug 2021 21:52:33 +0530	[thread overview]
Message-ID: <20210830162240.3891502-2-ayaz.siddiqui@intel.com> (raw)
In-Reply-To: <20210830162240.3891502-1-ayaz.siddiqui@intel.com>

Now there are lots of Command and registers that require mocs index
programming.
So propagating mocs_index from mocs to gt so that it can be
used directly without having platform-specific checks.

Cc: CQ Tang<cq.tang@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_types.h |  4 ++++
 drivers/gpu/drm/i915/gt/intel_mocs.c     | 10 ++++++++++
 2 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index a81e21bf1bd1a..88601a2d2c229 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -192,6 +192,10 @@ struct intel_gt {
 
 		unsigned long mslice_mask;
 	} info;
+
+	struct i915_mocs_index_gt {
+		u8 uc_index;
+	} mocs;
 };
 
 enum intel_gt_scratch_field {
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 582c4423b95d6..10cc508c1a4f6 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -22,6 +22,7 @@ struct drm_i915_mocs_table {
 	unsigned int size;
 	unsigned int n_entries;
 	const struct drm_i915_mocs_entry *table;
+	u8 uc_index;
 };
 
 /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */
@@ -340,6 +341,8 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915,
 {
 	unsigned int flags;
 
+	memset(table, 0, sizeof(struct drm_i915_mocs_table));
+
 	if (IS_DG1(i915)) {
 		table->size = ARRAY_SIZE(dg1_mocs_table);
 		table->table = dg1_mocs_table;
@@ -504,6 +507,12 @@ static u32 global_mocs_offset(void)
 	return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0));
 }
 
+static void set_mocs_index(struct intel_gt *gt,
+			   struct drm_i915_mocs_table *table)
+{
+	gt->mocs.uc_index = table->uc_index;
+}
+
 void intel_mocs_init(struct intel_gt *gt)
 {
 	struct drm_i915_mocs_table table;
@@ -515,6 +524,7 @@ void intel_mocs_init(struct intel_gt *gt)
 	flags = get_mocs_settings(gt->i915, &table);
 	if (flags & HAS_GLOBAL_MOCS)
 		__init_mocs_table(gt->uncore, &table, global_mocs_offset());
+	set_mocs_index(gt, &table);
 }
 
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
-- 
2.26.2


  reply	other threads:[~2021-08-30 16:26 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-30 16:22 [Intel-gfx] [PATCH V3 0/8] drm/i915/gt: Initialize unused MOCS entries to L3_WB Ayaz A Siddiqui
2021-08-30 16:22 ` Ayaz A Siddiqui [this message]
2021-09-01 17:56   ` [Intel-gfx] [PATCH V3 1/8] drm/i915/gt: Add support of mocs propagation Matt Roper
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 2/8] drm/i915/gt: Add support of mocs auxiliary registers programming Ayaz A Siddiqui
2021-08-30 21:50   ` kernel test robot
2021-08-30 21:50     ` kernel test robot
2021-08-30 23:55   ` kernel test robot
2021-08-30 23:55     ` kernel test robot
2021-08-31  0:42   ` kernel test robot
2021-08-31  0:42     ` kernel test robot
2021-08-31  4:03   ` kernel test robot
2021-08-31  4:03     ` kernel test robot
2021-08-31  4:03   ` [Intel-gfx] [RFC PATCH] drm/i915/gt: get_ctx_reg_count() can be static kernel test robot
2021-08-31  4:03     ` kernel test robot
2021-09-01 16:48   ` [Intel-gfx] [PATCH V3 2/8] drm/i915/gt: Add support of mocs auxiliary registers programming kernel test robot
2021-09-01 16:48     ` kernel test robot
2021-09-01 16:48   ` [Intel-gfx] [RFC PATCH] drm/i915/gt: fix duplicated inclusion kernel test robot
2021-09-01 16:48     ` kernel test robot
2021-09-01 21:24   ` [Intel-gfx] [PATCH V3 2/8] drm/i915/gt: Add support of mocs auxiliary registers programming Matt Roper
2021-09-02 11:56     ` Siddiqui, Ayaz A
2021-09-02 16:06       ` Matt Roper
2021-09-02 18:49         ` Siddiqui, Ayaz A
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 3/8] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward Ayaz A Siddiqui
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 4/8] drm/i915/gt: Set BLIT_CCTL reg to un-cached Ayaz A Siddiqui
2021-09-01 23:21   ` Matt Roper
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 5/8] drm/i915/gt: Initialize unused MOCS entries with device specific values Ayaz A Siddiqui
2021-09-01 23:45   ` Matt Roper
2021-09-02  6:37     ` Siddiqui, Ayaz A
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 6/8] drm/i95/adl: Define MOCS table for Alderlake Ayaz A Siddiqui
2021-09-01 23:49   ` Matt Roper
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 7/8] drm/i915/gt: Initialize L3CC table in mocs init Ayaz A Siddiqui
2021-09-02  0:16   ` Matt Roper
2021-09-02 18:25     ` Siddiqui, Ayaz A
2021-08-30 16:22 ` [Intel-gfx] [PATCH V3 8/8] drm/i915/selftest: Remove Renderer class check for l3cc table read Ayaz A Siddiqui
2021-09-02  0:27   ` Matt Roper
2021-08-30 18:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB Patchwork
2021-08-30 18:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-30 20:14 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210830162240.3891502-2-ayaz.siddiqui@intel.com \
    --to=ayaz.siddiqui@intel.com \
    --cc=cq.tang@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.