[PATCH 00/29] [RFC] build more i386 tcg code modular.

[PATCH 00/29] [RFC] build more i386 tcg code modular.

[Gerd Hoffmann]

This series moves a big pile of code from core qemu to the tcg module.

To allow for more fine-grained patches the first patch disables modular
tcg and the last patch re-enables it.  Alternatively we could move all
the build system changes (patches 4-8) to the end of the series and
squash them into a single patch.  Not sure which is better ...

The fundamental idea of this series is that any call from core qemu into
tcg gets routed through function pointers.  This is simliar to the way
we handle the spice module (see ui/spice-module.c).

Initially the function pointers are filled with stubs, when the tcg
module loads all function pointers are updated to point to the real
functions instead.  One side effect of this is that compile-time stubs
will become runtime-stubs.

Series overview:
   1         - disable modular tcg.
   2 =>  3   - misc small tweaks.
   4 =>  8   - build system changes.
   9 => 21   - add generic tcg function pointers.
  22 => 28   - add i386 tcg function pointers.
  29         - re-enable modular tcg.

take care,
  Gerd

Gerd Hoffmann (29):
  build: temporarily disable modular tcg
  plugins: register qemu_plugin_opts using opts_init()
  tcg/module: move hmp.c to module
  tcg/module: move cputlb.c to module
  tcg/module: move tcg_ss to module [accel/tcg]
  tcg/module: move tcg_ss to module [tcg]
  tcg/module: move files to module [target/i386/tcg]
  move cpu-exec-common.c from tcg module to core qemu [accel/tcg]
  tcg/module: add tcg-module.[ch] infrastructure
  tcg_funcs: Add tlb_flush to TCGModuleOps
  tcg_funcs: Add tlb_flush_page to TCGModuleOps
  tcg_funcs: Add tlb_reset_dirty to TCGModuleOps
  tcg_funcs: Add tlb_plugin_lookup to TCGModuleOps
  tcg_funcs:Add  tcg_exec_{realizefn,unrealizefn} to TCGModuleOps
  tcg_funcs: Add tb_flush to TCGModuleOps
  tcg: use tb_page_addr_t for tb_invalidate_phys_range()
  tcg: drop tb_invalidate_phys_page_range()
  tcg_funcs: Add tb_invalidate_phys_range to TCGModuleOps
  tcg_funcs: Add tb_check_watchpoint to TCGModuleOps
  tcg_funcs: Add cpu_restore_state to TCGModuleOps
  tcg_funcs: Add curr_cflags to TCGModuleOps
  tcg_i386_funcs: Add update_fp_status to TCGI386ModuleOps
  tcg_i386_funcs: Add update_mxcsr_status to TCGI386ModuleOps
  tcg_i386_funcs: Add update_mxcsr_from_sse_status to TCGI386ModuleOps
  tcg_i386_funcs: Add x86_register_ferr_irq to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_set_ignne to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_x86_update_dr7 to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_cc_compute_all to TCGI386ModuleOps
  Revert "build: temporarily disable modular tcg"

 include/exec/cpu-all.h              |  2 -
 include/exec/exec-all.h             | 16 ++------
 include/exec/ram_addr.h             |  2 -
 include/exec/translate-all.h        |  2 -
 include/qemu/plugin.h               |  7 ----
 include/tcg/tcg-module-i386.h       | 15 ++++++++
 include/tcg/tcg-module.h            | 24 ++++++++++++
 target/i386/cpu.h                   | 17 ++------
 accel/stubs/tcg-stub.c              |  4 --
 accel/tcg/cpu-exec-common.c         | 10 ++++-
 accel/tcg/cpu-exec.c                | 15 ++++++--
 accel/tcg/cputlb.c                  | 14 ++++++-
 accel/tcg/tcg-module-i386.c         | 33 ++++++++++++++++
 accel/tcg/tcg-module.c              | 60 +++++++++++++++++++++++++++++
 accel/tcg/translate-all.c           | 55 +++++++-------------------
 cpu.c                               | 14 +++----
 gdbstub.c                           |  4 +-
 hw/i386/pc.c                        |  2 +-
 hw/i386/pc_piix.c                   |  2 +-
 hw/i386/pc_q35.c                    |  2 +-
 hw/ppc/spapr_hcall.c                |  2 +-
 linux-user/main.c                   |  2 +-
 linux-user/mmap.c                   |  8 ++--
 linux-user/syscall.c                |  4 +-
 plugins/api.c                       |  4 +-
 plugins/core.c                      |  2 +-
 plugins/loader.c                    | 11 +++++-
 softmmu/physmem.c                   | 22 +++++------
 softmmu/vl.c                        |  1 -
 target/alpha/helper.c               |  2 +-
 target/alpha/mem_helper.c           |  2 +-
 target/alpha/sys_helper.c           |  2 +-
 target/arm/helper.c                 | 26 ++++++-------
 target/arm/op_helper.c              |  2 +-
 target/arm/tlb_helper.c             |  8 ++--
 target/cris/helper.c                |  2 +-
 target/i386/cpu-dump.c              |  2 +-
 target/i386/gdbstub.c               |  2 +-
 target/i386/helper.c                | 10 ++---
 target/i386/machine.c               |  8 ++--
 target/i386/tcg/cc_helper.c         |  9 ++++-
 target/i386/tcg/fpu_helper.c        | 23 +++++++----
 target/i386/tcg/int_helper.c        |  8 ++--
 target/i386/tcg/mem_helper.c        |  8 ++--
 target/i386/tcg/misc_helper.c       |  4 +-
 target/i386/tcg/seg_helper.c        | 10 ++---
 target/i386/tcg/sysemu/bpt_helper.c |  9 ++++-
 target/i386/tcg/sysemu/fpu_helper.c | 12 +++++-
 target/i386/tcg/sysemu/svm_helper.c |  2 +-
 target/i386/tcg/tcg-stub.c          | 25 ------------
 target/m68k/op_helper.c             |  6 +--
 target/microblaze/helper.c          |  2 +-
 target/mips/sysemu/cp0.c            |  2 +-
 target/openrisc/sys_helper.c        |  8 ++--
 target/ppc/excp_helper.c            |  2 +-
 target/riscv/csr.c                  |  2 +-
 target/s390x/gdbstub.c              |  2 +-
 target/s390x/sigp.c                 |  2 +-
 target/s390x/tcg/excp_helper.c      |  2 +-
 target/tricore/op_helper.c          |  2 +-
 target/xtensa/helper.c              |  6 +--
 accel/tcg/meson.build               | 24 ++++++++----
 target/i386/tcg/meson.build         |  7 +++-
 target/i386/tcg/sysemu/meson.build  |  5 ++-
 tcg/meson.build                     |  2 +-
 65 files changed, 367 insertions(+), 239 deletions(-)
 create mode 100644 include/tcg/tcg-module-i386.h
 create mode 100644 include/tcg/tcg-module.h
 create mode 100644 accel/tcg/tcg-module-i386.c
 create mode 100644 accel/tcg/tcg-module.c
 delete mode 100644 target/i386/tcg/tcg-stub.c

-- 
2.31.1

[PATCH 00/29] [RFC] build more i386 tcg code modular.

[Gerd Hoffmann]

This series moves a big pile of code from core qemu to the tcg module.

To allow for more fine-grained patches the first patch disables modular
tcg and the last patch re-enables it.  Alternatively we could move all
the build system changes (patches 4-8) to the end of the series and
squash them into a single patch.  Not sure which is better ...

The fundamental idea of this series is that any call from core qemu into
tcg gets routed through function pointers.  This is simliar to the way
we handle the spice module (see ui/spice-module.c).

Initially the function pointers are filled with stubs, when the tcg
module loads all function pointers are updated to point to the real
functions instead.  One side effect of this is that compile-time stubs
will become runtime-stubs.

Series overview:
   1         - disable modular tcg.
   2 =>  3   - misc small tweaks.
   4 =>  8   - build system changes.
   9 => 21   - add generic tcg function pointers.
  22 => 28   - add i386 tcg function pointers.
  29         - re-enable modular tcg.

take care,
  Gerd

Gerd Hoffmann (29):
  build: temporarily disable modular tcg
  plugins: register qemu_plugin_opts using opts_init()
  tcg/module: move hmp.c to module
  tcg/module: move cputlb.c to module
  tcg/module: move tcg_ss to module [accel/tcg]
  tcg/module: move tcg_ss to module [tcg]
  tcg/module: move files to module [target/i386/tcg]
  move cpu-exec-common.c from tcg module to core qemu [accel/tcg]
  tcg/module: add tcg-module.[ch] infrastructure
  tcg_funcs: Add tlb_flush to TCGModuleOps
  tcg_funcs: Add tlb_flush_page to TCGModuleOps
  tcg_funcs: Add tlb_reset_dirty to TCGModuleOps
  tcg_funcs: Add tlb_plugin_lookup to TCGModuleOps
  tcg_funcs:Add  tcg_exec_{realizefn,unrealizefn} to TCGModuleOps
  tcg_funcs: Add tb_flush to TCGModuleOps
  tcg: use tb_page_addr_t for tb_invalidate_phys_range()
  tcg: drop tb_invalidate_phys_page_range()
  tcg_funcs: Add tb_invalidate_phys_range to TCGModuleOps
  tcg_funcs: Add tb_check_watchpoint to TCGModuleOps
  tcg_funcs: Add cpu_restore_state to TCGModuleOps
  tcg_funcs: Add curr_cflags to TCGModuleOps
  tcg_i386_funcs: Add update_fp_status to TCGI386ModuleOps
  tcg_i386_funcs: Add update_mxcsr_status to TCGI386ModuleOps
  tcg_i386_funcs: Add update_mxcsr_from_sse_status to TCGI386ModuleOps
  tcg_i386_funcs: Add x86_register_ferr_irq to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_set_ignne to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_x86_update_dr7 to TCGI386ModuleOps
  tcg_i386_funcs: Add cpu_cc_compute_all to TCGI386ModuleOps
  Revert "build: temporarily disable modular tcg"

 include/exec/cpu-all.h              |  2 -
 include/exec/exec-all.h             | 16 ++------
 include/exec/ram_addr.h             |  2 -
 include/exec/translate-all.h        |  2 -
 include/qemu/plugin.h               |  7 ----
 include/tcg/tcg-module-i386.h       | 15 ++++++++
 include/tcg/tcg-module.h            | 24 ++++++++++++
 target/i386/cpu.h                   | 17 ++------
 accel/stubs/tcg-stub.c              |  4 --
 accel/tcg/cpu-exec-common.c         | 10 ++++-
 accel/tcg/cpu-exec.c                | 15 ++++++--
 accel/tcg/cputlb.c                  | 14 ++++++-
 accel/tcg/tcg-module-i386.c         | 33 ++++++++++++++++
 accel/tcg/tcg-module.c              | 60 +++++++++++++++++++++++++++++
 accel/tcg/translate-all.c           | 55 +++++++-------------------
 cpu.c                               | 14 +++----
 gdbstub.c                           |  4 +-
 hw/i386/pc.c                        |  2 +-
 hw/i386/pc_piix.c                   |  2 +-
 hw/i386/pc_q35.c                    |  2 +-
 hw/ppc/spapr_hcall.c                |  2 +-
 linux-user/main.c                   |  2 +-
 linux-user/mmap.c                   |  8 ++--
 linux-user/syscall.c                |  4 +-
 plugins/api.c                       |  4 +-
 plugins/core.c                      |  2 +-
 plugins/loader.c                    | 11 +++++-
 softmmu/physmem.c                   | 22 +++++------
 softmmu/vl.c                        |  1 -
 target/alpha/helper.c               |  2 +-
 target/alpha/mem_helper.c           |  2 +-
 target/alpha/sys_helper.c           |  2 +-
 target/arm/helper.c                 | 26 ++++++-------
 target/arm/op_helper.c              |  2 +-
 target/arm/tlb_helper.c             |  8 ++--
 target/cris/helper.c                |  2 +-
 target/i386/cpu-dump.c              |  2 +-
 target/i386/gdbstub.c               |  2 +-
 target/i386/helper.c                | 10 ++---
 target/i386/machine.c               |  8 ++--
 target/i386/tcg/cc_helper.c         |  9 ++++-
 target/i386/tcg/fpu_helper.c        | 23 +++++++----
 target/i386/tcg/int_helper.c        |  8 ++--
 target/i386/tcg/mem_helper.c        |  8 ++--
 target/i386/tcg/misc_helper.c       |  4 +-
 target/i386/tcg/seg_helper.c        | 10 ++---
 target/i386/tcg/sysemu/bpt_helper.c |  9 ++++-
 target/i386/tcg/sysemu/fpu_helper.c | 12 +++++-
 target/i386/tcg/sysemu/svm_helper.c |  2 +-
 target/i386/tcg/tcg-stub.c          | 25 ------------
 target/m68k/op_helper.c             |  6 +--
 target/microblaze/helper.c          |  2 +-
 target/mips/sysemu/cp0.c            |  2 +-
 target/openrisc/sys_helper.c        |  8 ++--
 target/ppc/excp_helper.c            |  2 +-
 target/riscv/csr.c                  |  2 +-
 target/s390x/gdbstub.c              |  2 +-
 target/s390x/sigp.c                 |  2 +-
 target/s390x/tcg/excp_helper.c      |  2 +-
 target/tricore/op_helper.c          |  2 +-
 target/xtensa/helper.c              |  6 +--
 accel/tcg/meson.build               | 24 ++++++++----
 target/i386/tcg/meson.build         |  7 +++-
 target/i386/tcg/sysemu/meson.build  |  5 ++-
 tcg/meson.build                     |  2 +-
 65 files changed, 367 insertions(+), 239 deletions(-)
 create mode 100644 include/tcg/tcg-module-i386.h
 create mode 100644 include/tcg/tcg-module.h
 create mode 100644 accel/tcg/tcg-module-i386.c
 create mode 100644 accel/tcg/tcg-module.c
 delete mode 100644 target/i386/tcg/tcg-stub.c

-- 
2.31.1

[PATCH 01/29] build: temporarily disable modular tcg

[Gerd Hoffmann]

Allows more fine-grained patches
without breaking bisecting.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index bf6378481250..e83aa4f5c3c9 100644
--- a/meson.build
+++ b/meson.build
@@ -94,7 +94,7 @@ endif
 
 modular_tcg = []
 # Darwin does not support references to thread-local variables in modules
-if targetos != 'darwin'
+if false #targetos != 'darwin'
   modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
 endif
 
-- 
2.31.1

[PATCH 01/29] build: temporarily disable modular tcg

[Gerd Hoffmann]

Allows more fine-grained patches
without breaking bisecting.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index bf6378481250..e83aa4f5c3c9 100644
--- a/meson.build
+++ b/meson.build
@@ -94,7 +94,7 @@ endif
 
 modular_tcg = []
 # Darwin does not support references to thread-local variables in modules
-if targetos != 'darwin'
+if false #targetos != 'darwin'
   modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
 endif
 
-- 
2.31.1

[PATCH 02/29] plugins: register qemu_plugin_opts using opts_init()

[Gerd Hoffmann]

Removes the need for an explicit qemu_plugin_add_opts() call.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/qemu/plugin.h | 7 -------
 linux-user/main.c     | 2 +-
 plugins/loader.c      | 9 ++++++++-
 softmmu/vl.c          | 1 -
 4 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
index 9a8438f6836c..57bdcdecdb42 100644
--- a/include/qemu/plugin.h
+++ b/include/qemu/plugin.h
@@ -37,13 +37,6 @@ struct qemu_plugin_desc;
 typedef QTAILQ_HEAD(, qemu_plugin_desc) QemuPluginList;
 
 #ifdef CONFIG_PLUGIN
-extern QemuOptsList qemu_plugin_opts;
-
-static inline void qemu_plugin_add_opts(void)
-{
-    qemu_add_opts(&qemu_plugin_opts);
-}
-
 void qemu_plugin_opt_parse(const char *optarg, QemuPluginList *head);
 int qemu_plugin_load_list(QemuPluginList *head, Error **errp);
 
diff --git a/linux-user/main.c b/linux-user/main.c
index 37ed50d98e2e..f9d2c6e2de31 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -661,7 +661,7 @@ int main(int argc, char **argv, char **envp)
     cpu_model = NULL;
 
     qemu_add_opts(&qemu_trace_opts);
-    qemu_plugin_add_opts();
+    module_call_init(MODULE_INIT_OPTS);
 
     optind = parse_args(argc, argv);
 
diff --git a/plugins/loader.c b/plugins/loader.c
index 05df40398d62..71b03721dffc 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -53,7 +53,7 @@ struct qemu_plugin_parse_arg {
     struct qemu_plugin_desc *curr;
 };
 
-QemuOptsList qemu_plugin_opts = {
+static QemuOptsList qemu_plugin_opts = {
     .name = "plugin",
     .implied_opt_name = "file",
     .head = QTAILQ_HEAD_INITIALIZER(qemu_plugin_opts.head),
@@ -403,3 +403,10 @@ void plugin_reset_uninstall(qemu_plugin_id_t id,
         plugin_reset_destroy(data);
     }
 }
+
+static void plugin_register_config(void)
+{
+    qemu_add_opts(&qemu_plugin_opts);
+}
+opts_init(plugin_register_config);
+module_opts("plugin");
diff --git a/softmmu/vl.c b/softmmu/vl.c
index ea05bb39c501..c29a58dee8a0 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -2736,7 +2736,6 @@ void qemu_init(int argc, char **argv, char **envp)
     qemu_add_opts(&qemu_global_opts);
     qemu_add_opts(&qemu_mon_opts);
     qemu_add_opts(&qemu_trace_opts);
-    qemu_plugin_add_opts();
     qemu_add_opts(&qemu_option_rom_opts);
     qemu_add_opts(&qemu_accel_opts);
     qemu_add_opts(&qemu_mem_opts);
-- 
2.31.1

[PATCH 02/29] plugins: register qemu_plugin_opts using opts_init()

[Gerd Hoffmann]

Removes the need for an explicit qemu_plugin_add_opts() call.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/qemu/plugin.h | 7 -------
 linux-user/main.c     | 2 +-
 plugins/loader.c      | 9 ++++++++-
 softmmu/vl.c          | 1 -
 4 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
index 9a8438f6836c..57bdcdecdb42 100644
--- a/include/qemu/plugin.h
+++ b/include/qemu/plugin.h
@@ -37,13 +37,6 @@ struct qemu_plugin_desc;
 typedef QTAILQ_HEAD(, qemu_plugin_desc) QemuPluginList;
 
 #ifdef CONFIG_PLUGIN
-extern QemuOptsList qemu_plugin_opts;
-
-static inline void qemu_plugin_add_opts(void)
-{
-    qemu_add_opts(&qemu_plugin_opts);
-}
-
 void qemu_plugin_opt_parse(const char *optarg, QemuPluginList *head);
 int qemu_plugin_load_list(QemuPluginList *head, Error **errp);
 
diff --git a/linux-user/main.c b/linux-user/main.c
index 37ed50d98e2e..f9d2c6e2de31 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -661,7 +661,7 @@ int main(int argc, char **argv, char **envp)
     cpu_model = NULL;
 
     qemu_add_opts(&qemu_trace_opts);
-    qemu_plugin_add_opts();
+    module_call_init(MODULE_INIT_OPTS);
 
     optind = parse_args(argc, argv);
 
diff --git a/plugins/loader.c b/plugins/loader.c
index 05df40398d62..71b03721dffc 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -53,7 +53,7 @@ struct qemu_plugin_parse_arg {
     struct qemu_plugin_desc *curr;
 };
 
-QemuOptsList qemu_plugin_opts = {
+static QemuOptsList qemu_plugin_opts = {
     .name = "plugin",
     .implied_opt_name = "file",
     .head = QTAILQ_HEAD_INITIALIZER(qemu_plugin_opts.head),
@@ -403,3 +403,10 @@ void plugin_reset_uninstall(qemu_plugin_id_t id,
         plugin_reset_destroy(data);
     }
 }
+
+static void plugin_register_config(void)
+{
+    qemu_add_opts(&qemu_plugin_opts);
+}
+opts_init(plugin_register_config);
+module_opts("plugin");
diff --git a/softmmu/vl.c b/softmmu/vl.c
index ea05bb39c501..c29a58dee8a0 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -2736,7 +2736,6 @@ void qemu_init(int argc, char **argv, char **envp)
     qemu_add_opts(&qemu_global_opts);
     qemu_add_opts(&qemu_mon_opts);
     qemu_add_opts(&qemu_trace_opts);
-    qemu_plugin_add_opts();
     qemu_add_opts(&qemu_option_rom_opts);
     qemu_add_opts(&qemu_accel_opts);
     qemu_add_opts(&qemu_mem_opts);
-- 
2.31.1

[PATCH 03/29] tcg/module: move hmp.c to module

[Gerd Hoffmann]

Can be built modular without problems.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 137a1a44cc0a..d4df7681a811 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -15,7 +15,6 @@ specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
 specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'cputlb.c',
-  'hmp.c',
 ))
 
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
@@ -23,4 +22,5 @@ tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops-mttcg.c',
   'tcg-accel-ops-icount.c',
   'tcg-accel-ops-rr.c',
+  'hmp.c',
 ))
-- 
2.31.1

[PATCH 03/29] tcg/module: move hmp.c to module

[Gerd Hoffmann]

Can be built modular without problems.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 137a1a44cc0a..d4df7681a811 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -15,7 +15,6 @@ specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
 specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'cputlb.c',
-  'hmp.c',
 ))
 
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
@@ -23,4 +22,5 @@ tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops-mttcg.c',
   'tcg-accel-ops-icount.c',
   'tcg-accel-ops-rr.c',
+  'hmp.c',
 ))
-- 
2.31.1

[PATCH 04/29] tcg/module: move cputlb.c to module

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index d4df7681a811..57e4ef12da23 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -13,14 +13,11 @@ tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
 tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c'), libdl])
 specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
-  'cputlb.c',
-))
-
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops.c',
   'tcg-accel-ops-mttcg.c',
   'tcg-accel-ops-icount.c',
   'tcg-accel-ops-rr.c',
   'hmp.c',
+  'cputlb.c',
 ))
-- 
2.31.1

[PATCH 04/29] tcg/module: move cputlb.c to module

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index d4df7681a811..57e4ef12da23 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -13,14 +13,11 @@ tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
 tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c'), libdl])
 specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
-  'cputlb.c',
-))
-
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops.c',
   'tcg-accel-ops-mttcg.c',
   'tcg-accel-ops-icount.c',
   'tcg-accel-ops-rr.c',
   'hmp.c',
+  'cputlb.c',
 ))
-- 
2.31.1

[PATCH 05/29] tcg/module: move tcg_ss to module [accel/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 57e4ef12da23..6471fe7832d7 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -11,7 +11,7 @@ tcg_ss.add(files(
 tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
 tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
 tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c'), libdl])
-specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
+tcg_module_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops.c',
-- 
2.31.1

[PATCH 05/29] tcg/module: move tcg_ss to module [accel/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 57e4ef12da23..6471fe7832d7 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -11,7 +11,7 @@ tcg_ss.add(files(
 tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
 tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
 tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c'), libdl])
-specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
+tcg_module_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
 
 tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
   'tcg-accel-ops.c',
-- 
2.31.1

[PATCH 06/29] tcg/module: move tcg_ss to module [tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/meson.build b/tcg/meson.build
index c4c63b19d4ed..f1d7b898b1cd 100644
--- a/tcg/meson.build
+++ b/tcg/meson.build
@@ -17,4 +17,4 @@ if get_option('tcg_interpreter')
   specific_ss.add(files('tci.c'))
 endif
 
-specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
+tcg_module_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
-- 
2.31.1

[PATCH 06/29] tcg/module: move tcg_ss to module [tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 tcg/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/meson.build b/tcg/meson.build
index c4c63b19d4ed..f1d7b898b1cd 100644
--- a/tcg/meson.build
+++ b/tcg/meson.build
@@ -17,4 +17,4 @@ if get_option('tcg_interpreter')
   specific_ss.add(files('tci.c'))
 endif
 
-specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
+tcg_module_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
-- 
2.31.1

[PATCH 07/29] tcg/module: move files to module [target/i386/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 target/i386/tcg/meson.build        | 9 +++++++--
 target/i386/tcg/sysemu/meson.build | 5 ++++-
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/target/i386/tcg/meson.build b/target/i386/tcg/meson.build
index f9110e890c8a..7bbe3d926975 100644
--- a/target/i386/tcg/meson.build
+++ b/target/i386/tcg/meson.build
@@ -1,4 +1,7 @@
-i386_ss.add(when: 'CONFIG_TCG', if_true: files(
+i386_softmmu_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
+
+files_ss = ss.source_set()
+files_ss.add(when: 'CONFIG_TCG', if_true: files(
   'bpt_helper.c',
   'cc_helper.c',
   'excp_helper.c',
@@ -9,7 +12,9 @@ i386_ss.add(when: 'CONFIG_TCG', if_true: files(
   'mpx_helper.c',
   'seg_helper.c',
   'tcg-cpu.c',
-  'translate.c'), if_false: files('tcg-stub.c'))
+  'translate.c'))
+tcg_module_ss.add_all(when: 'TARGET_I386', if_true: files_ss)
+tcg_module_ss.add_all(when: 'TARGET_X86_64', if_true: files_ss)
 
 subdir('sysemu')
 subdir('user')
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
index 2e444e766a5b..50bfd5094787 100644
--- a/target/i386/tcg/sysemu/meson.build
+++ b/target/i386/tcg/sysemu/meson.build
@@ -1,4 +1,5 @@
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
+files_ss = ss.source_set()
+files_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
   'tcg-cpu.c',
   'smm_helper.c',
   'excp_helper.c',
@@ -8,3 +9,5 @@ i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
   'svm_helper.c',
   'seg_helper.c',
 ))
+tcg_module_ss.add_all(when: 'TARGET_I386', if_true: files_ss)
+tcg_module_ss.add_all(when: 'TARGET_X86_64', if_true: files_ss)
-- 
2.31.1

[PATCH 07/29] tcg/module: move files to module [target/i386/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 target/i386/tcg/meson.build        | 9 +++++++--
 target/i386/tcg/sysemu/meson.build | 5 ++++-
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/target/i386/tcg/meson.build b/target/i386/tcg/meson.build
index f9110e890c8a..7bbe3d926975 100644
--- a/target/i386/tcg/meson.build
+++ b/target/i386/tcg/meson.build
@@ -1,4 +1,7 @@
-i386_ss.add(when: 'CONFIG_TCG', if_true: files(
+i386_softmmu_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
+
+files_ss = ss.source_set()
+files_ss.add(when: 'CONFIG_TCG', if_true: files(
   'bpt_helper.c',
   'cc_helper.c',
   'excp_helper.c',
@@ -9,7 +12,9 @@ i386_ss.add(when: 'CONFIG_TCG', if_true: files(
   'mpx_helper.c',
   'seg_helper.c',
   'tcg-cpu.c',
-  'translate.c'), if_false: files('tcg-stub.c'))
+  'translate.c'))
+tcg_module_ss.add_all(when: 'TARGET_I386', if_true: files_ss)
+tcg_module_ss.add_all(when: 'TARGET_X86_64', if_true: files_ss)
 
 subdir('sysemu')
 subdir('user')
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
index 2e444e766a5b..50bfd5094787 100644
--- a/target/i386/tcg/sysemu/meson.build
+++ b/target/i386/tcg/sysemu/meson.build
@@ -1,4 +1,5 @@
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
+files_ss = ss.source_set()
+files_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
   'tcg-cpu.c',
   'smm_helper.c',
   'excp_helper.c',
@@ -8,3 +9,5 @@ i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
   'svm_helper.c',
   'seg_helper.c',
 ))
+tcg_module_ss.add_all(when: 'TARGET_I386', if_true: files_ss)
+tcg_module_ss.add_all(when: 'TARGET_X86_64', if_true: files_ss)
-- 
2.31.1

[PATCH 08/29] move cpu-exec-common.c from tcg module to core qemu [accel/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 6471fe7832d7..ec74e17a8285 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,7 +1,10 @@
+specific_ss.add(when: 'CONFIG_TCG', if_true: files(
+  'cpu-exec-common.c',
+))
+
 tcg_ss = ss.source_set()
 tcg_ss.add(files(
   'tcg-all.c',
-  'cpu-exec-common.c',
   'cpu-exec.c',
   'tcg-runtime-gvec.c',
   'tcg-runtime.c',
-- 
2.31.1

[PATCH 08/29] move cpu-exec-common.c from tcg module to core qemu [accel/tcg]

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 accel/tcg/meson.build | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 6471fe7832d7..ec74e17a8285 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,7 +1,10 @@
+specific_ss.add(when: 'CONFIG_TCG', if_true: files(
+  'cpu-exec-common.c',
+))
+
 tcg_ss = ss.source_set()
 tcg_ss.add(files(
   'tcg-all.c',
-  'cpu-exec-common.c',
   'cpu-exec.c',
   'tcg-runtime-gvec.c',
   'tcg-runtime.c',
-- 
2.31.1

[PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Gerd Hoffmann]

Add TCGModuleOps struct, empty for now, followup patches will fill it.
This struct has pointers for tcg functions which are called by core
qemu.

The struct is initialized (at compile time) with pointers to stub
functions.  When the tcg module loads it will update the function
pointers to point to the real functions instead.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module.h | 8 ++++++++
 accel/tcg/tcg-module.c   | 5 +++++
 accel/tcg/meson.build    | 4 ++++
 3 files changed, 17 insertions(+)
 create mode 100644 include/tcg/tcg-module.h
 create mode 100644 accel/tcg/tcg-module.c

diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
new file mode 100644
index 000000000000..7e87aecb2357
--- /dev/null
+++ b/include/tcg/tcg-module.h
@@ -0,0 +1,8 @@
+#ifndef TCG_MODULE_H
+#define TCG_MODULE_H
+
+struct TCGModuleOps {
+};
+extern struct TCGModuleOps tcg;
+
+#endif /* TCG_MODULE_H */
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
new file mode 100644
index 000000000000..e864fb20c141
--- /dev/null
+++ b/accel/tcg/tcg-module.c
@@ -0,0 +1,5 @@
+#include "qemu/osdep.h"
+#include "tcg/tcg-module.h"
+
+struct TCGModuleOps tcg = {
+};
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index ec74e17a8285..93cbbf9f3926 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,3 +1,7 @@
+specific_ss.add(files(
+  'tcg-module.c',
+))
+
 specific_ss.add(when: 'CONFIG_TCG', if_true: files(
   'cpu-exec-common.c',
 ))
-- 
2.31.1

[PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Gerd Hoffmann]

Add TCGModuleOps struct, empty for now, followup patches will fill it.
This struct has pointers for tcg functions which are called by core
qemu.

The struct is initialized (at compile time) with pointers to stub
functions.  When the tcg module loads it will update the function
pointers to point to the real functions instead.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module.h | 8 ++++++++
 accel/tcg/tcg-module.c   | 5 +++++
 accel/tcg/meson.build    | 4 ++++
 3 files changed, 17 insertions(+)
 create mode 100644 include/tcg/tcg-module.h
 create mode 100644 accel/tcg/tcg-module.c

diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
new file mode 100644
index 000000000000..7e87aecb2357
--- /dev/null
+++ b/include/tcg/tcg-module.h
@@ -0,0 +1,8 @@
+#ifndef TCG_MODULE_H
+#define TCG_MODULE_H
+
+struct TCGModuleOps {
+};
+extern struct TCGModuleOps tcg;
+
+#endif /* TCG_MODULE_H */
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
new file mode 100644
index 000000000000..e864fb20c141
--- /dev/null
+++ b/accel/tcg/tcg-module.c
@@ -0,0 +1,5 @@
+#include "qemu/osdep.h"
+#include "tcg/tcg-module.h"
+
+struct TCGModuleOps tcg = {
+};
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index ec74e17a8285..93cbbf9f3926 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,3 +1,7 @@
+specific_ss.add(files(
+  'tcg-module.c',
+))
+
 specific_ss.add(when: 'CONFIG_TCG', if_true: files(
   'cpu-exec-common.c',
 ))
-- 
2.31.1

Re: [PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Philippe Mathieu-Daudé]

On 8/31/21 14:15, Gerd Hoffmann wrote:
> Add TCGModuleOps struct, empty for now, followup patches will fill it.
> This struct has pointers for tcg functions which are called by core
> qemu.
> 
> The struct is initialized (at compile time) with pointers to stub
> functions.  When the tcg module loads it will update the function
> pointers to point to the real functions instead.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/tcg/tcg-module.h | 8 ++++++++
>  accel/tcg/tcg-module.c   | 5 +++++
>  accel/tcg/meson.build    | 4 ++++
>  3 files changed, 17 insertions(+)
>  create mode 100644 include/tcg/tcg-module.h
>  create mode 100644 accel/tcg/tcg-module.c
> 
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> new file mode 100644
> index 000000000000..7e87aecb2357
> --- /dev/null
> +++ b/include/tcg/tcg-module.h
> @@ -0,0 +1,8 @@
> +#ifndef TCG_MODULE_H
> +#define TCG_MODULE_H
> +
> +struct TCGModuleOps {
> +};
> +extern struct TCGModuleOps tcg;

TCG functions taking a CPUState argument should reside in
CPUClass's AccelCPUClass/TCGCPUOps, not a global struct.

Re: [PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Philippe Mathieu-Daudé]

On 8/31/21 14:15, Gerd Hoffmann wrote:
> Add TCGModuleOps struct, empty for now, followup patches will fill it.
> This struct has pointers for tcg functions which are called by core
> qemu.
> 
> The struct is initialized (at compile time) with pointers to stub
> functions.  When the tcg module loads it will update the function
> pointers to point to the real functions instead.
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/tcg/tcg-module.h | 8 ++++++++
>  accel/tcg/tcg-module.c   | 5 +++++
>  accel/tcg/meson.build    | 4 ++++
>  3 files changed, 17 insertions(+)
>  create mode 100644 include/tcg/tcg-module.h
>  create mode 100644 accel/tcg/tcg-module.c
> 
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> new file mode 100644
> index 000000000000..7e87aecb2357
> --- /dev/null
> +++ b/include/tcg/tcg-module.h
> @@ -0,0 +1,8 @@
> +#ifndef TCG_MODULE_H
> +#define TCG_MODULE_H
> +
> +struct TCGModuleOps {
> +};
> +extern struct TCGModuleOps tcg;

TCG functions taking a CPUState argument should reside in
CPUClass's AccelCPUClass/TCGCPUOps, not a global struct.

Re: [PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Gerd Hoffmann]

  Hi,

> > +struct TCGModuleOps {
> > +};
> > +extern struct TCGModuleOps tcg;
> 
> TCG functions taking a CPUState argument should reside in
> CPUClass's AccelCPUClass/TCGCPUOps, not a global struct.

It's not that easy.  Tried that first, but using TCGCPUOps outside cpu
code doesn't work.

take care,
  Gerd

Re: [PATCH 09/29] tcg/module: add tcg-module.[ch] infrastructure

[Gerd Hoffmann]

  Hi,

> > +struct TCGModuleOps {
> > +};
> > +extern struct TCGModuleOps tcg;
> 
> TCG functions taking a CPUState argument should reside in
> CPUClass's AccelCPUClass/TCGCPUOps, not a global struct.

It's not that easy.  Tried that first, but using TCGCPUOps outside cpu
code doesn't work.

take care,
  Gerd

[PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h       |  4 +---
 include/tcg/tcg-module.h      |  1 +
 accel/tcg/cpu-exec-common.c   |  8 ++++++++
 accel/tcg/cputlb.c            |  7 +++++++
 accel/tcg/tcg-module.c        |  5 +++++
 accel/tcg/translate-all.c     |  8 --------
 cpu.c                         |  2 +-
 softmmu/physmem.c             |  6 +++---
 target/arm/helper.c           | 22 +++++++++++-----------
 target/i386/helper.c          |  8 ++++----
 target/i386/machine.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  2 +-
 target/i386/tcg/misc_helper.c |  2 +-
 target/mips/sysemu/cp0.c      |  2 +-
 target/s390x/gdbstub.c        |  2 +-
 target/s390x/sigp.c           |  2 +-
 16 files changed, 47 insertions(+), 36 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 5d1b6d80fbd3..ddb1ab797978 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,6 +25,7 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
+#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -337,9 +338,6 @@ static inline void tlb_flush_page_all_cpus_synced(CPUState *src,
                                                   target_ulong addr)
 {
 }
-static inline void tlb_flush(CPUState *cpu)
-{
-}
 static inline void tlb_flush_all_cpus(CPUState *src_cpu)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 7e87aecb2357..b94bfdd362ed 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -2,6 +2,7 @@
 #define TCG_MODULE_H
 
 struct TCGModuleOps {
+    void (*tlb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index be6fe45aa5a8..777ad00befc8 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -81,3 +81,11 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc)
     cpu->exception_index = EXCP_ATOMIC;
     cpu_loop_exit_restore(cpu, pc);
 }
+
+/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
+void tcg_flush_softmmu_tlb(CPUState *cs)
+{
+#ifdef CONFIG_SOFTMMU
+    tcg.tlb_flush(cs);
+#endif
+}
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b1e5471f949f..40c3d1b65ac5 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2767,3 +2767,10 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
     TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true));
     return full_ldq_code(env, addr, oi, 0);
 }
+
+static void tcg_module_ops_tlb(void)
+{
+    tcg.tlb_flush = tlb_flush;
+}
+
+type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index e864fb20c141..a1e5728c8c1b 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -1,5 +1,10 @@
 #include "qemu/osdep.h"
 #include "tcg/tcg-module.h"
 
+static void update_cpu_stub(CPUState *cpu)
+{
+}
+
 struct TCGModuleOps tcg = {
+    .tlb_flush = update_cpu_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index bbfcfb698c07..c7547cd923b4 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -2463,11 +2463,3 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
-
-/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
-void tcg_flush_softmmu_tlb(CPUState *cs)
-{
-#ifdef CONFIG_SOFTMMU
-    tlb_flush(cs);
-#endif
-}
diff --git a/cpu.c b/cpu.c
index e1799a15bcf5..26277f387baf 100644
--- a/cpu.c
+++ b/cpu.c
@@ -51,7 +51,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
        version_id is increased. */
     cpu->interrupt_request &= ~0x01;
-    tlb_flush(cpu);
+    tcg.tlb_flush(cpu);
 
     /* loadvm has just updated the content of RAM, bypassing the
      * usual mechanisms that ensure we flush TBs for writes to
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 23e77cb77153..dd17f80120dc 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -589,7 +589,7 @@ static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
     if (!notifier->active) {
         return;
     }
-    tlb_flush(notifier->cpu);
+    tcg.tlb_flush(notifier->cpu);
     notifier->active = false;
     /* We leave the notifier struct on the list to avoid reallocating it later.
      * Generally the number of IOMMUs a CPU deals with will be small.
@@ -796,7 +796,7 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
     if (len <= in_page) {
         tlb_flush_page(cpu, addr);
     } else {
-        tlb_flush(cpu);
+        tcg.tlb_flush(cpu);
     }
 
     if (watchpoint)
@@ -2654,7 +2654,7 @@ static void tcg_commit(MemoryListener *listener)
      */
     d = address_space_to_dispatch(cpuas->as);
     qatomic_rcu_set(&cpuas->memory_dispatch, d);
-    tlb_flush(cpuas->cpu);
+    tcg.tlb_flush(cpuas->cpu);
 }
 
 static void memory_map_init(void)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index a7ae78146d4b..0da65edd78cd 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -674,7 +674,7 @@ static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
     ARMCPU *cpu = env_archcpu(env);
 
     raw_write(env, ri, value);
-    tlb_flush(CPU(cpu)); /* Flush TLB as domain not tracked in TLB */
+    tcg.tlb_flush(CPU(cpu)); /* Flush TLB as domain not tracked in TLB */
 }
 
 static void fcse_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
@@ -685,7 +685,7 @@ static void fcse_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
         /* Unlike real hardware the qemu TLB uses virtual addresses,
          * not modified virtual addresses, so this causes a TLB flush.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
         raw_write(env, ri, value);
     }
 }
@@ -701,7 +701,7 @@ static void contextidr_write(CPUARMState *env, const ARMCPRegInfo *ri,
          * format) this register includes the ASID, so do a TLB flush.
          * For PMSA it is purely a process ID and no action is needed.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     raw_write(env, ri, value);
 }
@@ -758,7 +758,7 @@ static void tlbiall_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_all_cpus_synced(cs);
     } else {
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
     }
 }
 
@@ -785,7 +785,7 @@ static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_all_cpus_synced(cs);
     } else {
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
     }
 }
 
@@ -3840,7 +3840,7 @@ static void pmsav7_write(CPUARMState *env, const ARMCPRegInfo *ri,
     }
 
     u32p += env->pmsav7.rnr[M_REG_NS];
-    tlb_flush(CPU(cpu)); /* Mappings may have changed - purge! */
+    tcg.tlb_flush(CPU(cpu)); /* Mappings may have changed - purge! */
     *u32p = value;
 }
 
@@ -3982,7 +3982,7 @@ static void vmsa_ttbcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
         /* With LPAE the TTBCR could result in a change of ASID
          * via the TTBCR.A1 bit, so do a TLB flush.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     /* Preserve the high half of TCR_EL1, set via TTBCR2.  */
     value = deposit64(tcr->raw_tcr, 0, 32, value);
@@ -4008,7 +4008,7 @@ static void vmsa_tcr_el12_write(CPUARMState *env, const ARMCPRegInfo *ri,
     TCR *tcr = raw_ptr(env, ri);
 
     /* For AArch64 the A1 bit could result in a change of ASID, so TLB flush. */
-    tlb_flush(CPU(cpu));
+    tcg.tlb_flush(CPU(cpu));
     tcr->raw_tcr = value;
 }
 
@@ -4019,7 +4019,7 @@ static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (cpreg_field_is_64bit(ri) &&
         extract64(raw_read(env, ri) ^ value, 48, 16) != 0) {
         ARMCPU *cpu = env_archcpu(env);
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     raw_write(env, ri, value);
 }
@@ -5035,7 +5035,7 @@ static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri,
     raw_write(env, ri, value);
 
     /* This may enable/disable the MMU, so do a TLB flush.  */
-    tlb_flush(CPU(cpu));
+    tcg.tlb_flush(CPU(cpu));
 
     if (ri->type & ARM_CP_SUPPRESS_TB_END) {
         /*
@@ -5574,7 +5574,7 @@ static void do_hcr_write(CPUARMState *env, uint64_t value, uint64_t valid_mask)
      * HCR_DCT enables tagging on (disabled) stage1 translation
      */
     if ((env->cp15.hcr_el2 ^ value) & (HCR_VM | HCR_PTW | HCR_DC | HCR_DCT)) {
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     env->cp15.hcr_el2 = value;
 
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 533b29cb91b6..100add713c5d 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
 
         /* when a20 is changed, all the MMU mappings are invalid, so
            we must flush everything */
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
         env->a20_mask = ~(1 << 20) | (a20_state << 20);
     }
 }
@@ -116,7 +116,7 @@ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0)
     qemu_log_mask(CPU_LOG_MMU, "CR0 update: CR0=0x%08x\n", new_cr0);
     if ((new_cr0 & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK)) !=
         (env->cr[0] & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK))) {
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
 
 #ifdef TARGET_X86_64
@@ -156,7 +156,7 @@ void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3)
     if (env->cr[0] & CR0_PG_MASK) {
         qemu_log_mask(CPU_LOG_MMU,
                         "CR3 update: CR3=" TARGET_FMT_lx "\n", new_cr3);
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 }
 
@@ -170,7 +170,7 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4)
     if ((new_cr4 ^ env->cr[4]) &
         (CR4_PGE_MASK | CR4_PAE_MASK | CR4_PSE_MASK |
          CR4_SMEP_MASK | CR4_SMAP_MASK | CR4_LA57_MASK)) {
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 
     /* Clear bits we're going to recompute.  */
diff --git a/target/i386/machine.c b/target/i386/machine.c
index f6f094f1c938..571e98853c64 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -383,7 +383,7 @@ static int cpu_post_load(void *opaque, int version_id)
         env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
         cpu_x86_update_dr7(env, dr7);
     }
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
     return 0;
 }
 
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index cdd8e9f9471f..eddf0bb9dfc4 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2874,7 +2874,7 @@ void helper_xrstor(CPUX86State *env, target_ulong ptr, uint64_t rfbm)
         }
         if (env->pkru != old_pkru) {
             CPUState *cs = env_cpu(env);
-            tlb_flush(cs);
+            tcg.tlb_flush(cs);
         }
     }
 }
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index baffa5d7ba9a..dc974dad6acc 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -142,5 +142,5 @@ void helper_wrpkru(CPUX86State *env, uint32_t ecx, uint64_t val)
     }
 
     env->pkru = val;
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
 }
diff --git a/target/mips/sysemu/cp0.c b/target/mips/sysemu/cp0.c
index bae37f515bf8..f966991c7cc9 100644
--- a/target/mips/sysemu/cp0.c
+++ b/target/mips/sysemu/cp0.c
@@ -81,7 +81,7 @@ void cpu_mips_store_status(CPUMIPSState *env, target_ulong val)
 #if defined(TARGET_MIPS64)
     if ((env->CP0_Status ^ old) & (old & (7 << CP0St_UX))) {
         /* Access to at least one of the 64-bit segments has been disabled */
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 #endif
     if (ase_mt_available(env)) {
diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c
index a5d69d0e0bc5..b60bdc1fbded 100644
--- a/target/s390x/gdbstub.c
+++ b/target/s390x/gdbstub.c
@@ -191,7 +191,7 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
     case S390_C0_REGNUM ... S390_C15_REGNUM:
         env->cregs[n] = ldtul_p(mem_buf);
         if (tcg_enabled()) {
-            tlb_flush(env_cpu(env));
+            tcg.tlb_flush(env_cpu(env));
         }
         cpu_synchronize_post_init(env_cpu(env));
         return 8;
diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c
index d57427ced84d..d2c0b877cee4 100644
--- a/target/s390x/sigp.c
+++ b/target/s390x/sigp.c
@@ -294,7 +294,7 @@ static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg)
     }
 
     cpu->env.psa = addr;
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
     cpu_synchronize_post_init(cs);
     si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 }
-- 
2.31.1

[PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h       |  4 +---
 include/tcg/tcg-module.h      |  1 +
 accel/tcg/cpu-exec-common.c   |  8 ++++++++
 accel/tcg/cputlb.c            |  7 +++++++
 accel/tcg/tcg-module.c        |  5 +++++
 accel/tcg/translate-all.c     |  8 --------
 cpu.c                         |  2 +-
 softmmu/physmem.c             |  6 +++---
 target/arm/helper.c           | 22 +++++++++++-----------
 target/i386/helper.c          |  8 ++++----
 target/i386/machine.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  2 +-
 target/i386/tcg/misc_helper.c |  2 +-
 target/mips/sysemu/cp0.c      |  2 +-
 target/s390x/gdbstub.c        |  2 +-
 target/s390x/sigp.c           |  2 +-
 16 files changed, 47 insertions(+), 36 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 5d1b6d80fbd3..ddb1ab797978 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,6 +25,7 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
+#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -337,9 +338,6 @@ static inline void tlb_flush_page_all_cpus_synced(CPUState *src,
                                                   target_ulong addr)
 {
 }
-static inline void tlb_flush(CPUState *cpu)
-{
-}
 static inline void tlb_flush_all_cpus(CPUState *src_cpu)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 7e87aecb2357..b94bfdd362ed 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -2,6 +2,7 @@
 #define TCG_MODULE_H
 
 struct TCGModuleOps {
+    void (*tlb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index be6fe45aa5a8..777ad00befc8 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -81,3 +81,11 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc)
     cpu->exception_index = EXCP_ATOMIC;
     cpu_loop_exit_restore(cpu, pc);
 }
+
+/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
+void tcg_flush_softmmu_tlb(CPUState *cs)
+{
+#ifdef CONFIG_SOFTMMU
+    tcg.tlb_flush(cs);
+#endif
+}
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b1e5471f949f..40c3d1b65ac5 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2767,3 +2767,10 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
     TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true));
     return full_ldq_code(env, addr, oi, 0);
 }
+
+static void tcg_module_ops_tlb(void)
+{
+    tcg.tlb_flush = tlb_flush;
+}
+
+type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index e864fb20c141..a1e5728c8c1b 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -1,5 +1,10 @@
 #include "qemu/osdep.h"
 #include "tcg/tcg-module.h"
 
+static void update_cpu_stub(CPUState *cpu)
+{
+}
+
 struct TCGModuleOps tcg = {
+    .tlb_flush = update_cpu_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index bbfcfb698c07..c7547cd923b4 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -2463,11 +2463,3 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
-
-/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
-void tcg_flush_softmmu_tlb(CPUState *cs)
-{
-#ifdef CONFIG_SOFTMMU
-    tlb_flush(cs);
-#endif
-}
diff --git a/cpu.c b/cpu.c
index e1799a15bcf5..26277f387baf 100644
--- a/cpu.c
+++ b/cpu.c
@@ -51,7 +51,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
        version_id is increased. */
     cpu->interrupt_request &= ~0x01;
-    tlb_flush(cpu);
+    tcg.tlb_flush(cpu);
 
     /* loadvm has just updated the content of RAM, bypassing the
      * usual mechanisms that ensure we flush TBs for writes to
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 23e77cb77153..dd17f80120dc 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -589,7 +589,7 @@ static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
     if (!notifier->active) {
         return;
     }
-    tlb_flush(notifier->cpu);
+    tcg.tlb_flush(notifier->cpu);
     notifier->active = false;
     /* We leave the notifier struct on the list to avoid reallocating it later.
      * Generally the number of IOMMUs a CPU deals with will be small.
@@ -796,7 +796,7 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
     if (len <= in_page) {
         tlb_flush_page(cpu, addr);
     } else {
-        tlb_flush(cpu);
+        tcg.tlb_flush(cpu);
     }
 
     if (watchpoint)
@@ -2654,7 +2654,7 @@ static void tcg_commit(MemoryListener *listener)
      */
     d = address_space_to_dispatch(cpuas->as);
     qatomic_rcu_set(&cpuas->memory_dispatch, d);
-    tlb_flush(cpuas->cpu);
+    tcg.tlb_flush(cpuas->cpu);
 }
 
 static void memory_map_init(void)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index a7ae78146d4b..0da65edd78cd 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -674,7 +674,7 @@ static void dacr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
     ARMCPU *cpu = env_archcpu(env);
 
     raw_write(env, ri, value);
-    tlb_flush(CPU(cpu)); /* Flush TLB as domain not tracked in TLB */
+    tcg.tlb_flush(CPU(cpu)); /* Flush TLB as domain not tracked in TLB */
 }
 
 static void fcse_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
@@ -685,7 +685,7 @@ static void fcse_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
         /* Unlike real hardware the qemu TLB uses virtual addresses,
          * not modified virtual addresses, so this causes a TLB flush.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
         raw_write(env, ri, value);
     }
 }
@@ -701,7 +701,7 @@ static void contextidr_write(CPUARMState *env, const ARMCPRegInfo *ri,
          * format) this register includes the ASID, so do a TLB flush.
          * For PMSA it is purely a process ID and no action is needed.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     raw_write(env, ri, value);
 }
@@ -758,7 +758,7 @@ static void tlbiall_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_all_cpus_synced(cs);
     } else {
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
     }
 }
 
@@ -785,7 +785,7 @@ static void tlbiasid_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_all_cpus_synced(cs);
     } else {
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
     }
 }
 
@@ -3840,7 +3840,7 @@ static void pmsav7_write(CPUARMState *env, const ARMCPRegInfo *ri,
     }
 
     u32p += env->pmsav7.rnr[M_REG_NS];
-    tlb_flush(CPU(cpu)); /* Mappings may have changed - purge! */
+    tcg.tlb_flush(CPU(cpu)); /* Mappings may have changed - purge! */
     *u32p = value;
 }
 
@@ -3982,7 +3982,7 @@ static void vmsa_ttbcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
         /* With LPAE the TTBCR could result in a change of ASID
          * via the TTBCR.A1 bit, so do a TLB flush.
          */
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     /* Preserve the high half of TCR_EL1, set via TTBCR2.  */
     value = deposit64(tcr->raw_tcr, 0, 32, value);
@@ -4008,7 +4008,7 @@ static void vmsa_tcr_el12_write(CPUARMState *env, const ARMCPRegInfo *ri,
     TCR *tcr = raw_ptr(env, ri);
 
     /* For AArch64 the A1 bit could result in a change of ASID, so TLB flush. */
-    tlb_flush(CPU(cpu));
+    tcg.tlb_flush(CPU(cpu));
     tcr->raw_tcr = value;
 }
 
@@ -4019,7 +4019,7 @@ static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (cpreg_field_is_64bit(ri) &&
         extract64(raw_read(env, ri) ^ value, 48, 16) != 0) {
         ARMCPU *cpu = env_archcpu(env);
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     raw_write(env, ri, value);
 }
@@ -5035,7 +5035,7 @@ static void sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri,
     raw_write(env, ri, value);
 
     /* This may enable/disable the MMU, so do a TLB flush.  */
-    tlb_flush(CPU(cpu));
+    tcg.tlb_flush(CPU(cpu));
 
     if (ri->type & ARM_CP_SUPPRESS_TB_END) {
         /*
@@ -5574,7 +5574,7 @@ static void do_hcr_write(CPUARMState *env, uint64_t value, uint64_t valid_mask)
      * HCR_DCT enables tagging on (disabled) stage1 translation
      */
     if ((env->cp15.hcr_el2 ^ value) & (HCR_VM | HCR_PTW | HCR_DC | HCR_DCT)) {
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
     env->cp15.hcr_el2 = value;
 
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 533b29cb91b6..100add713c5d 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
 
         /* when a20 is changed, all the MMU mappings are invalid, so
            we must flush everything */
-        tlb_flush(cs);
+        tcg.tlb_flush(cs);
         env->a20_mask = ~(1 << 20) | (a20_state << 20);
     }
 }
@@ -116,7 +116,7 @@ void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0)
     qemu_log_mask(CPU_LOG_MMU, "CR0 update: CR0=0x%08x\n", new_cr0);
     if ((new_cr0 & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK)) !=
         (env->cr[0] & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK))) {
-        tlb_flush(CPU(cpu));
+        tcg.tlb_flush(CPU(cpu));
     }
 
 #ifdef TARGET_X86_64
@@ -156,7 +156,7 @@ void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3)
     if (env->cr[0] & CR0_PG_MASK) {
         qemu_log_mask(CPU_LOG_MMU,
                         "CR3 update: CR3=" TARGET_FMT_lx "\n", new_cr3);
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 }
 
@@ -170,7 +170,7 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4)
     if ((new_cr4 ^ env->cr[4]) &
         (CR4_PGE_MASK | CR4_PAE_MASK | CR4_PSE_MASK |
          CR4_SMEP_MASK | CR4_SMAP_MASK | CR4_LA57_MASK)) {
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 
     /* Clear bits we're going to recompute.  */
diff --git a/target/i386/machine.c b/target/i386/machine.c
index f6f094f1c938..571e98853c64 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -383,7 +383,7 @@ static int cpu_post_load(void *opaque, int version_id)
         env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
         cpu_x86_update_dr7(env, dr7);
     }
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
     return 0;
 }
 
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index cdd8e9f9471f..eddf0bb9dfc4 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2874,7 +2874,7 @@ void helper_xrstor(CPUX86State *env, target_ulong ptr, uint64_t rfbm)
         }
         if (env->pkru != old_pkru) {
             CPUState *cs = env_cpu(env);
-            tlb_flush(cs);
+            tcg.tlb_flush(cs);
         }
     }
 }
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index baffa5d7ba9a..dc974dad6acc 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -142,5 +142,5 @@ void helper_wrpkru(CPUX86State *env, uint32_t ecx, uint64_t val)
     }
 
     env->pkru = val;
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
 }
diff --git a/target/mips/sysemu/cp0.c b/target/mips/sysemu/cp0.c
index bae37f515bf8..f966991c7cc9 100644
--- a/target/mips/sysemu/cp0.c
+++ b/target/mips/sysemu/cp0.c
@@ -81,7 +81,7 @@ void cpu_mips_store_status(CPUMIPSState *env, target_ulong val)
 #if defined(TARGET_MIPS64)
     if ((env->CP0_Status ^ old) & (old & (7 << CP0St_UX))) {
         /* Access to at least one of the 64-bit segments has been disabled */
-        tlb_flush(env_cpu(env));
+        tcg.tlb_flush(env_cpu(env));
     }
 #endif
     if (ase_mt_available(env)) {
diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c
index a5d69d0e0bc5..b60bdc1fbded 100644
--- a/target/s390x/gdbstub.c
+++ b/target/s390x/gdbstub.c
@@ -191,7 +191,7 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
     case S390_C0_REGNUM ... S390_C15_REGNUM:
         env->cregs[n] = ldtul_p(mem_buf);
         if (tcg_enabled()) {
-            tlb_flush(env_cpu(env));
+            tcg.tlb_flush(env_cpu(env));
         }
         cpu_synchronize_post_init(env_cpu(env));
         return 8;
diff --git a/target/s390x/sigp.c b/target/s390x/sigp.c
index d57427ced84d..d2c0b877cee4 100644
--- a/target/s390x/sigp.c
+++ b/target/s390x/sigp.c
@@ -294,7 +294,7 @@ static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg)
     }
 
     cpu->env.psa = addr;
-    tlb_flush(cs);
+    tcg.tlb_flush(cs);
     cpu_synchronize_post_init(cs);
     si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 }
-- 
2.31.1

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 8/31/21 2:15 PM, Gerd Hoffmann wrote:
> diff --git a/target/i386/helper.c b/target/i386/helper.c
> index 533b29cb91b6..100add713c5d 100644
> --- a/target/i386/helper.c
> +++ b/target/i386/helper.c
> @@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
>   
>           /* when a20 is changed, all the MMU mappings are invalid, so
>              we must flush everything */
> -        tlb_flush(cs);
> +        tcg.tlb_flush(cs);

I think this is a mistake.

(1) If tcg module is not enabled, we should be able to make a direct call.

(2) A *proper* modularization would load the target/ stuff as a module as well, at which 
point this should be a call through the PLT, not an indirect call after a couple of 
indirect pointer loads.

So IMO we want to retain the direct function call syntax in all the uses.  I think you 
want to put wrapper functions doing the indirection somewhere -- possibly tcg-module.c.


r~

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 8/31/21 2:15 PM, Gerd Hoffmann wrote:
> diff --git a/target/i386/helper.c b/target/i386/helper.c
> index 533b29cb91b6..100add713c5d 100644
> --- a/target/i386/helper.c
> +++ b/target/i386/helper.c
> @@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
>   
>           /* when a20 is changed, all the MMU mappings are invalid, so
>              we must flush everything */
> -        tlb_flush(cs);
> +        tcg.tlb_flush(cs);

I think this is a mistake.

(1) If tcg module is not enabled, we should be able to make a direct call.

(2) A *proper* modularization would load the target/ stuff as a module as well, at which 
point this should be a call through the PLT, not an indirect call after a couple of 
indirect pointer loads.

So IMO we want to retain the direct function call syntax in all the uses.  I think you 
want to put wrapper functions doing the indirection somewhere -- possibly tcg-module.c.


r~

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

On Thu, Sep 02, 2021 at 03:09:15PM +0200, Richard Henderson wrote:
> On 8/31/21 2:15 PM, Gerd Hoffmann wrote:
> > diff --git a/target/i386/helper.c b/target/i386/helper.c
> > index 533b29cb91b6..100add713c5d 100644
> > --- a/target/i386/helper.c
> > +++ b/target/i386/helper.c
> > @@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
> >           /* when a20 is changed, all the MMU mappings are invalid, so
> >              we must flush everything */
> > -        tlb_flush(cs);
> > +        tcg.tlb_flush(cs);
> 
> I think this is a mistake.
> 
> (1) If tcg module is not enabled, we should be able to make a direct call.
> 
> So IMO we want to retain the direct function call syntax in all the uses.  I
> think you want to put wrapper functions doing the indirection somewhere --
> possibly tcg-module.c.

Hmm, when we want avoid indirection I guess it makes sense to use inline
wrappers in tcg-module.h

How about the patch below? (proof-of-concept for tlb_flush, on top of
this series)?

thanks,
  Gerd

From 22f5a216f410fccb769d0f7496c3c36f4b131833 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 28 Sep 2021 11:51:12 +0200
Subject: [PATCH] tlb_flush inline wrapper

---
 include/exec/exec-all.h  |  2 ++
 include/tcg/tcg-module.h | 13 +++++++++++++
 meson.build              |  3 ++-
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 608d768a4371..72e4e3b5bb89 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -160,7 +160,9 @@ void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
  * so this is generally safe. If more selective flushing is required
  * use one of the other functions for efficiency.
  */
+#ifdef TCG_DIRECT_CALL
 void tlb_flush(CPUState *cpu);
+#endif
 /**
  * tlb_flush_all_cpus:
  * @cpu: src CPU of the flush
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index e9c0615b51d9..b3c0f53ea9f3 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -1,6 +1,10 @@
 #ifndef TCG_MODULE_H
 #define TCG_MODULE_H
 
+#if defined(CONFIG_TCG_BUILTIN) || defined(TCG_MODULE)
+# define TCG_DIRECT_CALL 1
+#endif
+
 #include "exec/exec-all.h"
 
 struct TCGModuleOps {
@@ -21,4 +25,13 @@ struct TCGModuleOps {
 };
 extern struct TCGModuleOps tcg;
 
+#ifndef TCG_DIRECT_CALL
+
+static inline void tlb_flush(CPUState *cpu)
+{
+    tcg.tlb_flush(cpu);
+}
+
+#endif
+
 #endif /* TCG_MODULE_H */
diff --git a/meson.build b/meson.build
index 15ef4d3c4187..afe07e7d59c3 100644
--- a/meson.build
+++ b/meson.build
@@ -2317,8 +2317,9 @@ subdir('tests/qtest/libqos')
 subdir('tests/qtest/fuzz')
 
 # accel modules
+tcg_module_cflags = declare_dependency(compile_args: '-DTCG_MODULE=1')
 tcg_real_module_ss = ss.source_set()
-tcg_real_module_ss.add_all(when: 'CONFIG_TCG_MODULAR', if_true: tcg_module_ss)
+tcg_real_module_ss.add_all(when: ['CONFIG_TCG_MODULAR', tcg_module_cflags], if_true: tcg_module_ss)
 specific_ss.add_all(when: 'CONFIG_TCG_BUILTIN', if_true: tcg_module_ss)
 target_modules += { 'accel' : { 'qtest': qtest_module_ss,
                                 'tcg': tcg_real_module_ss }}
-- 
2.31.1

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

On Thu, Sep 02, 2021 at 03:09:15PM +0200, Richard Henderson wrote:
> On 8/31/21 2:15 PM, Gerd Hoffmann wrote:
> > diff --git a/target/i386/helper.c b/target/i386/helper.c
> > index 533b29cb91b6..100add713c5d 100644
> > --- a/target/i386/helper.c
> > +++ b/target/i386/helper.c
> > @@ -103,7 +103,7 @@ void x86_cpu_set_a20(X86CPU *cpu, int a20_state)
> >           /* when a20 is changed, all the MMU mappings are invalid, so
> >              we must flush everything */
> > -        tlb_flush(cs);
> > +        tcg.tlb_flush(cs);
> 
> I think this is a mistake.
> 
> (1) If tcg module is not enabled, we should be able to make a direct call.
> 
> So IMO we want to retain the direct function call syntax in all the uses.  I
> think you want to put wrapper functions doing the indirection somewhere --
> possibly tcg-module.c.

Hmm, when we want avoid indirection I guess it makes sense to use inline
wrappers in tcg-module.h

How about the patch below? (proof-of-concept for tlb_flush, on top of
this series)?

thanks,
  Gerd

From 22f5a216f410fccb769d0f7496c3c36f4b131833 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 28 Sep 2021 11:51:12 +0200
Subject: [PATCH] tlb_flush inline wrapper

---
 include/exec/exec-all.h  |  2 ++
 include/tcg/tcg-module.h | 13 +++++++++++++
 meson.build              |  3 ++-
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 608d768a4371..72e4e3b5bb89 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -160,7 +160,9 @@ void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
  * so this is generally safe. If more selective flushing is required
  * use one of the other functions for efficiency.
  */
+#ifdef TCG_DIRECT_CALL
 void tlb_flush(CPUState *cpu);
+#endif
 /**
  * tlb_flush_all_cpus:
  * @cpu: src CPU of the flush
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index e9c0615b51d9..b3c0f53ea9f3 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -1,6 +1,10 @@
 #ifndef TCG_MODULE_H
 #define TCG_MODULE_H
 
+#if defined(CONFIG_TCG_BUILTIN) || defined(TCG_MODULE)
+# define TCG_DIRECT_CALL 1
+#endif
+
 #include "exec/exec-all.h"
 
 struct TCGModuleOps {
@@ -21,4 +25,13 @@ struct TCGModuleOps {
 };
 extern struct TCGModuleOps tcg;
 
+#ifndef TCG_DIRECT_CALL
+
+static inline void tlb_flush(CPUState *cpu)
+{
+    tcg.tlb_flush(cpu);
+}
+
+#endif
+
 #endif /* TCG_MODULE_H */
diff --git a/meson.build b/meson.build
index 15ef4d3c4187..afe07e7d59c3 100644
--- a/meson.build
+++ b/meson.build
@@ -2317,8 +2317,9 @@ subdir('tests/qtest/libqos')
 subdir('tests/qtest/fuzz')
 
 # accel modules
+tcg_module_cflags = declare_dependency(compile_args: '-DTCG_MODULE=1')
 tcg_real_module_ss = ss.source_set()
-tcg_real_module_ss.add_all(when: 'CONFIG_TCG_MODULAR', if_true: tcg_module_ss)
+tcg_real_module_ss.add_all(when: ['CONFIG_TCG_MODULAR', tcg_module_cflags], if_true: tcg_module_ss)
 specific_ss.add_all(when: 'CONFIG_TCG_BUILTIN', if_true: tcg_module_ss)
 target_modules += { 'accel' : { 'qtest': qtest_module_ss,
                                 'tcg': tcg_real_module_ss }}
-- 
2.31.1

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 9/28/21 7:32 AM, Gerd Hoffmann wrote:
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 608d768a4371..72e4e3b5bb89 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -160,7 +160,9 @@ void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
>    * so this is generally safe. If more selective flushing is required
>    * use one of the other functions for efficiency.
>    */
> +#ifdef TCG_DIRECT_CALL
>   void tlb_flush(CPUState *cpu);
> +#endif

I'm pretty sure you can drop these ifdefs.  Just because there's a regular declaration for 
a function doesn't mean a subsequent inline definition does not apply.

And even if that didn't work, I'd be willing to trade inline expansion for not adding lots 
of ifdefs...

> +static inline void tlb_flush(CPUState *cpu)
> +{
> +    tcg.tlb_flush(cpu);
> +}

... these could just as well be out-of-line.


r~

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 9/28/21 7:32 AM, Gerd Hoffmann wrote:
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 608d768a4371..72e4e3b5bb89 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -160,7 +160,9 @@ void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
>    * so this is generally safe. If more selective flushing is required
>    * use one of the other functions for efficiency.
>    */
> +#ifdef TCG_DIRECT_CALL
>   void tlb_flush(CPUState *cpu);
> +#endif

I'm pretty sure you can drop these ifdefs.  Just because there's a regular declaration for 
a function doesn't mean a subsequent inline definition does not apply.

And even if that didn't work, I'd be willing to trade inline expansion for not adding lots 
of ifdefs...

> +static inline void tlb_flush(CPUState *cpu)
> +{
> +    tcg.tlb_flush(cpu);
> +}

... these could just as well be out-of-line.


r~

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

> > +#ifdef TCG_DIRECT_CALL
> >   void tlb_flush(CPUState *cpu);
> > +#endif
> 
> I'm pretty sure you can drop these ifdefs.  Just because there's a regular
> declaration for a function doesn't mean a subsequent inline definition does
> not apply.

Couldn't get this work.  With "static inline" I get declaration
mismatch, with only "inline" I get duplicate symbols.

> And even if that didn't work, I'd be willing to trade inline expansion for
> not adding lots of ifdefs...

That works.  Patch below (replacement for this patch).

TODO: Not sure whenever "check function pointer before call" or
"function pointers to stubs" is better.  Right now the patch has both
which clearly doesn't make sense.  Comments on that are welcome.

take care,
  Gerd

From fb1d9521fba11cf51f2719b587deeab79b7110ac Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 27 Jul 2021 12:01:24 +0200
Subject: [PATCH] tcg_funcs: Add tlb_flush to TCGModuleOps

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h     | 25 ++++++++++++-------------
 include/tcg/tcg-module.h    |  1 +
 accel/tcg/cpu-exec-common.c |  8 ++++++++
 accel/tcg/cputlb.c          |  7 +++++++
 accel/tcg/tcg-module.c      | 21 +++++++++++++++++++++
 accel/tcg/translate-all.c   |  8 --------
 6 files changed, 49 insertions(+), 21 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 9d5987ba047d..f846ab0c929d 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,6 +25,7 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
+#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -108,6 +109,17 @@ void cpu_address_space_init(CPUState *cpu, int asidx,
                             const char *prefix, MemoryRegion *mr);
 #endif
 
+/**
+ * tlb_flush:
+ * @cpu: CPU whose TLB should be flushed
+ *
+ * Flush the entire TLB for the specified CPU. Most CPU architectures
+ * allow the implementation to drop entries from the TLB at any time
+ * so this is generally safe. If more selective flushing is required
+ * use one of the other functions for efficiency.
+ */
+void tlb_flush(CPUState *cpu);
+
 #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
 /* cputlb.c */
 /**
@@ -150,16 +162,6 @@ void tlb_flush_page_all_cpus(CPUState *src, target_ulong addr);
  * the guests translation ends the TB.
  */
 void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
-/**
- * tlb_flush:
- * @cpu: CPU whose TLB should be flushed
- *
- * Flush the entire TLB for the specified CPU. Most CPU architectures
- * allow the implementation to drop entries from the TLB at any time
- * so this is generally safe. If more selective flushing is required
- * use one of the other functions for efficiency.
- */
-void tlb_flush(CPUState *cpu);
 /**
  * tlb_flush_all_cpus:
  * @cpu: src CPU of the flush
@@ -337,9 +339,6 @@ static inline void tlb_flush_page_all_cpus_synced(CPUState *src,
                                                   target_ulong addr)
 {
 }
-static inline void tlb_flush(CPUState *cpu)
-{
-}
 static inline void tlb_flush_all_cpus(CPUState *src_cpu)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 7e87aecb2357..b94bfdd362ed 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -2,6 +2,7 @@
 #define TCG_MODULE_H
 
 struct TCGModuleOps {
+    void (*tlb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index be6fe45aa5a8..43aae0b102c1 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -81,3 +81,11 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc)
     cpu->exception_index = EXCP_ATOMIC;
     cpu_loop_exit_restore(cpu, pc);
 }
+
+/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
+void tcg_flush_softmmu_tlb(CPUState *cs)
+{
+#ifdef CONFIG_SOFTMMU
+    tlb_flush(cs);
+#endif
+}
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b1e5471f949f..40c3d1b65ac5 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2767,3 +2767,10 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
     TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true));
     return full_ldq_code(env, addr, oi, 0);
 }
+
+static void tcg_module_ops_tlb(void)
+{
+    tcg.tlb_flush = tlb_flush;
+}
+
+type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index e864fb20c141..4d045b91647c 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -1,5 +1,26 @@
 #include "qemu/osdep.h"
 #include "tcg/tcg-module.h"
 
+static void update_cpu_stub(CPUState *cpu)
+{
+}
+
 struct TCGModuleOps tcg = {
+    .tlb_flush = update_cpu_stub,
 };
+
+/*
+ * CONFIG_TCG_MODULAR: jump through TCGModuleOps to tcg module
+ * !CONFIG_TCG or CONFIG_USER_ONLY: using the wrappers as stubs
+ * otherwise: using direct calls into tcg -> no wrappers
+ */
+#if defined(CONFIG_TCG_MODULAR) || !defined(CONFIG_TCG) || defined(CONFIG_USER_ONLY)
+
+void tlb_flush(CPUState *cpu)
+{
+    if (tcg.tlb_flush) {
+        tcg.tlb_flush(cpu);
+    }
+}
+
+#endif
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index fb9ebfad9e4a..9dba585ad413 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -2472,11 +2472,3 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
-
-/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
-void tcg_flush_softmmu_tlb(CPUState *cs)
-{
-#ifdef CONFIG_SOFTMMU
-    tlb_flush(cs);
-#endif
-}
-- 
2.31.1

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Gerd Hoffmann]

> > +#ifdef TCG_DIRECT_CALL
> >   void tlb_flush(CPUState *cpu);
> > +#endif
> 
> I'm pretty sure you can drop these ifdefs.  Just because there's a regular
> declaration for a function doesn't mean a subsequent inline definition does
> not apply.

Couldn't get this work.  With "static inline" I get declaration
mismatch, with only "inline" I get duplicate symbols.

> And even if that didn't work, I'd be willing to trade inline expansion for
> not adding lots of ifdefs...

That works.  Patch below (replacement for this patch).

TODO: Not sure whenever "check function pointer before call" or
"function pointers to stubs" is better.  Right now the patch has both
which clearly doesn't make sense.  Comments on that are welcome.

take care,
  Gerd

From fb1d9521fba11cf51f2719b587deeab79b7110ac Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Tue, 27 Jul 2021 12:01:24 +0200
Subject: [PATCH] tcg_funcs: Add tlb_flush to TCGModuleOps

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h     | 25 ++++++++++++-------------
 include/tcg/tcg-module.h    |  1 +
 accel/tcg/cpu-exec-common.c |  8 ++++++++
 accel/tcg/cputlb.c          |  7 +++++++
 accel/tcg/tcg-module.c      | 21 +++++++++++++++++++++
 accel/tcg/translate-all.c   |  8 --------
 6 files changed, 49 insertions(+), 21 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 9d5987ba047d..f846ab0c929d 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,6 +25,7 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
+#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -108,6 +109,17 @@ void cpu_address_space_init(CPUState *cpu, int asidx,
                             const char *prefix, MemoryRegion *mr);
 #endif
 
+/**
+ * tlb_flush:
+ * @cpu: CPU whose TLB should be flushed
+ *
+ * Flush the entire TLB for the specified CPU. Most CPU architectures
+ * allow the implementation to drop entries from the TLB at any time
+ * so this is generally safe. If more selective flushing is required
+ * use one of the other functions for efficiency.
+ */
+void tlb_flush(CPUState *cpu);
+
 #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
 /* cputlb.c */
 /**
@@ -150,16 +162,6 @@ void tlb_flush_page_all_cpus(CPUState *src, target_ulong addr);
  * the guests translation ends the TB.
  */
 void tlb_flush_page_all_cpus_synced(CPUState *src, target_ulong addr);
-/**
- * tlb_flush:
- * @cpu: CPU whose TLB should be flushed
- *
- * Flush the entire TLB for the specified CPU. Most CPU architectures
- * allow the implementation to drop entries from the TLB at any time
- * so this is generally safe. If more selective flushing is required
- * use one of the other functions for efficiency.
- */
-void tlb_flush(CPUState *cpu);
 /**
  * tlb_flush_all_cpus:
  * @cpu: src CPU of the flush
@@ -337,9 +339,6 @@ static inline void tlb_flush_page_all_cpus_synced(CPUState *src,
                                                   target_ulong addr)
 {
 }
-static inline void tlb_flush(CPUState *cpu)
-{
-}
 static inline void tlb_flush_all_cpus(CPUState *src_cpu)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 7e87aecb2357..b94bfdd362ed 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -2,6 +2,7 @@
 #define TCG_MODULE_H
 
 struct TCGModuleOps {
+    void (*tlb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index be6fe45aa5a8..43aae0b102c1 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -81,3 +81,11 @@ void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc)
     cpu->exception_index = EXCP_ATOMIC;
     cpu_loop_exit_restore(cpu, pc);
 }
+
+/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
+void tcg_flush_softmmu_tlb(CPUState *cs)
+{
+#ifdef CONFIG_SOFTMMU
+    tlb_flush(cs);
+#endif
+}
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b1e5471f949f..40c3d1b65ac5 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2767,3 +2767,10 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
     TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true));
     return full_ldq_code(env, addr, oi, 0);
 }
+
+static void tcg_module_ops_tlb(void)
+{
+    tcg.tlb_flush = tlb_flush;
+}
+
+type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index e864fb20c141..4d045b91647c 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -1,5 +1,26 @@
 #include "qemu/osdep.h"
 #include "tcg/tcg-module.h"
 
+static void update_cpu_stub(CPUState *cpu)
+{
+}
+
 struct TCGModuleOps tcg = {
+    .tlb_flush = update_cpu_stub,
 };
+
+/*
+ * CONFIG_TCG_MODULAR: jump through TCGModuleOps to tcg module
+ * !CONFIG_TCG or CONFIG_USER_ONLY: using the wrappers as stubs
+ * otherwise: using direct calls into tcg -> no wrappers
+ */
+#if defined(CONFIG_TCG_MODULAR) || !defined(CONFIG_TCG) || defined(CONFIG_USER_ONLY)
+
+void tlb_flush(CPUState *cpu)
+{
+    if (tcg.tlb_flush) {
+        tcg.tlb_flush(cpu);
+    }
+}
+
+#endif
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index fb9ebfad9e4a..9dba585ad413 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -2472,11 +2472,3 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
-
-/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
-void tcg_flush_softmmu_tlb(CPUState *cs)
-{
-#ifdef CONFIG_SOFTMMU
-    tlb_flush(cs);
-#endif
-}
-- 
2.31.1

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 9/29/21 3:09 AM, Gerd Hoffmann wrote:
> TODO: Not sure whenever "check function pointer before call" or
> "function pointers to stubs" is better.  Right now the patch has both
> which clearly doesn't make sense.  Comments on that are welcome.

I guess I don't mind either way, but we do need to pick one.

> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -25,6 +25,7 @@
>   #include "exec/cpu_ldst.h"
>   #endif
>   #include "sysemu/cpu-timers.h"
> +#include "tcg/tcg-module.h"

Surely not required here.

> +/**
> + * tlb_flush:
> + * @cpu: CPU whose TLB should be flushed
> + *
> + * Flush the entire TLB for the specified CPU. Most CPU architectures
> + * allow the implementation to drop entries from the TLB at any time
> + * so this is generally safe. If more selective flushing is required
> + * use one of the other functions for efficiency.
> + */
> +void tlb_flush(CPUState *cpu);
> +
>   #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)

Going too far here, since CONFIG_USER_ONLY always uses TCG, never uses modules, and does 
not implement a softmmu tlb that requires flushing.  I think you can just change the ifdef 
to remove the CONFIG_TCG check.

Alternately, we could keep this slight inefficiency to fix...

> +
> +/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
> +void tcg_flush_softmmu_tlb(CPUState *cs)
> +{
> +#ifdef CONFIG_SOFTMMU
> +    tlb_flush(cs);
> +#endif
> +}

... this bit of silliness.


r~

Re: [PATCH 10/29] tcg_funcs: Add tlb_flush to TCGModuleOps

[Richard Henderson]

On 9/29/21 3:09 AM, Gerd Hoffmann wrote:
> TODO: Not sure whenever "check function pointer before call" or
> "function pointers to stubs" is better.  Right now the patch has both
> which clearly doesn't make sense.  Comments on that are welcome.

I guess I don't mind either way, but we do need to pick one.

> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -25,6 +25,7 @@
>   #include "exec/cpu_ldst.h"
>   #endif
>   #include "sysemu/cpu-timers.h"
> +#include "tcg/tcg-module.h"

Surely not required here.

> +/**
> + * tlb_flush:
> + * @cpu: CPU whose TLB should be flushed
> + *
> + * Flush the entire TLB for the specified CPU. Most CPU architectures
> + * allow the implementation to drop entries from the TLB at any time
> + * so this is generally safe. If more selective flushing is required
> + * use one of the other functions for efficiency.
> + */
> +void tlb_flush(CPUState *cpu);
> +
>   #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)

Going too far here, since CONFIG_USER_ONLY always uses TCG, never uses modules, and does 
not implement a softmmu tlb that requires flushing.  I think you can just change the ifdef 
to remove the CONFIG_TCG check.

Alternately, we could keep this slight inefficiency to fix...

> +
> +/* This is a wrapper for common code that can not use CONFIG_SOFTMMU */
> +void tcg_flush_softmmu_tlb(CPUState *cs)
> +{
> +#ifdef CONFIG_SOFTMMU
> +    tlb_flush(cs);
> +#endif
> +}

... this bit of silliness.


r~

[PATCH 11/29] tcg_funcs: Add tlb_flush_page to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h  | 3 ---
 include/tcg/tcg-module.h | 3 +++
 accel/tcg/cputlb.c       | 1 +
 accel/tcg/tcg-module.c   | 5 +++++
 softmmu/physmem.c        | 4 ++--
 target/arm/helper.c      | 4 ++--
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index ddb1ab797978..43d89699e989 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -328,9 +328,6 @@ static inline void tlb_init(CPUState *cpu)
 static inline void tlb_destroy(CPUState *cpu)
 {
 }
-static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
-{
-}
 static inline void tlb_flush_page_all_cpus(CPUState *src, target_ulong addr)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index b94bfdd362ed..a903e3ee62c0 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -1,8 +1,11 @@
 #ifndef TCG_MODULE_H
 #define TCG_MODULE_H
 
+#include "exec/exec-all.h"
+
 struct TCGModuleOps {
     void (*tlb_flush)(CPUState *cpu);
+    void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 40c3d1b65ac5..1fcdb71a10a0 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2771,6 +2771,7 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
 static void tcg_module_ops_tlb(void)
 {
     tcg.tlb_flush = tlb_flush;
+    tcg.tlb_flush_page = tlb_flush_page;
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index a1e5728c8c1b..4d62160628bd 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -5,6 +5,11 @@ static void update_cpu_stub(CPUState *cpu)
 {
 }
 
+static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
+    .tlb_flush_page = tlb_flush_page_stub,
 };
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index dd17f80120dc..8fa5376de1c9 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -794,7 +794,7 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 
     in_page = -(addr | TARGET_PAGE_MASK);
     if (len <= in_page) {
-        tlb_flush_page(cpu, addr);
+        tcg.tlb_flush_page(cpu, addr);
     } else {
         tcg.tlb_flush(cpu);
     }
@@ -825,7 +825,7 @@ void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
 {
     QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
 
-    tlb_flush_page(cpu, watchpoint->vaddr);
+    tcg.tlb_flush_page(cpu, watchpoint->vaddr);
 
     g_free(watchpoint);
 }
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0da65edd78cd..6aa38cde15fe 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -772,7 +772,7 @@ static void tlbimva_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_page_all_cpus_synced(cs, value);
     } else {
-        tlb_flush_page(cs, value);
+        tcg.tlb_flush_page(cs, value);
     }
 }
 
@@ -799,7 +799,7 @@ static void tlbimvaa_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_page_all_cpus_synced(cs, value);
     } else {
-        tlb_flush_page(cs, value);
+        tcg.tlb_flush_page(cs, value);
     }
 }
 
-- 
2.31.1

[PATCH 11/29] tcg_funcs: Add tlb_flush_page to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h  | 3 ---
 include/tcg/tcg-module.h | 3 +++
 accel/tcg/cputlb.c       | 1 +
 accel/tcg/tcg-module.c   | 5 +++++
 softmmu/physmem.c        | 4 ++--
 target/arm/helper.c      | 4 ++--
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index ddb1ab797978..43d89699e989 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -328,9 +328,6 @@ static inline void tlb_init(CPUState *cpu)
 static inline void tlb_destroy(CPUState *cpu)
 {
 }
-static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
-{
-}
 static inline void tlb_flush_page_all_cpus(CPUState *src, target_ulong addr)
 {
 }
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index b94bfdd362ed..a903e3ee62c0 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -1,8 +1,11 @@
 #ifndef TCG_MODULE_H
 #define TCG_MODULE_H
 
+#include "exec/exec-all.h"
+
 struct TCGModuleOps {
     void (*tlb_flush)(CPUState *cpu);
+    void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 40c3d1b65ac5..1fcdb71a10a0 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2771,6 +2771,7 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
 static void tcg_module_ops_tlb(void)
 {
     tcg.tlb_flush = tlb_flush;
+    tcg.tlb_flush_page = tlb_flush_page;
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index a1e5728c8c1b..4d62160628bd 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -5,6 +5,11 @@ static void update_cpu_stub(CPUState *cpu)
 {
 }
 
+static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
+    .tlb_flush_page = tlb_flush_page_stub,
 };
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index dd17f80120dc..8fa5376de1c9 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -794,7 +794,7 @@ int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
 
     in_page = -(addr | TARGET_PAGE_MASK);
     if (len <= in_page) {
-        tlb_flush_page(cpu, addr);
+        tcg.tlb_flush_page(cpu, addr);
     } else {
         tcg.tlb_flush(cpu);
     }
@@ -825,7 +825,7 @@ void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint)
 {
     QTAILQ_REMOVE(&cpu->watchpoints, watchpoint, entry);
 
-    tlb_flush_page(cpu, watchpoint->vaddr);
+    tcg.tlb_flush_page(cpu, watchpoint->vaddr);
 
     g_free(watchpoint);
 }
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0da65edd78cd..6aa38cde15fe 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -772,7 +772,7 @@ static void tlbimva_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_page_all_cpus_synced(cs, value);
     } else {
-        tlb_flush_page(cs, value);
+        tcg.tlb_flush_page(cs, value);
     }
 }
 
@@ -799,7 +799,7 @@ static void tlbimvaa_write(CPUARMState *env, const ARMCPRegInfo *ri,
     if (tlb_force_broadcast(env)) {
         tlb_flush_page_all_cpus_synced(cs, value);
     } else {
-        tlb_flush_page(cs, value);
+        tcg.tlb_flush_page(cs, value);
     }
 }
 
-- 
2.31.1

[PATCH 12/29] tcg_funcs: Add tlb_reset_dirty to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h  | 1 -
 include/tcg/tcg-module.h | 3 +++
 accel/tcg/cputlb.c       | 3 ++-
 accel/tcg/tcg-module.c   | 9 +++++++++
 softmmu/physmem.c        | 2 +-
 5 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 43d89699e989..27fc489c57b5 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -691,7 +691,6 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr);
 tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr,
                                         void **hostp);
 
-void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
 void tlb_set_dirty(CPUState *cpu, target_ulong vaddr);
 
 MemoryRegionSection *
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index a903e3ee62c0..a14dcdb002db 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -6,6 +6,9 @@
 struct TCGModuleOps {
     void (*tlb_flush)(CPUState *cpu);
     void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
+#if defined(CONFIG_SOFTMMU)
+    void (*tlb_reset_dirty)(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
+#endif
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 1fcdb71a10a0..fa9c9064848c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1004,7 +1004,7 @@ static inline void copy_tlb_helper_locked(CPUTLBEntry *d, const CPUTLBEntry *s)
  * We must take tlb_c.lock to avoid racing with another vCPU update. The only
  * thing actually updated is the target TLB entry ->addr_write flags.
  */
-void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
+static void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
 {
     CPUArchState *env;
 
@@ -2772,6 +2772,7 @@ static void tcg_module_ops_tlb(void)
 {
     tcg.tlb_flush = tlb_flush;
     tcg.tlb_flush_page = tlb_flush_page;
+    tcg.tlb_reset_dirty = tlb_reset_dirty;
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 4d62160628bd..febf4e49981c 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -9,7 +9,16 @@ static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
 {
 }
 
+#if defined(CONFIG_SOFTMMU)
+static void tlb_reset_dirty_stub(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
+{
+}
+#endif
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
+#if defined(CONFIG_SOFTMMU)
+    .tlb_reset_dirty = tlb_reset_dirty_stub,
+#endif
 };
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 8fa5376de1c9..8b27827c533d 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -1015,7 +1015,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
     assert(block == qemu_get_ram_block(end - 1));
     start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
     CPU_FOREACH(cpu) {
-        tlb_reset_dirty(cpu, start1, length);
+        tcg.tlb_reset_dirty(cpu, start1, length);
     }
 }
 
-- 
2.31.1

[PATCH 12/29] tcg_funcs: Add tlb_reset_dirty to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h  | 1 -
 include/tcg/tcg-module.h | 3 +++
 accel/tcg/cputlb.c       | 3 ++-
 accel/tcg/tcg-module.c   | 9 +++++++++
 softmmu/physmem.c        | 2 +-
 5 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 43d89699e989..27fc489c57b5 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -691,7 +691,6 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr);
 tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr,
                                         void **hostp);
 
-void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
 void tlb_set_dirty(CPUState *cpu, target_ulong vaddr);
 
 MemoryRegionSection *
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index a903e3ee62c0..a14dcdb002db 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -6,6 +6,9 @@
 struct TCGModuleOps {
     void (*tlb_flush)(CPUState *cpu);
     void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
+#if defined(CONFIG_SOFTMMU)
+    void (*tlb_reset_dirty)(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
+#endif
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 1fcdb71a10a0..fa9c9064848c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1004,7 +1004,7 @@ static inline void copy_tlb_helper_locked(CPUTLBEntry *d, const CPUTLBEntry *s)
  * We must take tlb_c.lock to avoid racing with another vCPU update. The only
  * thing actually updated is the target TLB entry ->addr_write flags.
  */
-void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
+static void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
 {
     CPUArchState *env;
 
@@ -2772,6 +2772,7 @@ static void tcg_module_ops_tlb(void)
 {
     tcg.tlb_flush = tlb_flush;
     tcg.tlb_flush_page = tlb_flush_page;
+    tcg.tlb_reset_dirty = tlb_reset_dirty;
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 4d62160628bd..febf4e49981c 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -9,7 +9,16 @@ static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
 {
 }
 
+#if defined(CONFIG_SOFTMMU)
+static void tlb_reset_dirty_stub(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
+{
+}
+#endif
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
+#if defined(CONFIG_SOFTMMU)
+    .tlb_reset_dirty = tlb_reset_dirty_stub,
+#endif
 };
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 8fa5376de1c9..8b27827c533d 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -1015,7 +1015,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length)
     assert(block == qemu_get_ram_block(end - 1));
     start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
     CPU_FOREACH(cpu) {
-        tlb_reset_dirty(cpu, start1, length);
+        tcg.tlb_reset_dirty(cpu, start1, length);
     }
 }
 
-- 
2.31.1

[PATCH 13/29] tcg_funcs: Add tlb_plugin_lookup to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module.h | 2 ++
 accel/tcg/cputlb.c       | 3 +++
 accel/tcg/tcg-module.c   | 7 +++++++
 plugins/api.c            | 4 ++--
 4 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index a14dcdb002db..159cbd3e7ce6 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -8,6 +8,8 @@ struct TCGModuleOps {
     void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
 #if defined(CONFIG_SOFTMMU)
     void (*tlb_reset_dirty)(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
+    bool (*tlb_plugin_lookup)(CPUState *cpu, target_ulong addr, int mmu_idx,
+                              bool is_store, struct qemu_plugin_hwaddr *data);
 #endif
 };
 extern struct TCGModuleOps tcg;
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index fa9c9064848c..6a7872dff488 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2773,6 +2773,9 @@ static void tcg_module_ops_tlb(void)
     tcg.tlb_flush = tlb_flush;
     tcg.tlb_flush_page = tlb_flush_page;
     tcg.tlb_reset_dirty = tlb_reset_dirty;
+#ifdef CONFIG_PLUGIN
+    tcg.tlb_plugin_lookup = tlb_plugin_lookup;
+#endif
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index febf4e49981c..db3d3e9e9318 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -13,6 +13,12 @@ static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
 static void tlb_reset_dirty_stub(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
 {
 }
+
+static bool tlb_plugin_lookup_stub(CPUState *cpu, target_ulong addr, int mmu_idx,
+                                   bool is_store, struct qemu_plugin_hwaddr *data)
+{
+    return false;
+}
 #endif
 
 struct TCGModuleOps tcg = {
@@ -20,5 +26,6 @@ struct TCGModuleOps tcg = {
     .tlb_flush_page = tlb_flush_page_stub,
 #if defined(CONFIG_SOFTMMU)
     .tlb_reset_dirty = tlb_reset_dirty_stub,
+    .tlb_plugin_lookup = tlb_plugin_lookup_stub,
 #endif
 };
diff --git a/plugins/api.c b/plugins/api.c
index 2d521e6ba825..12b4cb914320 100644
--- a/plugins/api.c
+++ b/plugins/api.c
@@ -280,8 +280,8 @@ struct qemu_plugin_hwaddr *qemu_plugin_get_hwaddr(qemu_plugin_meminfo_t info,
     unsigned int mmu_idx = info >> TRACE_MEM_MMU_SHIFT;
     hwaddr_info.is_store = info & TRACE_MEM_ST;
 
-    if (!tlb_plugin_lookup(cpu, vaddr, mmu_idx,
-                           info & TRACE_MEM_ST, &hwaddr_info)) {
+    if (!tcg.tlb_plugin_lookup(cpu, vaddr, mmu_idx,
+                               info & TRACE_MEM_ST, &hwaddr_info)) {
         error_report("invalid use of qemu_plugin_get_hwaddr");
         return NULL;
     }
-- 
2.31.1

[PATCH 13/29] tcg_funcs: Add tlb_plugin_lookup to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module.h | 2 ++
 accel/tcg/cputlb.c       | 3 +++
 accel/tcg/tcg-module.c   | 7 +++++++
 plugins/api.c            | 4 ++--
 4 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index a14dcdb002db..159cbd3e7ce6 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -8,6 +8,8 @@ struct TCGModuleOps {
     void (*tlb_flush_page)(CPUState *cpu, target_ulong addr);
 #if defined(CONFIG_SOFTMMU)
     void (*tlb_reset_dirty)(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
+    bool (*tlb_plugin_lookup)(CPUState *cpu, target_ulong addr, int mmu_idx,
+                              bool is_store, struct qemu_plugin_hwaddr *data);
 #endif
 };
 extern struct TCGModuleOps tcg;
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index fa9c9064848c..6a7872dff488 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2773,6 +2773,9 @@ static void tcg_module_ops_tlb(void)
     tcg.tlb_flush = tlb_flush;
     tcg.tlb_flush_page = tlb_flush_page;
     tcg.tlb_reset_dirty = tlb_reset_dirty;
+#ifdef CONFIG_PLUGIN
+    tcg.tlb_plugin_lookup = tlb_plugin_lookup;
+#endif
 }
 
 type_init(tcg_module_ops_tlb);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index febf4e49981c..db3d3e9e9318 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -13,6 +13,12 @@ static void tlb_flush_page_stub(CPUState *cpu, target_ulong addr)
 static void tlb_reset_dirty_stub(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
 {
 }
+
+static bool tlb_plugin_lookup_stub(CPUState *cpu, target_ulong addr, int mmu_idx,
+                                   bool is_store, struct qemu_plugin_hwaddr *data)
+{
+    return false;
+}
 #endif
 
 struct TCGModuleOps tcg = {
@@ -20,5 +26,6 @@ struct TCGModuleOps tcg = {
     .tlb_flush_page = tlb_flush_page_stub,
 #if defined(CONFIG_SOFTMMU)
     .tlb_reset_dirty = tlb_reset_dirty_stub,
+    .tlb_plugin_lookup = tlb_plugin_lookup_stub,
 #endif
 };
diff --git a/plugins/api.c b/plugins/api.c
index 2d521e6ba825..12b4cb914320 100644
--- a/plugins/api.c
+++ b/plugins/api.c
@@ -280,8 +280,8 @@ struct qemu_plugin_hwaddr *qemu_plugin_get_hwaddr(qemu_plugin_meminfo_t info,
     unsigned int mmu_idx = info >> TRACE_MEM_MMU_SHIFT;
     hwaddr_info.is_store = info & TRACE_MEM_ST;
 
-    if (!tlb_plugin_lookup(cpu, vaddr, mmu_idx,
-                           info & TRACE_MEM_ST, &hwaddr_info)) {
+    if (!tcg.tlb_plugin_lookup(cpu, vaddr, mmu_idx,
+                               info & TRACE_MEM_ST, &hwaddr_info)) {
         error_report("invalid use of qemu_plugin_get_hwaddr");
         return NULL;
     }
-- 
2.31.1

[PATCH 14/29] tcg_funcs:Add tcg_exec_{realizefn, unrealizefn} to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/cpu-all.h   |  2 --
 include/tcg/tcg-module.h |  2 ++
 accel/tcg/cpu-exec.c     | 12 ++++++++++--
 accel/tcg/tcg-module.c   |  6 ++++++
 cpu.c                    |  4 ++--
 5 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 32cfb634c6a0..c2bfd0ea1de1 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -440,8 +440,6 @@ void dump_opcount_info(void);
 #ifdef CONFIG_TCG
 /* accel/tcg/cpu-exec.c */
 int cpu_exec(CPUState *cpu);
-void tcg_exec_realizefn(CPUState *cpu, Error **errp);
-void tcg_exec_unrealizefn(CPUState *cpu);
 #endif /* CONFIG_TCG */
 
 /* Returns: 0 on success, -1 on error */
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 159cbd3e7ce6..5dd4deb9ed57 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -11,6 +11,8 @@ struct TCGModuleOps {
     bool (*tlb_plugin_lookup)(CPUState *cpu, target_ulong addr, int mmu_idx,
                               bool is_store, struct qemu_plugin_hwaddr *data);
 #endif
+    void (*tcg_exec_unrealizefn)(CPUState *cpu);
+    void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index e5c0ccd1a2ab..d41d1d2bd24f 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -981,7 +981,7 @@ int cpu_exec(CPUState *cpu)
     return ret;
 }
 
-void tcg_exec_realizefn(CPUState *cpu, Error **errp)
+static void tcg_exec_realizefn(CPUState *cpu, Error **errp)
 {
     static bool tcg_target_initialized;
     CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -999,7 +999,7 @@ void tcg_exec_realizefn(CPUState *cpu, Error **errp)
 }
 
 /* undo the initializations in reverse order */
-void tcg_exec_unrealizefn(CPUState *cpu)
+static void tcg_exec_unrealizefn(CPUState *cpu)
 {
 #ifndef CONFIG_USER_ONLY
     tcg_iommu_free_notifier_list(cpu);
@@ -1031,3 +1031,11 @@ void dump_drift_info(void)
 }
 
 #endif /* !CONFIG_USER_ONLY */
+
+static void tcg_module_ops_exec(void)
+{
+    tcg.tcg_exec_realizefn = tcg_exec_realizefn;
+    tcg.tcg_exec_unrealizefn = tcg_exec_unrealizefn;
+}
+
+type_init(tcg_module_ops_exec);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index db3d3e9e9318..36c1df564f31 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -21,6 +21,10 @@ static bool tlb_plugin_lookup_stub(CPUState *cpu, target_ulong addr, int mmu_idx
 }
 #endif
 
+static void tcg_exec_realizefn_stub(CPUState *cpu, Error **errp)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -28,4 +32,6 @@ struct TCGModuleOps tcg = {
     .tlb_reset_dirty = tlb_reset_dirty_stub,
     .tlb_plugin_lookup = tlb_plugin_lookup_stub,
 #endif
+    .tcg_exec_realizefn = tcg_exec_realizefn_stub,
+    .tcg_exec_unrealizefn = update_cpu_stub,
 };
diff --git a/cpu.c b/cpu.c
index 26277f387baf..d1c9f68a26e7 100644
--- a/cpu.c
+++ b/cpu.c
@@ -140,7 +140,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 #ifdef CONFIG_TCG
     /* NB: errp parameter is unused currently */
     if (tcg_enabled()) {
-        tcg_exec_realizefn(cpu, errp);
+        tcg.tcg_exec_realizefn(cpu, errp);
     }
 #endif /* CONFIG_TCG */
 
@@ -172,7 +172,7 @@ void cpu_exec_unrealizefn(CPUState *cpu)
 #ifdef CONFIG_TCG
     /* NB: errp parameter is unused currently */
     if (tcg_enabled()) {
-        tcg_exec_unrealizefn(cpu);
+        tcg.tcg_exec_unrealizefn(cpu);
     }
 #endif /* CONFIG_TCG */
 
-- 
2.31.1

[PATCH 14/29] tcg_funcs:Add tcg_exec_{realizefn, unrealizefn} to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/cpu-all.h   |  2 --
 include/tcg/tcg-module.h |  2 ++
 accel/tcg/cpu-exec.c     | 12 ++++++++++--
 accel/tcg/tcg-module.c   |  6 ++++++
 cpu.c                    |  4 ++--
 5 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 32cfb634c6a0..c2bfd0ea1de1 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -440,8 +440,6 @@ void dump_opcount_info(void);
 #ifdef CONFIG_TCG
 /* accel/tcg/cpu-exec.c */
 int cpu_exec(CPUState *cpu);
-void tcg_exec_realizefn(CPUState *cpu, Error **errp);
-void tcg_exec_unrealizefn(CPUState *cpu);
 #endif /* CONFIG_TCG */
 
 /* Returns: 0 on success, -1 on error */
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 159cbd3e7ce6..5dd4deb9ed57 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -11,6 +11,8 @@ struct TCGModuleOps {
     bool (*tlb_plugin_lookup)(CPUState *cpu, target_ulong addr, int mmu_idx,
                               bool is_store, struct qemu_plugin_hwaddr *data);
 #endif
+    void (*tcg_exec_unrealizefn)(CPUState *cpu);
+    void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index e5c0ccd1a2ab..d41d1d2bd24f 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -981,7 +981,7 @@ int cpu_exec(CPUState *cpu)
     return ret;
 }
 
-void tcg_exec_realizefn(CPUState *cpu, Error **errp)
+static void tcg_exec_realizefn(CPUState *cpu, Error **errp)
 {
     static bool tcg_target_initialized;
     CPUClass *cc = CPU_GET_CLASS(cpu);
@@ -999,7 +999,7 @@ void tcg_exec_realizefn(CPUState *cpu, Error **errp)
 }
 
 /* undo the initializations in reverse order */
-void tcg_exec_unrealizefn(CPUState *cpu)
+static void tcg_exec_unrealizefn(CPUState *cpu)
 {
 #ifndef CONFIG_USER_ONLY
     tcg_iommu_free_notifier_list(cpu);
@@ -1031,3 +1031,11 @@ void dump_drift_info(void)
 }
 
 #endif /* !CONFIG_USER_ONLY */
+
+static void tcg_module_ops_exec(void)
+{
+    tcg.tcg_exec_realizefn = tcg_exec_realizefn;
+    tcg.tcg_exec_unrealizefn = tcg_exec_unrealizefn;
+}
+
+type_init(tcg_module_ops_exec);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index db3d3e9e9318..36c1df564f31 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -21,6 +21,10 @@ static bool tlb_plugin_lookup_stub(CPUState *cpu, target_ulong addr, int mmu_idx
 }
 #endif
 
+static void tcg_exec_realizefn_stub(CPUState *cpu, Error **errp)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -28,4 +32,6 @@ struct TCGModuleOps tcg = {
     .tlb_reset_dirty = tlb_reset_dirty_stub,
     .tlb_plugin_lookup = tlb_plugin_lookup_stub,
 #endif
+    .tcg_exec_realizefn = tcg_exec_realizefn_stub,
+    .tcg_exec_unrealizefn = update_cpu_stub,
 };
diff --git a/cpu.c b/cpu.c
index 26277f387baf..d1c9f68a26e7 100644
--- a/cpu.c
+++ b/cpu.c
@@ -140,7 +140,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 #ifdef CONFIG_TCG
     /* NB: errp parameter is unused currently */
     if (tcg_enabled()) {
-        tcg_exec_realizefn(cpu, errp);
+        tcg.tcg_exec_realizefn(cpu, errp);
     }
 #endif /* CONFIG_TCG */
 
@@ -172,7 +172,7 @@ void cpu_exec_unrealizefn(CPUState *cpu)
 #ifdef CONFIG_TCG
     /* NB: errp parameter is unused currently */
     if (tcg_enabled()) {
-        tcg_exec_unrealizefn(cpu);
+        tcg.tcg_exec_unrealizefn(cpu);
     }
 #endif /* CONFIG_TCG */
 
-- 
2.31.1

[PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 1 -
 include/tcg/tcg-module.h  | 1 +
 accel/stubs/tcg-stub.c    | 4 ----
 accel/tcg/tcg-module.c    | 1 +
 accel/tcg/translate-all.c | 9 ++++++++-
 cpu.c                     | 2 +-
 gdbstub.c                 | 4 ++--
 hw/ppc/spapr_hcall.c      | 2 +-
 linux-user/mmap.c         | 2 +-
 linux-user/syscall.c      | 4 ++--
 plugins/core.c            | 2 +-
 plugins/loader.c          | 2 +-
 target/alpha/sys_helper.c | 2 +-
 target/riscv/csr.c        | 2 +-
 14 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 27fc489c57b5..7dc6f498a7e4 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -572,7 +572,6 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
-void tb_flush(CPUState *cpu);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 5dd4deb9ed57..003581b0718c 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -13,6 +13,7 @@ struct TCGModuleOps {
 #endif
     void (*tcg_exec_unrealizefn)(CPUState *cpu);
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
+    void (*tb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index d8162673ae8d..e7651d035f28 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -13,10 +13,6 @@
 #include "qemu/osdep.h"
 #include "exec/exec-all.h"
 
-void tb_flush(CPUState *cpu)
-{
-}
-
 void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
 {
 }
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 36c1df564f31..7600951fd20b 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -34,4 +34,5 @@ struct TCGModuleOps tcg = {
 #endif
     .tcg_exec_realizefn = tcg_exec_realizefn_stub,
     .tcg_exec_unrealizefn = update_cpu_stub,
+    .tb_flush = update_cpu_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index c7547cd923b4..1d258e89fc81 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1003,7 +1003,7 @@ done:
     }
 }
 
-void tb_flush(CPUState *cpu)
+static void tb_flush(CPUState *cpu)
 {
     if (tcg_enabled()) {
         unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
@@ -2463,3 +2463,10 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
+
+static void tcg_module_ops_tb(void)
+{
+    tcg.tb_flush = tb_flush;
+}
+
+type_init(tcg_module_ops_tb);
diff --git a/cpu.c b/cpu.c
index d1c9f68a26e7..ce96b3591a9c 100644
--- a/cpu.c
+++ b/cpu.c
@@ -58,7 +58,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
      * memory we've translated code from. So we must flush all TBs,
      * which will now be stale.
      */
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
 
     return 0;
 }
diff --git a/gdbstub.c b/gdbstub.c
index 5d8e6ae3cd9b..c2c6901b77b6 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2796,7 +2796,7 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
         } else {
             trace_gdbstub_hit_break();
         }
-        tb_flush(cpu);
+        tcg.tb_flush(cpu);
         ret = GDB_SIGNAL_TRAP;
         break;
     case RUN_STATE_PAUSED:
@@ -3135,7 +3135,7 @@ gdb_handlesig(CPUState *cpu, int sig)
 
     /* disable single step if it was enabled */
     cpu_single_step(cpu, 0);
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
 
     if (sig != 0) {
         snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0e9a5b2e4053..732e79cca0ad 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -292,7 +292,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
         if (kvm_enabled()) {
             kvmppc_icbi_range(cpu, pdst, len);
         } else {
-            tb_flush(CPU(cpu));
+            tcg.tb_flush(CPU(cpu));
         }
     }
 
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 0e103859fed8..85cb03e176c1 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -461,7 +461,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
         CPUState *cpu = thread_cpu;
         if (!(cpu->tcg_cflags & CF_PARALLEL)) {
             cpu->tcg_cflags |= CF_PARALLEL;
-            tb_flush(cpu);
+            tcg.tb_flush(cpu);
         }
     }
 
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index ccd3892b2df7..6ab3009bc98b 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4513,7 +4513,7 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env,
      */
     if (!(cpu->tcg_cflags & CF_PARALLEL)) {
         cpu->tcg_cflags |= CF_PARALLEL;
-        tb_flush(cpu);
+        tcg.tb_flush(cpu);
     }
 
     if (shmaddr)
@@ -6376,7 +6376,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
          */
         if (!(cpu->tcg_cflags & CF_PARALLEL)) {
             cpu->tcg_cflags |= CF_PARALLEL;
-            tb_flush(cpu);
+            tcg.tb_flush(cpu);
         }
 
         /* we create a new CPU instance. */
diff --git a/plugins/core.c b/plugins/core.c
index 6b2490f97328..ee3ad26b354c 100644
--- a/plugins/core.c
+++ b/plugins/core.c
@@ -514,7 +514,7 @@ void qemu_plugin_user_exit(void)
         }
     }
 
-    tb_flush(current_cpu);
+    tcg.tb_flush(current_cpu);
 
     CPU_FOREACH(cpu) {
         qemu_plugin_disable_mem_helpers(cpu);
diff --git a/plugins/loader.c b/plugins/loader.c
index 71b03721dffc..21e94a7509dc 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -364,7 +364,7 @@ static void plugin_flush_destroy(CPUState *cpu, run_on_cpu_data arg)
     struct qemu_plugin_reset_data *data = arg.host_ptr;
 
     g_assert(cpu_in_exclusive_context(cpu));
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
     plugin_reset_destroy(data);
 }
 
diff --git a/target/alpha/sys_helper.c b/target/alpha/sys_helper.c
index 25f6cb88940d..bad37d35e342 100644
--- a/target/alpha/sys_helper.c
+++ b/target/alpha/sys_helper.c
@@ -55,7 +55,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)
 
 void helper_tb_flush(CPUAlphaState *env)
 {
-    tb_flush(env_cpu(env));
+    tcg.tb_flush(env_cpu(env));
 }
 
 void helper_halt(uint64_t restart)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9a4ed18ac597..46603475e57b 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -610,7 +610,7 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
 
     /* flush translation cache */
     if (val != env->misa) {
-        tb_flush(env_cpu(env));
+        tcg.tb_flush(env_cpu(env));
     }
 
     env->misa = val;
-- 
2.31.1

[PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 1 -
 include/tcg/tcg-module.h  | 1 +
 accel/stubs/tcg-stub.c    | 4 ----
 accel/tcg/tcg-module.c    | 1 +
 accel/tcg/translate-all.c | 9 ++++++++-
 cpu.c                     | 2 +-
 gdbstub.c                 | 4 ++--
 hw/ppc/spapr_hcall.c      | 2 +-
 linux-user/mmap.c         | 2 +-
 linux-user/syscall.c      | 4 ++--
 plugins/core.c            | 2 +-
 plugins/loader.c          | 2 +-
 target/alpha/sys_helper.c | 2 +-
 target/riscv/csr.c        | 2 +-
 14 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 27fc489c57b5..7dc6f498a7e4 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -572,7 +572,6 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
-void tb_flush(CPUState *cpu);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 5dd4deb9ed57..003581b0718c 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -13,6 +13,7 @@ struct TCGModuleOps {
 #endif
     void (*tcg_exec_unrealizefn)(CPUState *cpu);
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
+    void (*tb_flush)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index d8162673ae8d..e7651d035f28 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -13,10 +13,6 @@
 #include "qemu/osdep.h"
 #include "exec/exec-all.h"
 
-void tb_flush(CPUState *cpu)
-{
-}
-
 void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
 {
 }
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 36c1df564f31..7600951fd20b 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -34,4 +34,5 @@ struct TCGModuleOps tcg = {
 #endif
     .tcg_exec_realizefn = tcg_exec_realizefn_stub,
     .tcg_exec_unrealizefn = update_cpu_stub,
+    .tb_flush = update_cpu_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index c7547cd923b4..1d258e89fc81 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1003,7 +1003,7 @@ done:
     }
 }
 
-void tb_flush(CPUState *cpu)
+static void tb_flush(CPUState *cpu)
 {
     if (tcg_enabled()) {
         unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
@@ -2463,3 +2463,10 @@ int page_unprotect(target_ulong address, uintptr_t pc)
     return 0;
 }
 #endif /* CONFIG_USER_ONLY */
+
+static void tcg_module_ops_tb(void)
+{
+    tcg.tb_flush = tb_flush;
+}
+
+type_init(tcg_module_ops_tb);
diff --git a/cpu.c b/cpu.c
index d1c9f68a26e7..ce96b3591a9c 100644
--- a/cpu.c
+++ b/cpu.c
@@ -58,7 +58,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
      * memory we've translated code from. So we must flush all TBs,
      * which will now be stale.
      */
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
 
     return 0;
 }
diff --git a/gdbstub.c b/gdbstub.c
index 5d8e6ae3cd9b..c2c6901b77b6 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2796,7 +2796,7 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
         } else {
             trace_gdbstub_hit_break();
         }
-        tb_flush(cpu);
+        tcg.tb_flush(cpu);
         ret = GDB_SIGNAL_TRAP;
         break;
     case RUN_STATE_PAUSED:
@@ -3135,7 +3135,7 @@ gdb_handlesig(CPUState *cpu, int sig)
 
     /* disable single step if it was enabled */
     cpu_single_step(cpu, 0);
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
 
     if (sig != 0) {
         snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0e9a5b2e4053..732e79cca0ad 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -292,7 +292,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
         if (kvm_enabled()) {
             kvmppc_icbi_range(cpu, pdst, len);
         } else {
-            tb_flush(CPU(cpu));
+            tcg.tb_flush(CPU(cpu));
         }
     }
 
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 0e103859fed8..85cb03e176c1 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -461,7 +461,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
         CPUState *cpu = thread_cpu;
         if (!(cpu->tcg_cflags & CF_PARALLEL)) {
             cpu->tcg_cflags |= CF_PARALLEL;
-            tb_flush(cpu);
+            tcg.tb_flush(cpu);
         }
     }
 
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index ccd3892b2df7..6ab3009bc98b 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -4513,7 +4513,7 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env,
      */
     if (!(cpu->tcg_cflags & CF_PARALLEL)) {
         cpu->tcg_cflags |= CF_PARALLEL;
-        tb_flush(cpu);
+        tcg.tb_flush(cpu);
     }
 
     if (shmaddr)
@@ -6376,7 +6376,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
          */
         if (!(cpu->tcg_cflags & CF_PARALLEL)) {
             cpu->tcg_cflags |= CF_PARALLEL;
-            tb_flush(cpu);
+            tcg.tb_flush(cpu);
         }
 
         /* we create a new CPU instance. */
diff --git a/plugins/core.c b/plugins/core.c
index 6b2490f97328..ee3ad26b354c 100644
--- a/plugins/core.c
+++ b/plugins/core.c
@@ -514,7 +514,7 @@ void qemu_plugin_user_exit(void)
         }
     }
 
-    tb_flush(current_cpu);
+    tcg.tb_flush(current_cpu);
 
     CPU_FOREACH(cpu) {
         qemu_plugin_disable_mem_helpers(cpu);
diff --git a/plugins/loader.c b/plugins/loader.c
index 71b03721dffc..21e94a7509dc 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -364,7 +364,7 @@ static void plugin_flush_destroy(CPUState *cpu, run_on_cpu_data arg)
     struct qemu_plugin_reset_data *data = arg.host_ptr;
 
     g_assert(cpu_in_exclusive_context(cpu));
-    tb_flush(cpu);
+    tcg.tb_flush(cpu);
     plugin_reset_destroy(data);
 }
 
diff --git a/target/alpha/sys_helper.c b/target/alpha/sys_helper.c
index 25f6cb88940d..bad37d35e342 100644
--- a/target/alpha/sys_helper.c
+++ b/target/alpha/sys_helper.c
@@ -55,7 +55,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)
 
 void helper_tb_flush(CPUAlphaState *env)
 {
-    tb_flush(env_cpu(env));
+    tcg.tb_flush(env_cpu(env));
 }
 
 void helper_halt(uint64_t restart)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9a4ed18ac597..46603475e57b 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -610,7 +610,7 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
 
     /* flush translation cache */
     if (val != env->misa) {
-        tb_flush(env_cpu(env));
+        tcg.tb_flush(env_cpu(env));
     }
 
     env->misa = val;
-- 
2.31.1

Re: [PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps

[Greg Kurz]

On Tue, 31 Aug 2021 14:15:31 +0200
Gerd Hoffmann <kraxel@redhat.com> wrote:

> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/exec/exec-all.h   | 1 -
>  include/tcg/tcg-module.h  | 1 +
>  accel/stubs/tcg-stub.c    | 4 ----
>  accel/tcg/tcg-module.c    | 1 +
>  accel/tcg/translate-all.c | 9 ++++++++-
>  cpu.c                     | 2 +-
>  gdbstub.c                 | 4 ++--
>  hw/ppc/spapr_hcall.c      | 2 +-

For ppc :

Acked-by: Greg Kurz <groug@kaod.org>

>  linux-user/mmap.c         | 2 +-
>  linux-user/syscall.c      | 4 ++--
>  plugins/core.c            | 2 +-
>  plugins/loader.c          | 2 +-
>  target/alpha/sys_helper.c | 2 +-
>  target/riscv/csr.c        | 2 +-
>  14 files changed, 21 insertions(+), 17 deletions(-)
> 
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 27fc489c57b5..7dc6f498a7e4 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -572,7 +572,6 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end);
>  #else
>  void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
>  #endif
> -void tb_flush(CPUState *cpu);
>  void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
>  TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
>                                     target_ulong cs_base, uint32_t flags,
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> index 5dd4deb9ed57..003581b0718c 100644
> --- a/include/tcg/tcg-module.h
> +++ b/include/tcg/tcg-module.h
> @@ -13,6 +13,7 @@ struct TCGModuleOps {
>  #endif
>      void (*tcg_exec_unrealizefn)(CPUState *cpu);
>      void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
> +    void (*tb_flush)(CPUState *cpu);
>  };
>  extern struct TCGModuleOps tcg;
>  
> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
> index d8162673ae8d..e7651d035f28 100644
> --- a/accel/stubs/tcg-stub.c
> +++ b/accel/stubs/tcg-stub.c
> @@ -13,10 +13,6 @@
>  #include "qemu/osdep.h"
>  #include "exec/exec-all.h"
>  
> -void tb_flush(CPUState *cpu)
> -{
> -}
> -
>  void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
>  {
>  }
> diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
> index 36c1df564f31..7600951fd20b 100644
> --- a/accel/tcg/tcg-module.c
> +++ b/accel/tcg/tcg-module.c
> @@ -34,4 +34,5 @@ struct TCGModuleOps tcg = {
>  #endif
>      .tcg_exec_realizefn = tcg_exec_realizefn_stub,
>      .tcg_exec_unrealizefn = update_cpu_stub,
> +    .tb_flush = update_cpu_stub,
>  };
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index c7547cd923b4..1d258e89fc81 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -1003,7 +1003,7 @@ done:
>      }
>  }
>  
> -void tb_flush(CPUState *cpu)
> +static void tb_flush(CPUState *cpu)
>  {
>      if (tcg_enabled()) {
>          unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
> @@ -2463,3 +2463,10 @@ int page_unprotect(target_ulong address, uintptr_t pc)
>      return 0;
>  }
>  #endif /* CONFIG_USER_ONLY */
> +
> +static void tcg_module_ops_tb(void)
> +{
> +    tcg.tb_flush = tb_flush;
> +}
> +
> +type_init(tcg_module_ops_tb);
> diff --git a/cpu.c b/cpu.c
> index d1c9f68a26e7..ce96b3591a9c 100644
> --- a/cpu.c
> +++ b/cpu.c
> @@ -58,7 +58,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
>       * memory we've translated code from. So we must flush all TBs,
>       * which will now be stale.
>       */
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>  
>      return 0;
>  }
> diff --git a/gdbstub.c b/gdbstub.c
> index 5d8e6ae3cd9b..c2c6901b77b6 100644
> --- a/gdbstub.c
> +++ b/gdbstub.c
> @@ -2796,7 +2796,7 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
>          } else {
>              trace_gdbstub_hit_break();
>          }
> -        tb_flush(cpu);
> +        tcg.tb_flush(cpu);
>          ret = GDB_SIGNAL_TRAP;
>          break;
>      case RUN_STATE_PAUSED:
> @@ -3135,7 +3135,7 @@ gdb_handlesig(CPUState *cpu, int sig)
>  
>      /* disable single step if it was enabled */
>      cpu_single_step(cpu, 0);
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>  
>      if (sig != 0) {
>          snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 0e9a5b2e4053..732e79cca0ad 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -292,7 +292,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
>          if (kvm_enabled()) {
>              kvmppc_icbi_range(cpu, pdst, len);
>          } else {
> -            tb_flush(CPU(cpu));
> +            tcg.tb_flush(CPU(cpu));
>          }
>      }
>  
> diff --git a/linux-user/mmap.c b/linux-user/mmap.c
> index 0e103859fed8..85cb03e176c1 100644
> --- a/linux-user/mmap.c
> +++ b/linux-user/mmap.c
> @@ -461,7 +461,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
>          CPUState *cpu = thread_cpu;
>          if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>              cpu->tcg_cflags |= CF_PARALLEL;
> -            tb_flush(cpu);
> +            tcg.tb_flush(cpu);
>          }
>      }
>  
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index ccd3892b2df7..6ab3009bc98b 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -4513,7 +4513,7 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env,
>       */
>      if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>          cpu->tcg_cflags |= CF_PARALLEL;
> -        tb_flush(cpu);
> +        tcg.tb_flush(cpu);
>      }
>  
>      if (shmaddr)
> @@ -6376,7 +6376,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>           */
>          if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>              cpu->tcg_cflags |= CF_PARALLEL;
> -            tb_flush(cpu);
> +            tcg.tb_flush(cpu);
>          }
>  
>          /* we create a new CPU instance. */
> diff --git a/plugins/core.c b/plugins/core.c
> index 6b2490f97328..ee3ad26b354c 100644
> --- a/plugins/core.c
> +++ b/plugins/core.c
> @@ -514,7 +514,7 @@ void qemu_plugin_user_exit(void)
>          }
>      }
>  
> -    tb_flush(current_cpu);
> +    tcg.tb_flush(current_cpu);
>  
>      CPU_FOREACH(cpu) {
>          qemu_plugin_disable_mem_helpers(cpu);
> diff --git a/plugins/loader.c b/plugins/loader.c
> index 71b03721dffc..21e94a7509dc 100644
> --- a/plugins/loader.c
> +++ b/plugins/loader.c
> @@ -364,7 +364,7 @@ static void plugin_flush_destroy(CPUState *cpu, run_on_cpu_data arg)
>      struct qemu_plugin_reset_data *data = arg.host_ptr;
>  
>      g_assert(cpu_in_exclusive_context(cpu));
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>      plugin_reset_destroy(data);
>  }
>  
> diff --git a/target/alpha/sys_helper.c b/target/alpha/sys_helper.c
> index 25f6cb88940d..bad37d35e342 100644
> --- a/target/alpha/sys_helper.c
> +++ b/target/alpha/sys_helper.c
> @@ -55,7 +55,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)
>  
>  void helper_tb_flush(CPUAlphaState *env)
>  {
> -    tb_flush(env_cpu(env));
> +    tcg.tb_flush(env_cpu(env));
>  }
>  
>  void helper_halt(uint64_t restart)
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 9a4ed18ac597..46603475e57b 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -610,7 +610,7 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
>  
>      /* flush translation cache */
>      if (val != env->misa) {
> -        tb_flush(env_cpu(env));
> +        tcg.tb_flush(env_cpu(env));
>      }
>  
>      env->misa = val;

Re: [PATCH 15/29] tcg_funcs: Add tb_flush to TCGModuleOps

[Greg Kurz]

On Tue, 31 Aug 2021 14:15:31 +0200
Gerd Hoffmann <kraxel@redhat.com> wrote:

> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/exec/exec-all.h   | 1 -
>  include/tcg/tcg-module.h  | 1 +
>  accel/stubs/tcg-stub.c    | 4 ----
>  accel/tcg/tcg-module.c    | 1 +
>  accel/tcg/translate-all.c | 9 ++++++++-
>  cpu.c                     | 2 +-
>  gdbstub.c                 | 4 ++--
>  hw/ppc/spapr_hcall.c      | 2 +-

For ppc :

Acked-by: Greg Kurz <groug@kaod.org>

>  linux-user/mmap.c         | 2 +-
>  linux-user/syscall.c      | 4 ++--
>  plugins/core.c            | 2 +-
>  plugins/loader.c          | 2 +-
>  target/alpha/sys_helper.c | 2 +-
>  target/riscv/csr.c        | 2 +-
>  14 files changed, 21 insertions(+), 17 deletions(-)
> 
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 27fc489c57b5..7dc6f498a7e4 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -572,7 +572,6 @@ void tb_invalidate_phys_range(target_ulong start, target_ulong end);
>  #else
>  void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
>  #endif
> -void tb_flush(CPUState *cpu);
>  void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
>  TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
>                                     target_ulong cs_base, uint32_t flags,
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> index 5dd4deb9ed57..003581b0718c 100644
> --- a/include/tcg/tcg-module.h
> +++ b/include/tcg/tcg-module.h
> @@ -13,6 +13,7 @@ struct TCGModuleOps {
>  #endif
>      void (*tcg_exec_unrealizefn)(CPUState *cpu);
>      void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
> +    void (*tb_flush)(CPUState *cpu);
>  };
>  extern struct TCGModuleOps tcg;
>  
> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
> index d8162673ae8d..e7651d035f28 100644
> --- a/accel/stubs/tcg-stub.c
> +++ b/accel/stubs/tcg-stub.c
> @@ -13,10 +13,6 @@
>  #include "qemu/osdep.h"
>  #include "exec/exec-all.h"
>  
> -void tb_flush(CPUState *cpu)
> -{
> -}
> -
>  void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
>  {
>  }
> diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
> index 36c1df564f31..7600951fd20b 100644
> --- a/accel/tcg/tcg-module.c
> +++ b/accel/tcg/tcg-module.c
> @@ -34,4 +34,5 @@ struct TCGModuleOps tcg = {
>  #endif
>      .tcg_exec_realizefn = tcg_exec_realizefn_stub,
>      .tcg_exec_unrealizefn = update_cpu_stub,
> +    .tb_flush = update_cpu_stub,
>  };
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index c7547cd923b4..1d258e89fc81 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -1003,7 +1003,7 @@ done:
>      }
>  }
>  
> -void tb_flush(CPUState *cpu)
> +static void tb_flush(CPUState *cpu)
>  {
>      if (tcg_enabled()) {
>          unsigned tb_flush_count = qatomic_mb_read(&tb_ctx.tb_flush_count);
> @@ -2463,3 +2463,10 @@ int page_unprotect(target_ulong address, uintptr_t pc)
>      return 0;
>  }
>  #endif /* CONFIG_USER_ONLY */
> +
> +static void tcg_module_ops_tb(void)
> +{
> +    tcg.tb_flush = tb_flush;
> +}
> +
> +type_init(tcg_module_ops_tb);
> diff --git a/cpu.c b/cpu.c
> index d1c9f68a26e7..ce96b3591a9c 100644
> --- a/cpu.c
> +++ b/cpu.c
> @@ -58,7 +58,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
>       * memory we've translated code from. So we must flush all TBs,
>       * which will now be stale.
>       */
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>  
>      return 0;
>  }
> diff --git a/gdbstub.c b/gdbstub.c
> index 5d8e6ae3cd9b..c2c6901b77b6 100644
> --- a/gdbstub.c
> +++ b/gdbstub.c
> @@ -2796,7 +2796,7 @@ static void gdb_vm_state_change(void *opaque, bool running, RunState state)
>          } else {
>              trace_gdbstub_hit_break();
>          }
> -        tb_flush(cpu);
> +        tcg.tb_flush(cpu);
>          ret = GDB_SIGNAL_TRAP;
>          break;
>      case RUN_STATE_PAUSED:
> @@ -3135,7 +3135,7 @@ gdb_handlesig(CPUState *cpu, int sig)
>  
>      /* disable single step if it was enabled */
>      cpu_single_step(cpu, 0);
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>  
>      if (sig != 0) {
>          snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 0e9a5b2e4053..732e79cca0ad 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -292,7 +292,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
>          if (kvm_enabled()) {
>              kvmppc_icbi_range(cpu, pdst, len);
>          } else {
> -            tb_flush(CPU(cpu));
> +            tcg.tb_flush(CPU(cpu));
>          }
>      }
>  
> diff --git a/linux-user/mmap.c b/linux-user/mmap.c
> index 0e103859fed8..85cb03e176c1 100644
> --- a/linux-user/mmap.c
> +++ b/linux-user/mmap.c
> @@ -461,7 +461,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
>          CPUState *cpu = thread_cpu;
>          if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>              cpu->tcg_cflags |= CF_PARALLEL;
> -            tb_flush(cpu);
> +            tcg.tb_flush(cpu);
>          }
>      }
>  
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index ccd3892b2df7..6ab3009bc98b 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -4513,7 +4513,7 @@ static inline abi_ulong do_shmat(CPUArchState *cpu_env,
>       */
>      if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>          cpu->tcg_cflags |= CF_PARALLEL;
> -        tb_flush(cpu);
> +        tcg.tb_flush(cpu);
>      }
>  
>      if (shmaddr)
> @@ -6376,7 +6376,7 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp,
>           */
>          if (!(cpu->tcg_cflags & CF_PARALLEL)) {
>              cpu->tcg_cflags |= CF_PARALLEL;
> -            tb_flush(cpu);
> +            tcg.tb_flush(cpu);
>          }
>  
>          /* we create a new CPU instance. */
> diff --git a/plugins/core.c b/plugins/core.c
> index 6b2490f97328..ee3ad26b354c 100644
> --- a/plugins/core.c
> +++ b/plugins/core.c
> @@ -514,7 +514,7 @@ void qemu_plugin_user_exit(void)
>          }
>      }
>  
> -    tb_flush(current_cpu);
> +    tcg.tb_flush(current_cpu);
>  
>      CPU_FOREACH(cpu) {
>          qemu_plugin_disable_mem_helpers(cpu);
> diff --git a/plugins/loader.c b/plugins/loader.c
> index 71b03721dffc..21e94a7509dc 100644
> --- a/plugins/loader.c
> +++ b/plugins/loader.c
> @@ -364,7 +364,7 @@ static void plugin_flush_destroy(CPUState *cpu, run_on_cpu_data arg)
>      struct qemu_plugin_reset_data *data = arg.host_ptr;
>  
>      g_assert(cpu_in_exclusive_context(cpu));
> -    tb_flush(cpu);
> +    tcg.tb_flush(cpu);
>      plugin_reset_destroy(data);
>  }
>  
> diff --git a/target/alpha/sys_helper.c b/target/alpha/sys_helper.c
> index 25f6cb88940d..bad37d35e342 100644
> --- a/target/alpha/sys_helper.c
> +++ b/target/alpha/sys_helper.c
> @@ -55,7 +55,7 @@ void helper_tbis(CPUAlphaState *env, uint64_t p)
>  
>  void helper_tb_flush(CPUAlphaState *env)
>  {
> -    tb_flush(env_cpu(env));
> +    tcg.tb_flush(env_cpu(env));
>  }
>  
>  void helper_halt(uint64_t restart)
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 9a4ed18ac597..46603475e57b 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -610,7 +610,7 @@ static RISCVException write_misa(CPURISCVState *env, int csrno,
>  
>      /* flush translation cache */
>      if (val != env->misa) {
> -        tb_flush(env_cpu(env));
> +        tcg.tb_flush(env_cpu(env));
>      }
>  
>      env->misa = val;

[PATCH 16/29] tcg: use tb_page_addr_t for tb_invalidate_phys_range()

[Gerd Hoffmann]

The tb_page_addr_t type was added to avoid #ifdefs for SOFTMMU (uses
ram_addr_t) vs. USER_ONLY (uses target_ulong), and
tb_invalidate_phys_range() never was updated for some reason.
So do that now.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 4 ++--
 include/exec/ram_addr.h   | 2 --
 accel/tcg/translate-all.c | 6 +-----
 cpu.c                     | 2 +-
 4 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 7dc6f498a7e4..9cb8337acee1 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -567,11 +567,11 @@ uint32_t curr_cflags(CPUState *cpu);
 
 /* TranslationBlock invalidate API */
 #if defined(CONFIG_USER_ONLY)
-void tb_invalidate_phys_addr(target_ulong addr);
-void tb_invalidate_phys_range(target_ulong start, target_ulong end);
+void tb_invalidate_phys_addr(tb_page_addr_t addr);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
+void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 551876bed041..ae34f63b8f7e 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -145,8 +145,6 @@ static inline void qemu_ram_block_writeback(RAMBlock *block)
 #define DIRTY_CLIENTS_ALL     ((1 << DIRTY_MEMORY_NUM) - 1)
 #define DIRTY_CLIENTS_NOCODE  (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE))
 
-void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end);
-
 static inline bool cpu_physical_memory_get_dirty(ram_addr_t start,
                                                  ram_addr_t length,
                                                  unsigned client)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 1d258e89fc81..57bb921bd3ba 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1802,11 +1802,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end)
  *
  * Called with mmap_lock held for user-mode emulation.
  */
-#ifdef CONFIG_SOFTMMU
-void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end)
-#else
-void tb_invalidate_phys_range(target_ulong start, target_ulong end)
-#endif
+void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
 {
     struct page_collection *pages;
     tb_page_addr_t next;
diff --git a/cpu.c b/cpu.c
index ce96b3591a9c..e8baec294b06 100644
--- a/cpu.c
+++ b/cpu.c
@@ -219,7 +219,7 @@ const char *parse_cpu_option(const char *cpu_option)
 }
 
 #if defined(CONFIG_USER_ONLY)
-void tb_invalidate_phys_addr(target_ulong addr)
+void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
     tb_invalidate_phys_page_range(addr, addr + 1);
-- 
2.31.1

[PATCH 16/29] tcg: use tb_page_addr_t for tb_invalidate_phys_range()

[Gerd Hoffmann]

The tb_page_addr_t type was added to avoid #ifdefs for SOFTMMU (uses
ram_addr_t) vs. USER_ONLY (uses target_ulong), and
tb_invalidate_phys_range() never was updated for some reason.
So do that now.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 4 ++--
 include/exec/ram_addr.h   | 2 --
 accel/tcg/translate-all.c | 6 +-----
 cpu.c                     | 2 +-
 4 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 7dc6f498a7e4..9cb8337acee1 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -567,11 +567,11 @@ uint32_t curr_cflags(CPUState *cpu);
 
 /* TranslationBlock invalidate API */
 #if defined(CONFIG_USER_ONLY)
-void tb_invalidate_phys_addr(target_ulong addr);
-void tb_invalidate_phys_range(target_ulong start, target_ulong end);
+void tb_invalidate_phys_addr(tb_page_addr_t addr);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
+void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index 551876bed041..ae34f63b8f7e 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -145,8 +145,6 @@ static inline void qemu_ram_block_writeback(RAMBlock *block)
 #define DIRTY_CLIENTS_ALL     ((1 << DIRTY_MEMORY_NUM) - 1)
 #define DIRTY_CLIENTS_NOCODE  (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE))
 
-void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end);
-
 static inline bool cpu_physical_memory_get_dirty(ram_addr_t start,
                                                  ram_addr_t length,
                                                  unsigned client)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 1d258e89fc81..57bb921bd3ba 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1802,11 +1802,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end)
  *
  * Called with mmap_lock held for user-mode emulation.
  */
-#ifdef CONFIG_SOFTMMU
-void tb_invalidate_phys_range(ram_addr_t start, ram_addr_t end)
-#else
-void tb_invalidate_phys_range(target_ulong start, target_ulong end)
-#endif
+void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
 {
     struct page_collection *pages;
     tb_page_addr_t next;
diff --git a/cpu.c b/cpu.c
index ce96b3591a9c..e8baec294b06 100644
--- a/cpu.c
+++ b/cpu.c
@@ -219,7 +219,7 @@ const char *parse_cpu_option(const char *cpu_option)
 }
 
 #if defined(CONFIG_USER_ONLY)
-void tb_invalidate_phys_addr(target_ulong addr)
+void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
     tb_invalidate_phys_page_range(addr, addr + 1);
-- 
2.31.1

[PATCH 17/29] tcg: drop tb_invalidate_phys_page_range()

[Gerd Hoffmann]

tb_invalidate_phys_range() can be used instead.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/translate-all.h |  1 -
 accel/tcg/translate-all.c    | 25 -------------------------
 cpu.c                        |  4 ++--
 3 files changed, 2 insertions(+), 28 deletions(-)

diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h
index a557b4e2bb9e..f313542cdae1 100644
--- a/include/exec/translate-all.h
+++ b/include/exec/translate-all.h
@@ -29,7 +29,6 @@ void page_collection_unlock(struct page_collection *set);
 void tb_invalidate_phys_page_fast(struct page_collection *pages,
                                   tb_page_addr_t start, int len,
                                   uintptr_t retaddr);
-void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
 
 #ifdef CONFIG_USER_ONLY
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 57bb921bd3ba..3a3a60575141 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1768,31 +1768,6 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
 #endif
 }
 
-/*
- * Invalidate all TBs which intersect with the target physical address range
- * [start;end[. NOTE: start and end must refer to the *same* physical page.
- * 'is_cpu_write_access' should be true if called from a real cpu write
- * access: the virtual CPU will exit the current TB if code is modified inside
- * this TB.
- *
- * Called with mmap_lock held for user-mode emulation
- */
-void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end)
-{
-    struct page_collection *pages;
-    PageDesc *p;
-
-    assert_memory_lock();
-
-    p = page_find(start >> TARGET_PAGE_BITS);
-    if (p == NULL) {
-        return;
-    }
-    pages = page_collection_lock(start, end);
-    tb_invalidate_phys_page_range__locked(pages, p, start, end, 0);
-    page_collection_unlock(pages);
-}
-
 /*
  * Invalidate all TBs which intersect with the target physical address range
  * [start;end[. NOTE: start and end may refer to *different* physical pages.
diff --git a/cpu.c b/cpu.c
index e8baec294b06..b8ac817cb3fd 100644
--- a/cpu.c
+++ b/cpu.c
@@ -222,7 +222,7 @@ const char *parse_cpu_option(const char *cpu_option)
 void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
-    tb_invalidate_phys_page_range(addr, addr + 1);
+    tb_invalidate_phys_range(addr, addr + 1);
     mmap_unlock();
 }
 #else
@@ -243,7 +243,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
         return;
     }
     ram_addr = memory_region_get_ram_addr(mr) + addr;
-    tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
+    tb_invalidate_phys_range(ram_addr, ram_addr + 1);
 }
 #endif
 
-- 
2.31.1

[PATCH 17/29] tcg: drop tb_invalidate_phys_page_range()

[Gerd Hoffmann]

tb_invalidate_phys_range() can be used instead.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/translate-all.h |  1 -
 accel/tcg/translate-all.c    | 25 -------------------------
 cpu.c                        |  4 ++--
 3 files changed, 2 insertions(+), 28 deletions(-)

diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h
index a557b4e2bb9e..f313542cdae1 100644
--- a/include/exec/translate-all.h
+++ b/include/exec/translate-all.h
@@ -29,7 +29,6 @@ void page_collection_unlock(struct page_collection *set);
 void tb_invalidate_phys_page_fast(struct page_collection *pages,
                                   tb_page_addr_t start, int len,
                                   uintptr_t retaddr);
-void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
 
 #ifdef CONFIG_USER_ONLY
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 57bb921bd3ba..3a3a60575141 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1768,31 +1768,6 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
 #endif
 }
 
-/*
- * Invalidate all TBs which intersect with the target physical address range
- * [start;end[. NOTE: start and end must refer to the *same* physical page.
- * 'is_cpu_write_access' should be true if called from a real cpu write
- * access: the virtual CPU will exit the current TB if code is modified inside
- * this TB.
- *
- * Called with mmap_lock held for user-mode emulation
- */
-void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end)
-{
-    struct page_collection *pages;
-    PageDesc *p;
-
-    assert_memory_lock();
-
-    p = page_find(start >> TARGET_PAGE_BITS);
-    if (p == NULL) {
-        return;
-    }
-    pages = page_collection_lock(start, end);
-    tb_invalidate_phys_page_range__locked(pages, p, start, end, 0);
-    page_collection_unlock(pages);
-}
-
 /*
  * Invalidate all TBs which intersect with the target physical address range
  * [start;end[. NOTE: start and end may refer to *different* physical pages.
diff --git a/cpu.c b/cpu.c
index e8baec294b06..b8ac817cb3fd 100644
--- a/cpu.c
+++ b/cpu.c
@@ -222,7 +222,7 @@ const char *parse_cpu_option(const char *cpu_option)
 void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
-    tb_invalidate_phys_page_range(addr, addr + 1);
+    tb_invalidate_phys_range(addr, addr + 1);
     mmap_unlock();
 }
 #else
@@ -243,7 +243,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
         return;
     }
     ram_addr = memory_region_get_ram_addr(mr) + addr;
-    tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
+    tb_invalidate_phys_range(ram_addr, ram_addr + 1);
 }
 #endif
 
-- 
2.31.1

[PATCH 18/29] tcg_funcs: Add tb_invalidate_phys_range to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 3 +--
 include/tcg/tcg-module.h  | 2 ++
 accel/tcg/tcg-module.c    | 5 +++++
 accel/tcg/translate-all.c | 3 ++-
 cpu.c                     | 4 ++--
 linux-user/mmap.c         | 6 +++---
 softmmu/physmem.c         | 2 +-
 7 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 9cb8337acee1..c27e911b65f9 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,7 +25,6 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
-#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -42,6 +41,7 @@ typedef ram_addr_t tb_page_addr_t;
 #endif
 
 #include "qemu/log.h"
+#include "tcg/tcg-module.h"
 
 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns);
 void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
@@ -571,7 +571,6 @@ void tb_invalidate_phys_addr(tb_page_addr_t addr);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 003581b0718c..6069b056f91f 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -14,6 +14,8 @@ struct TCGModuleOps {
     void (*tcg_exec_unrealizefn)(CPUState *cpu);
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
     void (*tb_flush)(CPUState *cpu);
+    void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
+
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 7600951fd20b..dfd7d3bbc2e0 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -25,6 +25,10 @@ static void tcg_exec_realizefn_stub(CPUState *cpu, Error **errp)
 {
 }
 
+static void tb_invalidate_phys_range_stub(tb_page_addr_t start, tb_page_addr_t end)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -35,4 +39,5 @@ struct TCGModuleOps tcg = {
     .tcg_exec_realizefn = tcg_exec_realizefn_stub,
     .tcg_exec_unrealizefn = update_cpu_stub,
     .tb_flush = update_cpu_stub,
+    .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 3a3a60575141..e71e58aff9e7 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1777,7 +1777,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
  *
  * Called with mmap_lock held for user-mode emulation.
  */
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
+static void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
 {
     struct page_collection *pages;
     tb_page_addr_t next;
@@ -2438,6 +2438,7 @@ int page_unprotect(target_ulong address, uintptr_t pc)
 static void tcg_module_ops_tb(void)
 {
     tcg.tb_flush = tb_flush;
+    tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/cpu.c b/cpu.c
index b8ac817cb3fd..536bb6911a58 100644
--- a/cpu.c
+++ b/cpu.c
@@ -222,7 +222,7 @@ const char *parse_cpu_option(const char *cpu_option)
 void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
-    tb_invalidate_phys_range(addr, addr + 1);
+    tcg.tb_invalidate_phys_range(addr, addr + 1);
     mmap_unlock();
 }
 #else
@@ -243,7 +243,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
         return;
     }
     ram_addr = memory_region_get_ram_addr(mr) + addr;
-    tb_invalidate_phys_range(ram_addr, ram_addr + 1);
+    tcg.tb_invalidate_phys_range(ram_addr, ram_addr + 1);
 }
 #endif
 
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 85cb03e176c1..0f4cfefe01cb 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -630,7 +630,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
     if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
         log_page_dump(__func__);
     }
-    tb_invalidate_phys_range(start, start + len);
+    tcg.tb_invalidate_phys_range(start, start + len);
     mmap_unlock();
     return start;
 fail:
@@ -734,7 +734,7 @@ int target_munmap(abi_ulong start, abi_ulong len)
 
     if (ret == 0) {
         page_set_flags(start, start + len, 0);
-        tb_invalidate_phys_range(start, start + len);
+        tcg.tb_invalidate_phys_range(start, start + len);
     }
     mmap_unlock();
     return ret;
@@ -824,7 +824,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
         page_set_flags(new_addr, new_addr + new_size,
                        prot | PAGE_VALID | PAGE_RESET);
     }
-    tb_invalidate_phys_range(new_addr, new_addr + new_size);
+    tcg.tb_invalidate_phys_range(new_addr, new_addr + new_size);
     mmap_unlock();
     return new_addr;
 }
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 8b27827c533d..f2301f4445cc 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -2696,7 +2696,7 @@ static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
     }
     if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
         assert(tcg_enabled());
-        tb_invalidate_phys_range(addr, addr + length);
+        tcg.tb_invalidate_phys_range(addr, addr + length);
         dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
     }
     cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
-- 
2.31.1

[PATCH 18/29] tcg_funcs: Add tb_invalidate_phys_range to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 3 +--
 include/tcg/tcg-module.h  | 2 ++
 accel/tcg/tcg-module.c    | 5 +++++
 accel/tcg/translate-all.c | 3 ++-
 cpu.c                     | 4 ++--
 linux-user/mmap.c         | 6 +++---
 softmmu/physmem.c         | 2 +-
 7 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 9cb8337acee1..c27e911b65f9 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -25,7 +25,6 @@
 #include "exec/cpu_ldst.h"
 #endif
 #include "sysemu/cpu-timers.h"
-#include "tcg/tcg-module.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -42,6 +41,7 @@ typedef ram_addr_t tb_page_addr_t;
 #endif
 
 #include "qemu/log.h"
+#include "tcg/tcg-module.h"
 
 void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns);
 void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
@@ -571,7 +571,6 @@ void tb_invalidate_phys_addr(tb_page_addr_t addr);
 #else
 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs);
 #endif
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end);
 void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
                                    target_ulong cs_base, uint32_t flags,
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 003581b0718c..6069b056f91f 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -14,6 +14,8 @@ struct TCGModuleOps {
     void (*tcg_exec_unrealizefn)(CPUState *cpu);
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
     void (*tb_flush)(CPUState *cpu);
+    void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
+
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 7600951fd20b..dfd7d3bbc2e0 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -25,6 +25,10 @@ static void tcg_exec_realizefn_stub(CPUState *cpu, Error **errp)
 {
 }
 
+static void tb_invalidate_phys_range_stub(tb_page_addr_t start, tb_page_addr_t end)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -35,4 +39,5 @@ struct TCGModuleOps tcg = {
     .tcg_exec_realizefn = tcg_exec_realizefn_stub,
     .tcg_exec_unrealizefn = update_cpu_stub,
     .tb_flush = update_cpu_stub,
+    .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 3a3a60575141..e71e58aff9e7 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1777,7 +1777,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
  *
  * Called with mmap_lock held for user-mode emulation.
  */
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
+static void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end)
 {
     struct page_collection *pages;
     tb_page_addr_t next;
@@ -2438,6 +2438,7 @@ int page_unprotect(target_ulong address, uintptr_t pc)
 static void tcg_module_ops_tb(void)
 {
     tcg.tb_flush = tb_flush;
+    tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/cpu.c b/cpu.c
index b8ac817cb3fd..536bb6911a58 100644
--- a/cpu.c
+++ b/cpu.c
@@ -222,7 +222,7 @@ const char *parse_cpu_option(const char *cpu_option)
 void tb_invalidate_phys_addr(tb_page_addr_t addr)
 {
     mmap_lock();
-    tb_invalidate_phys_range(addr, addr + 1);
+    tcg.tb_invalidate_phys_range(addr, addr + 1);
     mmap_unlock();
 }
 #else
@@ -243,7 +243,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
         return;
     }
     ram_addr = memory_region_get_ram_addr(mr) + addr;
-    tb_invalidate_phys_range(ram_addr, ram_addr + 1);
+    tcg.tb_invalidate_phys_range(ram_addr, ram_addr + 1);
 }
 #endif
 
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index 85cb03e176c1..0f4cfefe01cb 100644
--- a/linux-user/mmap.c
+++ b/linux-user/mmap.c
@@ -630,7 +630,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot,
     if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
         log_page_dump(__func__);
     }
-    tb_invalidate_phys_range(start, start + len);
+    tcg.tb_invalidate_phys_range(start, start + len);
     mmap_unlock();
     return start;
 fail:
@@ -734,7 +734,7 @@ int target_munmap(abi_ulong start, abi_ulong len)
 
     if (ret == 0) {
         page_set_flags(start, start + len, 0);
-        tb_invalidate_phys_range(start, start + len);
+        tcg.tb_invalidate_phys_range(start, start + len);
     }
     mmap_unlock();
     return ret;
@@ -824,7 +824,7 @@ abi_long target_mremap(abi_ulong old_addr, abi_ulong old_size,
         page_set_flags(new_addr, new_addr + new_size,
                        prot | PAGE_VALID | PAGE_RESET);
     }
-    tb_invalidate_phys_range(new_addr, new_addr + new_size);
+    tcg.tb_invalidate_phys_range(new_addr, new_addr + new_size);
     mmap_unlock();
     return new_addr;
 }
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 8b27827c533d..f2301f4445cc 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -2696,7 +2696,7 @@ static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
     }
     if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
         assert(tcg_enabled());
-        tb_invalidate_phys_range(addr, addr + length);
+        tcg.tb_invalidate_phys_range(addr, addr + length);
         dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
     }
     cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
-- 
2.31.1

[PATCH 19/29] tcg_funcs: Add tb_check_watchpoint to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/translate-all.h | 1 -
 include/tcg/tcg-module.h     | 2 +-
 accel/tcg/tcg-module.c       | 5 +++++
 accel/tcg/translate-all.c    | 3 ++-
 softmmu/physmem.c            | 2 +-
 5 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h
index f313542cdae1..fa9cebd56c60 100644
--- a/include/exec/translate-all.h
+++ b/include/exec/translate-all.h
@@ -29,7 +29,6 @@ void page_collection_unlock(struct page_collection *set);
 void tb_invalidate_phys_page_fast(struct page_collection *pages,
                                   tb_page_addr_t start, int len,
                                   uintptr_t retaddr);
-void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
 
 #ifdef CONFIG_USER_ONLY
 int page_unprotect(target_ulong address, uintptr_t pc);
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 6069b056f91f..645e8eb39e71 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -15,7 +15,7 @@ struct TCGModuleOps {
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
     void (*tb_flush)(CPUState *cpu);
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
-
+    void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index dfd7d3bbc2e0..ea0c2a160a97 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -29,6 +29,10 @@ static void tb_invalidate_phys_range_stub(tb_page_addr_t start, tb_page_addr_t e
 {
 }
 
+static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -40,4 +44,5 @@ struct TCGModuleOps tcg = {
     .tcg_exec_unrealizefn = update_cpu_stub,
     .tb_flush = update_cpu_stub,
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
+    .tb_check_watchpoint = tb_check_watchpoint_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index e71e58aff9e7..57129bbeb791 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1910,7 +1910,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
 #endif
 
 /* user-mode: call with mmap_lock held */
-void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
+static void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
 {
     TranslationBlock *tb;
 
@@ -2439,6 +2439,7 @@ static void tcg_module_ops_tb(void)
 {
     tcg.tb_flush = tb_flush;
     tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
+    tcg.tb_check_watchpoint = tb_check_watchpoint;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index f2301f4445cc..634500fd3b7b 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -937,7 +937,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                 cpu->watchpoint_hit = wp;
 
                 mmap_lock();
-                tb_check_watchpoint(cpu, ra);
+                tcg.tb_check_watchpoint(cpu, ra);
                 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
                     cpu->exception_index = EXCP_DEBUG;
                     mmap_unlock();
-- 
2.31.1

[PATCH 19/29] tcg_funcs: Add tb_check_watchpoint to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/translate-all.h | 1 -
 include/tcg/tcg-module.h     | 2 +-
 accel/tcg/tcg-module.c       | 5 +++++
 accel/tcg/translate-all.c    | 3 ++-
 softmmu/physmem.c            | 2 +-
 5 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h
index f313542cdae1..fa9cebd56c60 100644
--- a/include/exec/translate-all.h
+++ b/include/exec/translate-all.h
@@ -29,7 +29,6 @@ void page_collection_unlock(struct page_collection *set);
 void tb_invalidate_phys_page_fast(struct page_collection *pages,
                                   tb_page_addr_t start, int len,
                                   uintptr_t retaddr);
-void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
 
 #ifdef CONFIG_USER_ONLY
 int page_unprotect(target_ulong address, uintptr_t pc);
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 6069b056f91f..645e8eb39e71 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -15,7 +15,7 @@ struct TCGModuleOps {
     void (*tcg_exec_realizefn)(CPUState *cpu, Error **errp);
     void (*tb_flush)(CPUState *cpu);
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
-
+    void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index dfd7d3bbc2e0..ea0c2a160a97 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -29,6 +29,10 @@ static void tb_invalidate_phys_range_stub(tb_page_addr_t start, tb_page_addr_t e
 {
 }
 
+static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
+{
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -40,4 +44,5 @@ struct TCGModuleOps tcg = {
     .tcg_exec_unrealizefn = update_cpu_stub,
     .tb_flush = update_cpu_stub,
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
+    .tb_check_watchpoint = tb_check_watchpoint_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index e71e58aff9e7..57129bbeb791 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1910,7 +1910,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
 #endif
 
 /* user-mode: call with mmap_lock held */
-void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
+static void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
 {
     TranslationBlock *tb;
 
@@ -2439,6 +2439,7 @@ static void tcg_module_ops_tb(void)
 {
     tcg.tb_flush = tb_flush;
     tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
+    tcg.tb_check_watchpoint = tb_check_watchpoint;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index f2301f4445cc..634500fd3b7b 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -937,7 +937,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                 cpu->watchpoint_hit = wp;
 
                 mmap_lock();
-                tb_check_watchpoint(cpu, ra);
+                tcg.tb_check_watchpoint(cpu, ra);
                 if (wp->flags & BP_STOP_BEFORE_ACCESS) {
                     cpu->exception_index = EXCP_DEBUG;
                     mmap_unlock();
-- 
2.31.1

[PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h             | 2 +-
 include/tcg/tcg-module.h            | 1 +
 accel/tcg/cpu-exec-common.c         | 2 +-
 accel/tcg/tcg-module.c              | 6 ++++++
 accel/tcg/translate-all.c           | 3 ++-
 softmmu/physmem.c                   | 2 +-
 target/alpha/helper.c               | 2 +-
 target/alpha/mem_helper.c           | 2 +-
 target/arm/op_helper.c              | 2 +-
 target/arm/tlb_helper.c             | 8 ++++----
 target/cris/helper.c                | 2 +-
 target/i386/helper.c                | 2 +-
 target/i386/tcg/sysemu/svm_helper.c | 2 +-
 target/m68k/op_helper.c             | 6 +++---
 target/microblaze/helper.c          | 2 +-
 target/openrisc/sys_helper.c        | 8 ++++----
 target/ppc/excp_helper.c            | 2 +-
 target/s390x/tcg/excp_helper.c      | 2 +-
 target/tricore/op_helper.c          | 2 +-
 target/xtensa/helper.c              | 6 +++---
 20 files changed, 36 insertions(+), 28 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index c27e911b65f9..546db9416f43 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -60,7 +60,7 @@ void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
  * code. If the searched_pc is not in translated code no state is
  * restored and the function returns false.
  */
-bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
+// FIXME: docs
 
 void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
 void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 645e8eb39e71..01205ad8fd34 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -16,6 +16,7 @@ struct TCGModuleOps {
     void (*tb_flush)(CPUState *cpu);
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
     void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
+    bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index 777ad00befc8..e3c34a51ff6a 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -71,7 +71,7 @@ void cpu_loop_exit(CPUState *cpu)
 void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
 {
     if (pc) {
-        cpu_restore_state(cpu, pc, true);
+        tcg.cpu_restore_state(cpu, pc, true);
     }
     cpu_loop_exit(cpu);
 }
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index ea0c2a160a97..61ad3a648767 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -33,6 +33,11 @@ static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
 {
 }
 
+static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool will_exit)
+{
+    return false;
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -45,4 +50,5 @@ struct TCGModuleOps tcg = {
     .tb_flush = update_cpu_stub,
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
     .tb_check_watchpoint = tb_check_watchpoint_stub,
+    .cpu_restore_state = cpu_restore_state_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 57129bbeb791..836ac0565e01 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -378,7 +378,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
     return 0;
 }
 
-bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
+static bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
 {
     /*
      * The host_pc has to be in the rx region of the code buffer.
@@ -2440,6 +2440,7 @@ static void tcg_module_ops_tb(void)
     tcg.tb_flush = tb_flush;
     tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
     tcg.tb_check_watchpoint = tb_check_watchpoint;
+    tcg.cpu_restore_state = cpu_restore_state;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 634500fd3b7b..76b6e16d9466 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -947,7 +947,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                     cpu->cflags_next_tb = 1 | curr_cflags(cpu);
                     mmap_unlock();
                     if (ra) {
-                        cpu_restore_state(cpu, ra, true);
+                        tcg.cpu_restore_state(cpu, ra, true);
                     }
                     cpu_loop_exit_noexc(cpu);
                 }
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 4f56fe4d2317..5694c3428296 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -504,7 +504,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
     cs->exception_index = excp;
     env->error_code = error;
     if (retaddr) {
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         /* Floating-point exceptions (our only users) point to the next PC.  */
         env->pc += 4;
     }
diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
index 75e72bc3370f..b4d208cff8f9 100644
--- a/target/alpha/mem_helper.c
+++ b/target/alpha/mem_helper.c
@@ -34,7 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     uint64_t pc;
     uint32_t insn;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     pc = env->pc;
     insn = cpu_ldl_code(env, pc);
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 70b42b55fd0c..d309f32a755e 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -62,7 +62,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
      * we must restore CPU state here before setting the syndrome
      * the caller passed us, and cannot use cpu_loop_exit_restore().
      */
-    cpu_restore_state(cs, ra, true);
+    tcg.cpu_restore_state(cs, ra, true);
     raise_exception(env, excp, syndrome, target_el);
 }
 
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 3107f9823eff..22c9c8c01d2f 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -117,7 +117,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
     ARMMMUFaultInfo fi = {};
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     fi.type = ARMFault_Alignment;
     arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
@@ -140,7 +140,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
     ARMMMUFaultInfo fi = {};
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     fi.ea = arm_extabort_type(response);
     fi.type = ARMFault_SyncExternal;
@@ -166,7 +166,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     fi.level = 3;
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
 #else
     hwaddr phys_addr;
@@ -207,7 +207,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
         return false;
     } else {
         /* now we have a real cpu fault */
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
     }
 #endif
diff --git a/target/cris/helper.c b/target/cris/helper.c
index 911867f3b482..0b8bfd0efa8f 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -116,7 +116,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     cs->exception_index = EXCP_BUSFAULT;
     env->fault_vector = res.bf_vec;
     if (retaddr) {
-        if (cpu_restore_state(cs, retaddr, true)) {
+        if (tcg.cpu_restore_state(cs, retaddr, true)) {
             /* Evaluate flags after retranslation. */
             helper_top_evaluate_flags(env);
         }
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 100add713c5d..a059044b84c9 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -500,7 +500,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
 
         cpu_interrupt(cs, CPU_INTERRUPT_TPR);
     } else if (tcg_enabled()) {
-        cpu_restore_state(cs, cs->mem_io_pc, false);
+        tcg.cpu_restore_state(cs, cs->mem_io_pc, false);
 
         apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
     }
diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
index 0d549b3d6c3b..74241443aba5 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -630,7 +630,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
 {
     CPUState *cs = env_cpu(env);
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
                   PRIx64 ", " TARGET_FMT_lx ")!\n",
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index d006d1cb3eaa..54932083dfcb 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -468,7 +468,7 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
     M68kCPU *cpu = M68K_CPU(cs);
     CPUM68KState *env = &cpu->env;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     if (m68k_feature(env, M68K_FEATURE_M68040)) {
         env->mmu.mmusr = 0;
@@ -1076,7 +1076,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
         CPUState *cs = env_cpu(env);
 
         /* Recover PC and CC_OP for the beginning of the insn.  */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
 
         /* flags have been modified by gen_flush_flags() */
         env->cc_op = CC_OP_FLAGS;
@@ -1108,7 +1108,7 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
         CPUState *cs = env_cpu(env);
 
         /* Recover PC and CC_OP for the beginning of the insn.  */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
 
         /* flags have been modified by gen_flush_flags() */
         env->cc_op = CC_OP_FLAGS;
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 20dbd673136e..b0652b20c2ec 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -297,7 +297,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     uint32_t esr, iflags;
 
     /* Recover the pc and iflags from the corresponding insn_start.  */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     iflags = cpu->env.iflags;
 
     qemu_log_mask(CPU_LOG_INT,
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 48674231e743..0208485b8567 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -45,7 +45,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
         break;
 
     case TO_SPR(0, 16): /* NPC */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
         /* ??? Mirror or1ksim in not trashing delayed branch state
            when "jumping" to the current instruction.  */
         if (env->pc != rb) {
@@ -131,7 +131,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
     case TO_SPR(8, 0):  /* PMR */
         env->pmr = rb;
         if (env->pmr & PMR_DME || env->pmr & PMR_SME) {
-            cpu_restore_state(cs, GETPC(), true);
+            tcg.cpu_restore_state(cs, GETPC(), true);
             env->pc += 4;
             cs->halted = 1;
             raise_exception(cpu, EXCP_HALTED);
@@ -222,14 +222,14 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
         return env->evbar;
 
     case TO_SPR(0, 16): /* NPC (equals PC) */
-        cpu_restore_state(cs, GETPC(), false);
+        tcg.cpu_restore_state(cs, GETPC(), false);
         return env->pc;
 
     case TO_SPR(0, 17): /* SR */
         return cpu_get_sr(env);
 
     case TO_SPR(0, 18): /* PPC */
-        cpu_restore_state(cs, GETPC(), false);
+        tcg.cpu_restore_state(cs, GETPC(), false);
         return env->ppc;
 
     case TO_SPR(0, 32): /* EPCR */
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7b6ac16eef72..2db29b4d88a0 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1498,7 +1498,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
     uint32_t insn;
 
     /* Restore state and reload the insn we executed, for filling in DSISR.  */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     insn = cpu_ldl_code(env, env->nip);
 
     cs->exception_index = POWERPC_EXCP_ALIGN;
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index a61917d04fab..08716f7ee6d3 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -38,7 +38,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
 {
     CPUState *cs = env_cpu(env);
 
-    cpu_restore_state(cs, ra, true);
+    tcg.cpu_restore_state(cs, ra, true);
     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
                   env->psw.addr);
     trigger_pgm_exception(env, code);
diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
index 32c2bc169981..a7e57abd9f7c 100644
--- a/target/tricore/op_helper.c
+++ b/target/tricore/op_helper.c
@@ -31,7 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
 {
     CPUState *cs = env_cpu(env);
     /* in case we come from a helper-call we need to restore the PC */
-    cpu_restore_state(cs, pc, true);
+    tcg.cpu_restore_state(cs, pc, true);
 
     /* Tin is loaded into d[15] */
     env->gpr_d[15] = tin;
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index f18ab383fd89..347054520b87 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -272,7 +272,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
 
     assert(xtensa_option_enabled(env->config,
                                  XTENSA_OPTION_UNALIGNED_EXCEPTION));
-    cpu_restore_state(CPU(cpu), retaddr, true);
+    tcg.cpu_restore_state(CPU(cpu), retaddr, true);
     HELPER(exception_cause_vaddr)(env,
                                   env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
                                   addr);
@@ -303,7 +303,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     } else if (probe) {
         return false;
     } else {
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         HELPER(exception_cause_vaddr)(env, env->pc, ret, address);
     }
 }
@@ -316,7 +316,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
     XtensaCPU *cpu = XTENSA_CPU(cs);
     CPUXtensaState *env = &cpu->env;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     HELPER(exception_cause_vaddr)(env, env->pc,
                                   access_type == MMU_INST_FETCH ?
                                   INSTR_PIF_ADDR_ERROR_CAUSE :
-- 
2.31.1

[PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h             | 2 +-
 include/tcg/tcg-module.h            | 1 +
 accel/tcg/cpu-exec-common.c         | 2 +-
 accel/tcg/tcg-module.c              | 6 ++++++
 accel/tcg/translate-all.c           | 3 ++-
 softmmu/physmem.c                   | 2 +-
 target/alpha/helper.c               | 2 +-
 target/alpha/mem_helper.c           | 2 +-
 target/arm/op_helper.c              | 2 +-
 target/arm/tlb_helper.c             | 8 ++++----
 target/cris/helper.c                | 2 +-
 target/i386/helper.c                | 2 +-
 target/i386/tcg/sysemu/svm_helper.c | 2 +-
 target/m68k/op_helper.c             | 6 +++---
 target/microblaze/helper.c          | 2 +-
 target/openrisc/sys_helper.c        | 8 ++++----
 target/ppc/excp_helper.c            | 2 +-
 target/s390x/tcg/excp_helper.c      | 2 +-
 target/tricore/op_helper.c          | 2 +-
 target/xtensa/helper.c              | 6 +++---
 20 files changed, 36 insertions(+), 28 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index c27e911b65f9..546db9416f43 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -60,7 +60,7 @@ void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
  * code. If the searched_pc is not in translated code no state is
  * restored and the function returns false.
  */
-bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
+// FIXME: docs
 
 void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
 void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 645e8eb39e71..01205ad8fd34 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -16,6 +16,7 @@ struct TCGModuleOps {
     void (*tb_flush)(CPUState *cpu);
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
     void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
+    bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
index 777ad00befc8..e3c34a51ff6a 100644
--- a/accel/tcg/cpu-exec-common.c
+++ b/accel/tcg/cpu-exec-common.c
@@ -71,7 +71,7 @@ void cpu_loop_exit(CPUState *cpu)
 void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
 {
     if (pc) {
-        cpu_restore_state(cpu, pc, true);
+        tcg.cpu_restore_state(cpu, pc, true);
     }
     cpu_loop_exit(cpu);
 }
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index ea0c2a160a97..61ad3a648767 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -33,6 +33,11 @@ static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
 {
 }
 
+static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool will_exit)
+{
+    return false;
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -45,4 +50,5 @@ struct TCGModuleOps tcg = {
     .tb_flush = update_cpu_stub,
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
     .tb_check_watchpoint = tb_check_watchpoint_stub,
+    .cpu_restore_state = cpu_restore_state_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 57129bbeb791..836ac0565e01 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -378,7 +378,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
     return 0;
 }
 
-bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
+static bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
 {
     /*
      * The host_pc has to be in the rx region of the code buffer.
@@ -2440,6 +2440,7 @@ static void tcg_module_ops_tb(void)
     tcg.tb_flush = tb_flush;
     tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
     tcg.tb_check_watchpoint = tb_check_watchpoint;
+    tcg.cpu_restore_state = cpu_restore_state;
 }
 
 type_init(tcg_module_ops_tb);
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 634500fd3b7b..76b6e16d9466 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -947,7 +947,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                     cpu->cflags_next_tb = 1 | curr_cflags(cpu);
                     mmap_unlock();
                     if (ra) {
-                        cpu_restore_state(cpu, ra, true);
+                        tcg.cpu_restore_state(cpu, ra, true);
                     }
                     cpu_loop_exit_noexc(cpu);
                 }
diff --git a/target/alpha/helper.c b/target/alpha/helper.c
index 4f56fe4d2317..5694c3428296 100644
--- a/target/alpha/helper.c
+++ b/target/alpha/helper.c
@@ -504,7 +504,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
     cs->exception_index = excp;
     env->error_code = error;
     if (retaddr) {
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         /* Floating-point exceptions (our only users) point to the next PC.  */
         env->pc += 4;
     }
diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
index 75e72bc3370f..b4d208cff8f9 100644
--- a/target/alpha/mem_helper.c
+++ b/target/alpha/mem_helper.c
@@ -34,7 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     uint64_t pc;
     uint32_t insn;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     pc = env->pc;
     insn = cpu_ldl_code(env, pc);
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index 70b42b55fd0c..d309f32a755e 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -62,7 +62,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
      * we must restore CPU state here before setting the syndrome
      * the caller passed us, and cannot use cpu_loop_exit_restore().
      */
-    cpu_restore_state(cs, ra, true);
+    tcg.cpu_restore_state(cs, ra, true);
     raise_exception(env, excp, syndrome, target_el);
 }
 
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 3107f9823eff..22c9c8c01d2f 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -117,7 +117,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
     ARMMMUFaultInfo fi = {};
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     fi.type = ARMFault_Alignment;
     arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
@@ -140,7 +140,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
     ARMMMUFaultInfo fi = {};
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     fi.ea = arm_extabort_type(response);
     fi.type = ARMFault_SyncExternal;
@@ -166,7 +166,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     fi.level = 3;
 
     /* now we have a real cpu fault */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
 #else
     hwaddr phys_addr;
@@ -207,7 +207,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
         return false;
     } else {
         /* now we have a real cpu fault */
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
     }
 #endif
diff --git a/target/cris/helper.c b/target/cris/helper.c
index 911867f3b482..0b8bfd0efa8f 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -116,7 +116,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     cs->exception_index = EXCP_BUSFAULT;
     env->fault_vector = res.bf_vec;
     if (retaddr) {
-        if (cpu_restore_state(cs, retaddr, true)) {
+        if (tcg.cpu_restore_state(cs, retaddr, true)) {
             /* Evaluate flags after retranslation. */
             helper_top_evaluate_flags(env);
         }
diff --git a/target/i386/helper.c b/target/i386/helper.c
index 100add713c5d..a059044b84c9 100644
--- a/target/i386/helper.c
+++ b/target/i386/helper.c
@@ -500,7 +500,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
 
         cpu_interrupt(cs, CPU_INTERRUPT_TPR);
     } else if (tcg_enabled()) {
-        cpu_restore_state(cs, cs->mem_io_pc, false);
+        tcg.cpu_restore_state(cs, cs->mem_io_pc, false);
 
         apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
     }
diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
index 0d549b3d6c3b..74241443aba5 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -630,7 +630,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
 {
     CPUState *cs = env_cpu(env);
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
                   PRIx64 ", " TARGET_FMT_lx ")!\n",
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index d006d1cb3eaa..54932083dfcb 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -468,7 +468,7 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
     M68kCPU *cpu = M68K_CPU(cs);
     CPUM68KState *env = &cpu->env;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
 
     if (m68k_feature(env, M68K_FEATURE_M68040)) {
         env->mmu.mmusr = 0;
@@ -1076,7 +1076,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
         CPUState *cs = env_cpu(env);
 
         /* Recover PC and CC_OP for the beginning of the insn.  */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
 
         /* flags have been modified by gen_flush_flags() */
         env->cc_op = CC_OP_FLAGS;
@@ -1108,7 +1108,7 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
         CPUState *cs = env_cpu(env);
 
         /* Recover PC and CC_OP for the beginning of the insn.  */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
 
         /* flags have been modified by gen_flush_flags() */
         env->cc_op = CC_OP_FLAGS;
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index 20dbd673136e..b0652b20c2ec 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -297,7 +297,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     uint32_t esr, iflags;
 
     /* Recover the pc and iflags from the corresponding insn_start.  */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     iflags = cpu->env.iflags;
 
     qemu_log_mask(CPU_LOG_INT,
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 48674231e743..0208485b8567 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -45,7 +45,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
         break;
 
     case TO_SPR(0, 16): /* NPC */
-        cpu_restore_state(cs, GETPC(), true);
+        tcg.cpu_restore_state(cs, GETPC(), true);
         /* ??? Mirror or1ksim in not trashing delayed branch state
            when "jumping" to the current instruction.  */
         if (env->pc != rb) {
@@ -131,7 +131,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
     case TO_SPR(8, 0):  /* PMR */
         env->pmr = rb;
         if (env->pmr & PMR_DME || env->pmr & PMR_SME) {
-            cpu_restore_state(cs, GETPC(), true);
+            tcg.cpu_restore_state(cs, GETPC(), true);
             env->pc += 4;
             cs->halted = 1;
             raise_exception(cpu, EXCP_HALTED);
@@ -222,14 +222,14 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
         return env->evbar;
 
     case TO_SPR(0, 16): /* NPC (equals PC) */
-        cpu_restore_state(cs, GETPC(), false);
+        tcg.cpu_restore_state(cs, GETPC(), false);
         return env->pc;
 
     case TO_SPR(0, 17): /* SR */
         return cpu_get_sr(env);
 
     case TO_SPR(0, 18): /* PPC */
-        cpu_restore_state(cs, GETPC(), false);
+        tcg.cpu_restore_state(cs, GETPC(), false);
         return env->ppc;
 
     case TO_SPR(0, 32): /* EPCR */
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7b6ac16eef72..2db29b4d88a0 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1498,7 +1498,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
     uint32_t insn;
 
     /* Restore state and reload the insn we executed, for filling in DSISR.  */
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     insn = cpu_ldl_code(env, env->nip);
 
     cs->exception_index = POWERPC_EXCP_ALIGN;
diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index a61917d04fab..08716f7ee6d3 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -38,7 +38,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
 {
     CPUState *cs = env_cpu(env);
 
-    cpu_restore_state(cs, ra, true);
+    tcg.cpu_restore_state(cs, ra, true);
     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
                   env->psw.addr);
     trigger_pgm_exception(env, code);
diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
index 32c2bc169981..a7e57abd9f7c 100644
--- a/target/tricore/op_helper.c
+++ b/target/tricore/op_helper.c
@@ -31,7 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
 {
     CPUState *cs = env_cpu(env);
     /* in case we come from a helper-call we need to restore the PC */
-    cpu_restore_state(cs, pc, true);
+    tcg.cpu_restore_state(cs, pc, true);
 
     /* Tin is loaded into d[15] */
     env->gpr_d[15] = tin;
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index f18ab383fd89..347054520b87 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -272,7 +272,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
 
     assert(xtensa_option_enabled(env->config,
                                  XTENSA_OPTION_UNALIGNED_EXCEPTION));
-    cpu_restore_state(CPU(cpu), retaddr, true);
+    tcg.cpu_restore_state(CPU(cpu), retaddr, true);
     HELPER(exception_cause_vaddr)(env,
                                   env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
                                   addr);
@@ -303,7 +303,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     } else if (probe) {
         return false;
     } else {
-        cpu_restore_state(cs, retaddr, true);
+        tcg.cpu_restore_state(cs, retaddr, true);
         HELPER(exception_cause_vaddr)(env, env->pc, ret, address);
     }
 }
@@ -316,7 +316,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
     XtensaCPU *cpu = XTENSA_CPU(cs);
     CPUXtensaState *env = &cpu->env;
 
-    cpu_restore_state(cs, retaddr, true);
+    tcg.cpu_restore_state(cs, retaddr, true);
     HELPER(exception_cause_vaddr)(env, env->pc,
                                   access_type == MMU_INST_FETCH ?
                                   INSTR_PIF_ADDR_ERROR_CAUSE :
-- 
2.31.1

Re: [PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[David Gibson]

[-- Attachment #1: Type: text/plain, Size: 17119 bytes --]

On Tue, Aug 31, 2021 at 02:15:36PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

ppc part

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  include/exec/exec-all.h             | 2 +-
>  include/tcg/tcg-module.h            | 1 +
>  accel/tcg/cpu-exec-common.c         | 2 +-
>  accel/tcg/tcg-module.c              | 6 ++++++
>  accel/tcg/translate-all.c           | 3 ++-
>  softmmu/physmem.c                   | 2 +-
>  target/alpha/helper.c               | 2 +-
>  target/alpha/mem_helper.c           | 2 +-
>  target/arm/op_helper.c              | 2 +-
>  target/arm/tlb_helper.c             | 8 ++++----
>  target/cris/helper.c                | 2 +-
>  target/i386/helper.c                | 2 +-
>  target/i386/tcg/sysemu/svm_helper.c | 2 +-
>  target/m68k/op_helper.c             | 6 +++---
>  target/microblaze/helper.c          | 2 +-
>  target/openrisc/sys_helper.c        | 8 ++++----
>  target/ppc/excp_helper.c            | 2 +-
>  target/s390x/tcg/excp_helper.c      | 2 +-
>  target/tricore/op_helper.c          | 2 +-
>  target/xtensa/helper.c              | 6 +++---
>  20 files changed, 36 insertions(+), 28 deletions(-)
> 
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index c27e911b65f9..546db9416f43 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -60,7 +60,7 @@ void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
>   * code. If the searched_pc is not in translated code no state is
>   * restored and the function returns false.
>   */
> -bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
> +// FIXME: docs
>  
>  void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
>  void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> index 645e8eb39e71..01205ad8fd34 100644
> --- a/include/tcg/tcg-module.h
> +++ b/include/tcg/tcg-module.h
> @@ -16,6 +16,7 @@ struct TCGModuleOps {
>      void (*tb_flush)(CPUState *cpu);
>      void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
>      void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
> +    bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
>  };
>  extern struct TCGModuleOps tcg;
>  
> diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
> index 777ad00befc8..e3c34a51ff6a 100644
> --- a/accel/tcg/cpu-exec-common.c
> +++ b/accel/tcg/cpu-exec-common.c
> @@ -71,7 +71,7 @@ void cpu_loop_exit(CPUState *cpu)
>  void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
>  {
>      if (pc) {
> -        cpu_restore_state(cpu, pc, true);
> +        tcg.cpu_restore_state(cpu, pc, true);
>      }
>      cpu_loop_exit(cpu);
>  }
> diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
> index ea0c2a160a97..61ad3a648767 100644
> --- a/accel/tcg/tcg-module.c
> +++ b/accel/tcg/tcg-module.c
> @@ -33,6 +33,11 @@ static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
>  {
>  }
>  
> +static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool will_exit)
> +{
> +    return false;
> +}
> +
>  struct TCGModuleOps tcg = {
>      .tlb_flush = update_cpu_stub,
>      .tlb_flush_page = tlb_flush_page_stub,
> @@ -45,4 +50,5 @@ struct TCGModuleOps tcg = {
>      .tb_flush = update_cpu_stub,
>      .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
>      .tb_check_watchpoint = tb_check_watchpoint_stub,
> +    .cpu_restore_state = cpu_restore_state_stub,
>  };
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index 57129bbeb791..836ac0565e01 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -378,7 +378,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
>      return 0;
>  }
>  
> -bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
> +static bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
>  {
>      /*
>       * The host_pc has to be in the rx region of the code buffer.
> @@ -2440,6 +2440,7 @@ static void tcg_module_ops_tb(void)
>      tcg.tb_flush = tb_flush;
>      tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
>      tcg.tb_check_watchpoint = tb_check_watchpoint;
> +    tcg.cpu_restore_state = cpu_restore_state;
>  }
>  
>  type_init(tcg_module_ops_tb);
> diff --git a/softmmu/physmem.c b/softmmu/physmem.c
> index 634500fd3b7b..76b6e16d9466 100644
> --- a/softmmu/physmem.c
> +++ b/softmmu/physmem.c
> @@ -947,7 +947,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
>                      cpu->cflags_next_tb = 1 | curr_cflags(cpu);
>                      mmap_unlock();
>                      if (ra) {
> -                        cpu_restore_state(cpu, ra, true);
> +                        tcg.cpu_restore_state(cpu, ra, true);
>                      }
>                      cpu_loop_exit_noexc(cpu);
>                  }
> diff --git a/target/alpha/helper.c b/target/alpha/helper.c
> index 4f56fe4d2317..5694c3428296 100644
> --- a/target/alpha/helper.c
> +++ b/target/alpha/helper.c
> @@ -504,7 +504,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
>      cs->exception_index = excp;
>      env->error_code = error;
>      if (retaddr) {
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          /* Floating-point exceptions (our only users) point to the next PC.  */
>          env->pc += 4;
>      }
> diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
> index 75e72bc3370f..b4d208cff8f9 100644
> --- a/target/alpha/mem_helper.c
> +++ b/target/alpha/mem_helper.c
> @@ -34,7 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>      uint64_t pc;
>      uint32_t insn;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      pc = env->pc;
>      insn = cpu_ldl_code(env, pc);
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 70b42b55fd0c..d309f32a755e 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -62,7 +62,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
>       * we must restore CPU state here before setting the syndrome
>       * the caller passed us, and cannot use cpu_loop_exit_restore().
>       */
> -    cpu_restore_state(cs, ra, true);
> +    tcg.cpu_restore_state(cs, ra, true);
>      raise_exception(env, excp, syndrome, target_el);
>  }
>  
> diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
> index 3107f9823eff..22c9c8c01d2f 100644
> --- a/target/arm/tlb_helper.c
> +++ b/target/arm/tlb_helper.c
> @@ -117,7 +117,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>      ARMMMUFaultInfo fi = {};
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      fi.type = ARMFault_Alignment;
>      arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
> @@ -140,7 +140,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
>      ARMMMUFaultInfo fi = {};
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      fi.ea = arm_extabort_type(response);
>      fi.type = ARMFault_SyncExternal;
> @@ -166,7 +166,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      fi.level = 3;
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
>  #else
>      hwaddr phys_addr;
> @@ -207,7 +207,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>          return false;
>      } else {
>          /* now we have a real cpu fault */
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
>      }
>  #endif
> diff --git a/target/cris/helper.c b/target/cris/helper.c
> index 911867f3b482..0b8bfd0efa8f 100644
> --- a/target/cris/helper.c
> +++ b/target/cris/helper.c
> @@ -116,7 +116,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      cs->exception_index = EXCP_BUSFAULT;
>      env->fault_vector = res.bf_vec;
>      if (retaddr) {
> -        if (cpu_restore_state(cs, retaddr, true)) {
> +        if (tcg.cpu_restore_state(cs, retaddr, true)) {
>              /* Evaluate flags after retranslation. */
>              helper_top_evaluate_flags(env);
>          }
> diff --git a/target/i386/helper.c b/target/i386/helper.c
> index 100add713c5d..a059044b84c9 100644
> --- a/target/i386/helper.c
> +++ b/target/i386/helper.c
> @@ -500,7 +500,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
>  
>          cpu_interrupt(cs, CPU_INTERRUPT_TPR);
>      } else if (tcg_enabled()) {
> -        cpu_restore_state(cs, cs->mem_io_pc, false);
> +        tcg.cpu_restore_state(cs, cs->mem_io_pc, false);
>  
>          apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
>      }
> diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
> index 0d549b3d6c3b..74241443aba5 100644
> --- a/target/i386/tcg/sysemu/svm_helper.c
> +++ b/target/i386/tcg/sysemu/svm_helper.c
> @@ -630,7 +630,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
>  {
>      CPUState *cs = env_cpu(env);
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
>                    PRIx64 ", " TARGET_FMT_lx ")!\n",
> diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
> index d006d1cb3eaa..54932083dfcb 100644
> --- a/target/m68k/op_helper.c
> +++ b/target/m68k/op_helper.c
> @@ -468,7 +468,7 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>      M68kCPU *cpu = M68K_CPU(cs);
>      CPUM68KState *env = &cpu->env;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      if (m68k_feature(env, M68K_FEATURE_M68040)) {
>          env->mmu.mmusr = 0;
> @@ -1076,7 +1076,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
>          CPUState *cs = env_cpu(env);
>  
>          /* Recover PC and CC_OP for the beginning of the insn.  */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>  
>          /* flags have been modified by gen_flush_flags() */
>          env->cc_op = CC_OP_FLAGS;
> @@ -1108,7 +1108,7 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
>          CPUState *cs = env_cpu(env);
>  
>          /* Recover PC and CC_OP for the beginning of the insn.  */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>  
>          /* flags have been modified by gen_flush_flags() */
>          env->cc_op = CC_OP_FLAGS;
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 20dbd673136e..b0652b20c2ec 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -297,7 +297,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>      uint32_t esr, iflags;
>  
>      /* Recover the pc and iflags from the corresponding insn_start.  */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      iflags = cpu->env.iflags;
>  
>      qemu_log_mask(CPU_LOG_INT,
> diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
> index 48674231e743..0208485b8567 100644
> --- a/target/openrisc/sys_helper.c
> +++ b/target/openrisc/sys_helper.c
> @@ -45,7 +45,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
>          break;
>  
>      case TO_SPR(0, 16): /* NPC */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>          /* ??? Mirror or1ksim in not trashing delayed branch state
>             when "jumping" to the current instruction.  */
>          if (env->pc != rb) {
> @@ -131,7 +131,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
>      case TO_SPR(8, 0):  /* PMR */
>          env->pmr = rb;
>          if (env->pmr & PMR_DME || env->pmr & PMR_SME) {
> -            cpu_restore_state(cs, GETPC(), true);
> +            tcg.cpu_restore_state(cs, GETPC(), true);
>              env->pc += 4;
>              cs->halted = 1;
>              raise_exception(cpu, EXCP_HALTED);
> @@ -222,14 +222,14 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
>          return env->evbar;
>  
>      case TO_SPR(0, 16): /* NPC (equals PC) */
> -        cpu_restore_state(cs, GETPC(), false);
> +        tcg.cpu_restore_state(cs, GETPC(), false);
>          return env->pc;
>  
>      case TO_SPR(0, 17): /* SR */
>          return cpu_get_sr(env);
>  
>      case TO_SPR(0, 18): /* PPC */
> -        cpu_restore_state(cs, GETPC(), false);
> +        tcg.cpu_restore_state(cs, GETPC(), false);
>          return env->ppc;
>  
>      case TO_SPR(0, 32): /* EPCR */
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 7b6ac16eef72..2db29b4d88a0 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -1498,7 +1498,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>      uint32_t insn;
>  
>      /* Restore state and reload the insn we executed, for filling in DSISR.  */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      insn = cpu_ldl_code(env, env->nip);
>  
>      cs->exception_index = POWERPC_EXCP_ALIGN;
> diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
> index a61917d04fab..08716f7ee6d3 100644
> --- a/target/s390x/tcg/excp_helper.c
> +++ b/target/s390x/tcg/excp_helper.c
> @@ -38,7 +38,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
>  {
>      CPUState *cs = env_cpu(env);
>  
> -    cpu_restore_state(cs, ra, true);
> +    tcg.cpu_restore_state(cs, ra, true);
>      qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
>                    env->psw.addr);
>      trigger_pgm_exception(env, code);
> diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
> index 32c2bc169981..a7e57abd9f7c 100644
> --- a/target/tricore/op_helper.c
> +++ b/target/tricore/op_helper.c
> @@ -31,7 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
>  {
>      CPUState *cs = env_cpu(env);
>      /* in case we come from a helper-call we need to restore the PC */
> -    cpu_restore_state(cs, pc, true);
> +    tcg.cpu_restore_state(cs, pc, true);
>  
>      /* Tin is loaded into d[15] */
>      env->gpr_d[15] = tin;
> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> index f18ab383fd89..347054520b87 100644
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -272,7 +272,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
>  
>      assert(xtensa_option_enabled(env->config,
>                                   XTENSA_OPTION_UNALIGNED_EXCEPTION));
> -    cpu_restore_state(CPU(cpu), retaddr, true);
> +    tcg.cpu_restore_state(CPU(cpu), retaddr, true);
>      HELPER(exception_cause_vaddr)(env,
>                                    env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
>                                    addr);
> @@ -303,7 +303,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      } else if (probe) {
>          return false;
>      } else {
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          HELPER(exception_cause_vaddr)(env, env->pc, ret, address);
>      }
>  }
> @@ -316,7 +316,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>      XtensaCPU *cpu = XTENSA_CPU(cs);
>      CPUXtensaState *env = &cpu->env;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      HELPER(exception_cause_vaddr)(env, env->pc,
>                                    access_type == MMU_INST_FETCH ?
>                                    INSTR_PIF_ADDR_ERROR_CAUSE :

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[David Gibson]

[-- Attachment #1: Type: text/plain, Size: 17119 bytes --]

On Tue, Aug 31, 2021 at 02:15:36PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

ppc part

Acked-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  include/exec/exec-all.h             | 2 +-
>  include/tcg/tcg-module.h            | 1 +
>  accel/tcg/cpu-exec-common.c         | 2 +-
>  accel/tcg/tcg-module.c              | 6 ++++++
>  accel/tcg/translate-all.c           | 3 ++-
>  softmmu/physmem.c                   | 2 +-
>  target/alpha/helper.c               | 2 +-
>  target/alpha/mem_helper.c           | 2 +-
>  target/arm/op_helper.c              | 2 +-
>  target/arm/tlb_helper.c             | 8 ++++----
>  target/cris/helper.c                | 2 +-
>  target/i386/helper.c                | 2 +-
>  target/i386/tcg/sysemu/svm_helper.c | 2 +-
>  target/m68k/op_helper.c             | 6 +++---
>  target/microblaze/helper.c          | 2 +-
>  target/openrisc/sys_helper.c        | 8 ++++----
>  target/ppc/excp_helper.c            | 2 +-
>  target/s390x/tcg/excp_helper.c      | 2 +-
>  target/tricore/op_helper.c          | 2 +-
>  target/xtensa/helper.c              | 6 +++---
>  20 files changed, 36 insertions(+), 28 deletions(-)
> 
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index c27e911b65f9..546db9416f43 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -60,7 +60,7 @@ void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
>   * code. If the searched_pc is not in translated code no state is
>   * restored and the function returns false.
>   */
> -bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
> +// FIXME: docs
>  
>  void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
>  void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
> diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
> index 645e8eb39e71..01205ad8fd34 100644
> --- a/include/tcg/tcg-module.h
> +++ b/include/tcg/tcg-module.h
> @@ -16,6 +16,7 @@ struct TCGModuleOps {
>      void (*tb_flush)(CPUState *cpu);
>      void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
>      void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
> +    bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
>  };
>  extern struct TCGModuleOps tcg;
>  
> diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c
> index 777ad00befc8..e3c34a51ff6a 100644
> --- a/accel/tcg/cpu-exec-common.c
> +++ b/accel/tcg/cpu-exec-common.c
> @@ -71,7 +71,7 @@ void cpu_loop_exit(CPUState *cpu)
>  void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
>  {
>      if (pc) {
> -        cpu_restore_state(cpu, pc, true);
> +        tcg.cpu_restore_state(cpu, pc, true);
>      }
>      cpu_loop_exit(cpu);
>  }
> diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
> index ea0c2a160a97..61ad3a648767 100644
> --- a/accel/tcg/tcg-module.c
> +++ b/accel/tcg/tcg-module.c
> @@ -33,6 +33,11 @@ static void tb_check_watchpoint_stub(CPUState *cpu, uintptr_t retaddr)
>  {
>  }
>  
> +static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool will_exit)
> +{
> +    return false;
> +}
> +
>  struct TCGModuleOps tcg = {
>      .tlb_flush = update_cpu_stub,
>      .tlb_flush_page = tlb_flush_page_stub,
> @@ -45,4 +50,5 @@ struct TCGModuleOps tcg = {
>      .tb_flush = update_cpu_stub,
>      .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
>      .tb_check_watchpoint = tb_check_watchpoint_stub,
> +    .cpu_restore_state = cpu_restore_state_stub,
>  };
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index 57129bbeb791..836ac0565e01 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -378,7 +378,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb,
>      return 0;
>  }
>  
> -bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
> +static bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc, bool will_exit)
>  {
>      /*
>       * The host_pc has to be in the rx region of the code buffer.
> @@ -2440,6 +2440,7 @@ static void tcg_module_ops_tb(void)
>      tcg.tb_flush = tb_flush;
>      tcg.tb_invalidate_phys_range = tb_invalidate_phys_range;
>      tcg.tb_check_watchpoint = tb_check_watchpoint;
> +    tcg.cpu_restore_state = cpu_restore_state;
>  }
>  
>  type_init(tcg_module_ops_tb);
> diff --git a/softmmu/physmem.c b/softmmu/physmem.c
> index 634500fd3b7b..76b6e16d9466 100644
> --- a/softmmu/physmem.c
> +++ b/softmmu/physmem.c
> @@ -947,7 +947,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
>                      cpu->cflags_next_tb = 1 | curr_cflags(cpu);
>                      mmap_unlock();
>                      if (ra) {
> -                        cpu_restore_state(cpu, ra, true);
> +                        tcg.cpu_restore_state(cpu, ra, true);
>                      }
>                      cpu_loop_exit_noexc(cpu);
>                  }
> diff --git a/target/alpha/helper.c b/target/alpha/helper.c
> index 4f56fe4d2317..5694c3428296 100644
> --- a/target/alpha/helper.c
> +++ b/target/alpha/helper.c
> @@ -504,7 +504,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
>      cs->exception_index = excp;
>      env->error_code = error;
>      if (retaddr) {
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          /* Floating-point exceptions (our only users) point to the next PC.  */
>          env->pc += 4;
>      }
> diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
> index 75e72bc3370f..b4d208cff8f9 100644
> --- a/target/alpha/mem_helper.c
> +++ b/target/alpha/mem_helper.c
> @@ -34,7 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>      uint64_t pc;
>      uint32_t insn;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      pc = env->pc;
>      insn = cpu_ldl_code(env, pc);
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 70b42b55fd0c..d309f32a755e 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -62,7 +62,7 @@ void raise_exception_ra(CPUARMState *env, uint32_t excp, uint32_t syndrome,
>       * we must restore CPU state here before setting the syndrome
>       * the caller passed us, and cannot use cpu_loop_exit_restore().
>       */
> -    cpu_restore_state(cs, ra, true);
> +    tcg.cpu_restore_state(cs, ra, true);
>      raise_exception(env, excp, syndrome, target_el);
>  }
>  
> diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
> index 3107f9823eff..22c9c8c01d2f 100644
> --- a/target/arm/tlb_helper.c
> +++ b/target/arm/tlb_helper.c
> @@ -117,7 +117,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>      ARMMMUFaultInfo fi = {};
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      fi.type = ARMFault_Alignment;
>      arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
> @@ -140,7 +140,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
>      ARMMMUFaultInfo fi = {};
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      fi.ea = arm_extabort_type(response);
>      fi.type = ARMFault_SyncExternal;
> @@ -166,7 +166,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      fi.level = 3;
>  
>      /* now we have a real cpu fault */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
>  #else
>      hwaddr phys_addr;
> @@ -207,7 +207,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>          return false;
>      } else {
>          /* now we have a real cpu fault */
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
>      }
>  #endif
> diff --git a/target/cris/helper.c b/target/cris/helper.c
> index 911867f3b482..0b8bfd0efa8f 100644
> --- a/target/cris/helper.c
> +++ b/target/cris/helper.c
> @@ -116,7 +116,7 @@ bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      cs->exception_index = EXCP_BUSFAULT;
>      env->fault_vector = res.bf_vec;
>      if (retaddr) {
> -        if (cpu_restore_state(cs, retaddr, true)) {
> +        if (tcg.cpu_restore_state(cs, retaddr, true)) {
>              /* Evaluate flags after retranslation. */
>              helper_top_evaluate_flags(env);
>          }
> diff --git a/target/i386/helper.c b/target/i386/helper.c
> index 100add713c5d..a059044b84c9 100644
> --- a/target/i386/helper.c
> +++ b/target/i386/helper.c
> @@ -500,7 +500,7 @@ void cpu_report_tpr_access(CPUX86State *env, TPRAccess access)
>  
>          cpu_interrupt(cs, CPU_INTERRUPT_TPR);
>      } else if (tcg_enabled()) {
> -        cpu_restore_state(cs, cs->mem_io_pc, false);
> +        tcg.cpu_restore_state(cs, cs->mem_io_pc, false);
>  
>          apic_handle_tpr_access_report(cpu->apic_state, env->eip, access);
>      }
> diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
> index 0d549b3d6c3b..74241443aba5 100644
> --- a/target/i386/tcg/sysemu/svm_helper.c
> +++ b/target/i386/tcg/sysemu/svm_helper.c
> @@ -630,7 +630,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
>  {
>      CPUState *cs = env_cpu(env);
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
>                    PRIx64 ", " TARGET_FMT_lx ")!\n",
> diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
> index d006d1cb3eaa..54932083dfcb 100644
> --- a/target/m68k/op_helper.c
> +++ b/target/m68k/op_helper.c
> @@ -468,7 +468,7 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>      M68kCPU *cpu = M68K_CPU(cs);
>      CPUM68KState *env = &cpu->env;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>  
>      if (m68k_feature(env, M68K_FEATURE_M68040)) {
>          env->mmu.mmusr = 0;
> @@ -1076,7 +1076,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
>          CPUState *cs = env_cpu(env);
>  
>          /* Recover PC and CC_OP for the beginning of the insn.  */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>  
>          /* flags have been modified by gen_flush_flags() */
>          env->cc_op = CC_OP_FLAGS;
> @@ -1108,7 +1108,7 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
>          CPUState *cs = env_cpu(env);
>  
>          /* Recover PC and CC_OP for the beginning of the insn.  */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>  
>          /* flags have been modified by gen_flush_flags() */
>          env->cc_op = CC_OP_FLAGS;
> diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
> index 20dbd673136e..b0652b20c2ec 100644
> --- a/target/microblaze/helper.c
> +++ b/target/microblaze/helper.c
> @@ -297,7 +297,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
>      uint32_t esr, iflags;
>  
>      /* Recover the pc and iflags from the corresponding insn_start.  */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      iflags = cpu->env.iflags;
>  
>      qemu_log_mask(CPU_LOG_INT,
> diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
> index 48674231e743..0208485b8567 100644
> --- a/target/openrisc/sys_helper.c
> +++ b/target/openrisc/sys_helper.c
> @@ -45,7 +45,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
>          break;
>  
>      case TO_SPR(0, 16): /* NPC */
> -        cpu_restore_state(cs, GETPC(), true);
> +        tcg.cpu_restore_state(cs, GETPC(), true);
>          /* ??? Mirror or1ksim in not trashing delayed branch state
>             when "jumping" to the current instruction.  */
>          if (env->pc != rb) {
> @@ -131,7 +131,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
>      case TO_SPR(8, 0):  /* PMR */
>          env->pmr = rb;
>          if (env->pmr & PMR_DME || env->pmr & PMR_SME) {
> -            cpu_restore_state(cs, GETPC(), true);
> +            tcg.cpu_restore_state(cs, GETPC(), true);
>              env->pc += 4;
>              cs->halted = 1;
>              raise_exception(cpu, EXCP_HALTED);
> @@ -222,14 +222,14 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
>          return env->evbar;
>  
>      case TO_SPR(0, 16): /* NPC (equals PC) */
> -        cpu_restore_state(cs, GETPC(), false);
> +        tcg.cpu_restore_state(cs, GETPC(), false);
>          return env->pc;
>  
>      case TO_SPR(0, 17): /* SR */
>          return cpu_get_sr(env);
>  
>      case TO_SPR(0, 18): /* PPC */
> -        cpu_restore_state(cs, GETPC(), false);
> +        tcg.cpu_restore_state(cs, GETPC(), false);
>          return env->ppc;
>  
>      case TO_SPR(0, 32): /* EPCR */
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 7b6ac16eef72..2db29b4d88a0 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -1498,7 +1498,7 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
>      uint32_t insn;
>  
>      /* Restore state and reload the insn we executed, for filling in DSISR.  */
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      insn = cpu_ldl_code(env, env->nip);
>  
>      cs->exception_index = POWERPC_EXCP_ALIGN;
> diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
> index a61917d04fab..08716f7ee6d3 100644
> --- a/target/s390x/tcg/excp_helper.c
> +++ b/target/s390x/tcg/excp_helper.c
> @@ -38,7 +38,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
>  {
>      CPUState *cs = env_cpu(env);
>  
> -    cpu_restore_state(cs, ra, true);
> +    tcg.cpu_restore_state(cs, ra, true);
>      qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
>                    env->psw.addr);
>      trigger_pgm_exception(env, code);
> diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c
> index 32c2bc169981..a7e57abd9f7c 100644
> --- a/target/tricore/op_helper.c
> +++ b/target/tricore/op_helper.c
> @@ -31,7 +31,7 @@ raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
>  {
>      CPUState *cs = env_cpu(env);
>      /* in case we come from a helper-call we need to restore the PC */
> -    cpu_restore_state(cs, pc, true);
> +    tcg.cpu_restore_state(cs, pc, true);
>  
>      /* Tin is loaded into d[15] */
>      env->gpr_d[15] = tin;
> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> index f18ab383fd89..347054520b87 100644
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -272,7 +272,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cs,
>  
>      assert(xtensa_option_enabled(env->config,
>                                   XTENSA_OPTION_UNALIGNED_EXCEPTION));
> -    cpu_restore_state(CPU(cpu), retaddr, true);
> +    tcg.cpu_restore_state(CPU(cpu), retaddr, true);
>      HELPER(exception_cause_vaddr)(env,
>                                    env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
>                                    addr);
> @@ -303,7 +303,7 @@ bool xtensa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>      } else if (probe) {
>          return false;
>      } else {
> -        cpu_restore_state(cs, retaddr, true);
> +        tcg.cpu_restore_state(cs, retaddr, true);
>          HELPER(exception_cause_vaddr)(env, env->pc, ret, address);
>      }
>  }
> @@ -316,7 +316,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>      XtensaCPU *cpu = XTENSA_CPU(cs);
>      CPUXtensaState *env = &cpu->env;
>  
> -    cpu_restore_state(cs, retaddr, true);
> +    tcg.cpu_restore_state(cs, retaddr, true);
>      HELPER(exception_cause_vaddr)(env, env->pc,
>                                    access_type == MMU_INST_FETCH ?
>                                    INSTR_PIF_ADDR_ERROR_CAUSE :

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[Bastian Koppelmann]

On Tue, Aug 31, 2021 at 02:15:36PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/exec/exec-all.h             | 2 +-
>  include/tcg/tcg-module.h            | 1 +
>  accel/tcg/cpu-exec-common.c         | 2 +-
>  accel/tcg/tcg-module.c              | 6 ++++++
>  accel/tcg/translate-all.c           | 3 ++-
>  softmmu/physmem.c                   | 2 +-
>  target/alpha/helper.c               | 2 +-
>  target/alpha/mem_helper.c           | 2 +-
>  target/arm/op_helper.c              | 2 +-
>  target/arm/tlb_helper.c             | 8 ++++----
>  target/cris/helper.c                | 2 +-
>  target/i386/helper.c                | 2 +-
>  target/i386/tcg/sysemu/svm_helper.c | 2 +-
>  target/m68k/op_helper.c             | 6 +++---
>  target/microblaze/helper.c          | 2 +-
>  target/openrisc/sys_helper.c        | 8 ++++----
>  target/ppc/excp_helper.c            | 2 +-
>  target/s390x/tcg/excp_helper.c      | 2 +-
>  target/tricore/op_helper.c          | 2 +-
>  target/xtensa/helper.c              | 6 +++---
>  20 files changed, 36 insertions(+), 28 deletions(-)

tricore part

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

Cheers,
Bastian

Re: [PATCH 20/29] tcg_funcs: Add cpu_restore_state to TCGModuleOps

[Bastian Koppelmann]

On Tue, Aug 31, 2021 at 02:15:36PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  include/exec/exec-all.h             | 2 +-
>  include/tcg/tcg-module.h            | 1 +
>  accel/tcg/cpu-exec-common.c         | 2 +-
>  accel/tcg/tcg-module.c              | 6 ++++++
>  accel/tcg/translate-all.c           | 3 ++-
>  softmmu/physmem.c                   | 2 +-
>  target/alpha/helper.c               | 2 +-
>  target/alpha/mem_helper.c           | 2 +-
>  target/arm/op_helper.c              | 2 +-
>  target/arm/tlb_helper.c             | 8 ++++----
>  target/cris/helper.c                | 2 +-
>  target/i386/helper.c                | 2 +-
>  target/i386/tcg/sysemu/svm_helper.c | 2 +-
>  target/m68k/op_helper.c             | 6 +++---
>  target/microblaze/helper.c          | 2 +-
>  target/openrisc/sys_helper.c        | 8 ++++----
>  target/ppc/excp_helper.c            | 2 +-
>  target/s390x/tcg/excp_helper.c      | 2 +-
>  target/tricore/op_helper.c          | 2 +-
>  target/xtensa/helper.c              | 6 +++---
>  20 files changed, 36 insertions(+), 28 deletions(-)

tricore part

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

Cheers,
Bastian

[PATCH 21/29] tcg_funcs: Add curr_cflags to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 2 +-
 include/tcg/tcg-module.h  | 1 +
 accel/tcg/cpu-exec.c      | 3 ++-
 accel/tcg/tcg-module.c    | 6 ++++++
 accel/tcg/translate-all.c | 6 +++---
 softmmu/physmem.c         | 4 ++--
 6 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 546db9416f43..d3cd6bf4988a 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -563,7 +563,7 @@ static inline uint32_t tb_cflags(const TranslationBlock *tb)
 }
 
 /* current cflags for hashing/comparison */
-uint32_t curr_cflags(CPUState *cpu);
+// FIXME: docs
 
 /* TranslationBlock invalidate API */
 #if defined(CONFIG_USER_ONLY)
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 01205ad8fd34..e9c0615b51d9 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -17,6 +17,7 @@ struct TCGModuleOps {
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
     void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
     bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
+    uint32_t (*curr_cflags)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index d41d1d2bd24f..54d10a06914c 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -145,7 +145,7 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
 }
 #endif /* CONFIG USER ONLY */
 
-uint32_t curr_cflags(CPUState *cpu)
+static uint32_t curr_cflags(CPUState *cpu)
 {
     uint32_t cflags = cpu->tcg_cflags;
 
@@ -1036,6 +1036,7 @@ static void tcg_module_ops_exec(void)
 {
     tcg.tcg_exec_realizefn = tcg_exec_realizefn;
     tcg.tcg_exec_unrealizefn = tcg_exec_unrealizefn;
+    tcg.curr_cflags = curr_cflags;
 }
 
 type_init(tcg_module_ops_exec);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 61ad3a648767..f307975caff2 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -38,6 +38,11 @@ static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool wi
     return false;
 }
 
+static uint32_t curr_cflags_stub(CPUState *cpu)
+{
+    return 0;
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -51,4 +56,5 @@ struct TCGModuleOps tcg = {
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
     .tb_check_watchpoint = tb_check_watchpoint_stub,
     .cpu_restore_state = cpu_restore_state_stub,
+    .curr_cflags = curr_cflags_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 836ac0565e01..5ec7139a75bf 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1761,7 +1761,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
     if (current_tb_modified) {
         page_collection_unlock(pages);
         /* Force execution of one insn next time.  */
-        cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+        cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
         mmap_unlock();
         cpu_loop_exit_noexc(cpu);
     }
@@ -1900,7 +1900,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
 #ifdef TARGET_HAS_PRECISE_SMC
     if (current_tb_modified) {
         /* Force execution of one insn next time.  */
-        cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+        cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
         return true;
     }
 #endif
@@ -1976,7 +1976,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
      * operations only (which execute after completion) so we don't
      * double instrument the instruction.
      */
-    cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
+    cpu->cflags_next_tb = tcg.curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
 
     qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
                            "cpu_io_recompile: rewound execution of TB to "
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 76b6e16d9466..4b57d2f1d8aa 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -911,7 +911,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                  */
                 if (!cpu->can_do_io) {
                     /* Force execution of one insn next time.  */
-                    cpu->cflags_next_tb = 1 | CF_LAST_IO | curr_cflags(cpu);
+                    cpu->cflags_next_tb = 1 | CF_LAST_IO | tcg.curr_cflags(cpu);
                     cpu_loop_exit_restore(cpu, ra);
                 }
                 /*
@@ -944,7 +944,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                     cpu_loop_exit_restore(cpu, ra);
                 } else {
                     /* Force execution of one insn next time.  */
-                    cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+                    cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
                     mmap_unlock();
                     if (ra) {
                         tcg.cpu_restore_state(cpu, ra, true);
-- 
2.31.1

[PATCH 21/29] tcg_funcs: Add curr_cflags to TCGModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/exec/exec-all.h   | 2 +-
 include/tcg/tcg-module.h  | 1 +
 accel/tcg/cpu-exec.c      | 3 ++-
 accel/tcg/tcg-module.c    | 6 ++++++
 accel/tcg/translate-all.c | 6 +++---
 softmmu/physmem.c         | 4 ++--
 6 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 546db9416f43..d3cd6bf4988a 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -563,7 +563,7 @@ static inline uint32_t tb_cflags(const TranslationBlock *tb)
 }
 
 /* current cflags for hashing/comparison */
-uint32_t curr_cflags(CPUState *cpu);
+// FIXME: docs
 
 /* TranslationBlock invalidate API */
 #if defined(CONFIG_USER_ONLY)
diff --git a/include/tcg/tcg-module.h b/include/tcg/tcg-module.h
index 01205ad8fd34..e9c0615b51d9 100644
--- a/include/tcg/tcg-module.h
+++ b/include/tcg/tcg-module.h
@@ -17,6 +17,7 @@ struct TCGModuleOps {
     void (*tb_invalidate_phys_range)(tb_page_addr_t start, tb_page_addr_t end);
     void (*tb_check_watchpoint)(CPUState *cpu, uintptr_t retaddr);
     bool (*cpu_restore_state)(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
+    uint32_t (*curr_cflags)(CPUState *cpu);
 };
 extern struct TCGModuleOps tcg;
 
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index d41d1d2bd24f..54d10a06914c 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -145,7 +145,7 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
 }
 #endif /* CONFIG USER ONLY */
 
-uint32_t curr_cflags(CPUState *cpu)
+static uint32_t curr_cflags(CPUState *cpu)
 {
     uint32_t cflags = cpu->tcg_cflags;
 
@@ -1036,6 +1036,7 @@ static void tcg_module_ops_exec(void)
 {
     tcg.tcg_exec_realizefn = tcg_exec_realizefn;
     tcg.tcg_exec_unrealizefn = tcg_exec_unrealizefn;
+    tcg.curr_cflags = curr_cflags;
 }
 
 type_init(tcg_module_ops_exec);
diff --git a/accel/tcg/tcg-module.c b/accel/tcg/tcg-module.c
index 61ad3a648767..f307975caff2 100644
--- a/accel/tcg/tcg-module.c
+++ b/accel/tcg/tcg-module.c
@@ -38,6 +38,11 @@ static bool cpu_restore_state_stub(CPUState *cpu, uintptr_t searched_pc, bool wi
     return false;
 }
 
+static uint32_t curr_cflags_stub(CPUState *cpu)
+{
+    return 0;
+}
+
 struct TCGModuleOps tcg = {
     .tlb_flush = update_cpu_stub,
     .tlb_flush_page = tlb_flush_page_stub,
@@ -51,4 +56,5 @@ struct TCGModuleOps tcg = {
     .tb_invalidate_phys_range = tb_invalidate_phys_range_stub,
     .tb_check_watchpoint = tb_check_watchpoint_stub,
     .cpu_restore_state = cpu_restore_state_stub,
+    .curr_cflags = curr_cflags_stub,
 };
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 836ac0565e01..5ec7139a75bf 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1761,7 +1761,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
     if (current_tb_modified) {
         page_collection_unlock(pages);
         /* Force execution of one insn next time.  */
-        cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+        cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
         mmap_unlock();
         cpu_loop_exit_noexc(cpu);
     }
@@ -1900,7 +1900,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
 #ifdef TARGET_HAS_PRECISE_SMC
     if (current_tb_modified) {
         /* Force execution of one insn next time.  */
-        cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+        cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
         return true;
     }
 #endif
@@ -1976,7 +1976,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
      * operations only (which execute after completion) so we don't
      * double instrument the instruction.
      */
-    cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
+    cpu->cflags_next_tb = tcg.curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
 
     qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
                            "cpu_io_recompile: rewound execution of TB to "
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 76b6e16d9466..4b57d2f1d8aa 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -911,7 +911,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                  */
                 if (!cpu->can_do_io) {
                     /* Force execution of one insn next time.  */
-                    cpu->cflags_next_tb = 1 | CF_LAST_IO | curr_cflags(cpu);
+                    cpu->cflags_next_tb = 1 | CF_LAST_IO | tcg.curr_cflags(cpu);
                     cpu_loop_exit_restore(cpu, ra);
                 }
                 /*
@@ -944,7 +944,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
                     cpu_loop_exit_restore(cpu, ra);
                 } else {
                     /* Force execution of one insn next time.  */
-                    cpu->cflags_next_tb = 1 | curr_cflags(cpu);
+                    cpu->cflags_next_tb = 1 | tcg.curr_cflags(cpu);
                     mmap_unlock();
                     if (ra) {
                         tcg.cpu_restore_state(cpu, ra, true);
-- 
2.31.1

[PATCH 22/29] tcg_i386_funcs: Add update_fp_status to TCGI386ModuleOps

[Gerd Hoffmann]

Also add TCGI386ModuleOps struct, which works like TCGModuleOps
but for i386-specific functions.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h |  9 +++++++++
 target/i386/cpu.h             |  4 ++--
 accel/tcg/tcg-module-i386.c   | 10 ++++++++++
 target/i386/machine.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  9 ++++++++-
 accel/tcg/meson.build         |  6 ++++++
 6 files changed, 36 insertions(+), 4 deletions(-)
 create mode 100644 include/tcg/tcg-module-i386.h
 create mode 100644 accel/tcg/tcg-module-i386.c

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
new file mode 100644
index 000000000000..3854b506d5dc
--- /dev/null
+++ b/include/tcg/tcg-module-i386.h
@@ -0,0 +1,9 @@
+#ifndef TCG_MODULE_I386_H
+#define TCG_MODULE_I386_H
+
+struct TCGI386ModuleOps {
+    void (*update_fp_status)(CPUX86State *env);
+};
+extern struct TCGI386ModuleOps tcg_i386;
+
+#endif /* TCG_MODULE_I386_H */
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6c50d3ab4f1d..5769c1292683 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1802,6 +1802,7 @@ struct X86CPU {
     int32_t hv_max_vps;
 };
 
+#include "tcg/tcg-module-i386.h"
 
 #ifndef CONFIG_USER_ONLY
 extern const VMStateDescription vmstate_x86_cpu;
@@ -2127,7 +2128,6 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 int get_pg_mode(CPUX86State *env);
 
 /* fpu_helper.c */
-void update_fp_status(CPUX86State *env);
 void update_mxcsr_status(CPUX86State *env);
 void update_mxcsr_from_sse_status(CPUX86State *env);
 
@@ -2143,7 +2143,7 @@ static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
 {
      env->fpuc = fpuc;
      if (tcg_enabled()) {
-        update_fp_status(env);
+        tcg_i386.update_fp_status(env);
      }
 }
 
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
new file mode 100644
index 000000000000..41ce2ba4eb76
--- /dev/null
+++ b/accel/tcg/tcg-module-i386.c
@@ -0,0 +1,10 @@
+#include "qemu/osdep.h"
+#include "cpu.h"
+
+static void i386_update_cpu_stub(CPUX86State *cpu)
+{
+}
+
+struct TCGI386ModuleOps tcg_i386 = {
+    .update_fp_status = i386_update_cpu_stub,
+};
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 571e98853c64..7f5d80766f28 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -371,7 +371,7 @@ static int cpu_post_load(void *opaque, int version_id)
     }
     if (tcg_enabled()) {
         target_ulong dr7;
-        update_fp_status(env);
+        tcg_i386.update_fp_status(env);
         update_mxcsr_status(env);
 
         cpu_breakpoint_remove_all(cs, BP_CPU);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index eddf0bb9dfc4..0f7206e834fd 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -672,7 +672,7 @@ uint32_t helper_fnstcw(CPUX86State *env)
     return env->fpuc;
 }
 
-void update_fp_status(CPUX86State *env)
+static void update_fp_status(CPUX86State *env)
 {
     FloatRoundMode rnd_mode;
     FloatX80RoundPrec rnd_prec;
@@ -3039,3 +3039,10 @@ void helper_movq(CPUX86State *env, void *d, void *s)
 
 #define SHIFT 1
 #include "ops_sse.h"
+
+static void tcgi386_module_ops_fpu(void)
+{
+    tcg_i386.update_fp_status = update_fp_status;
+}
+
+type_init(tcgi386_module_ops_fpu);
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 93cbbf9f3926..7f1fdd68233b 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,6 +1,12 @@
 specific_ss.add(files(
   'tcg-module.c',
 ))
+specific_ss.add(when: 'TARGET_I386', if_true: files(
+  'tcg-module-i386.c',
+))
+specific_ss.add(when: 'TARGET_X86_64', if_true: files(
+  'tcg-module-i386.c',
+))
 
 specific_ss.add(when: 'CONFIG_TCG', if_true: files(
   'cpu-exec-common.c',
-- 
2.31.1

[PATCH 22/29] tcg_i386_funcs: Add update_fp_status to TCGI386ModuleOps

[Gerd Hoffmann]

Also add TCGI386ModuleOps struct, which works like TCGModuleOps
but for i386-specific functions.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h |  9 +++++++++
 target/i386/cpu.h             |  4 ++--
 accel/tcg/tcg-module-i386.c   | 10 ++++++++++
 target/i386/machine.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  9 ++++++++-
 accel/tcg/meson.build         |  6 ++++++
 6 files changed, 36 insertions(+), 4 deletions(-)
 create mode 100644 include/tcg/tcg-module-i386.h
 create mode 100644 accel/tcg/tcg-module-i386.c

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
new file mode 100644
index 000000000000..3854b506d5dc
--- /dev/null
+++ b/include/tcg/tcg-module-i386.h
@@ -0,0 +1,9 @@
+#ifndef TCG_MODULE_I386_H
+#define TCG_MODULE_I386_H
+
+struct TCGI386ModuleOps {
+    void (*update_fp_status)(CPUX86State *env);
+};
+extern struct TCGI386ModuleOps tcg_i386;
+
+#endif /* TCG_MODULE_I386_H */
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6c50d3ab4f1d..5769c1292683 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1802,6 +1802,7 @@ struct X86CPU {
     int32_t hv_max_vps;
 };
 
+#include "tcg/tcg-module-i386.h"
 
 #ifndef CONFIG_USER_ONLY
 extern const VMStateDescription vmstate_x86_cpu;
@@ -2127,7 +2128,6 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 int get_pg_mode(CPUX86State *env);
 
 /* fpu_helper.c */
-void update_fp_status(CPUX86State *env);
 void update_mxcsr_status(CPUX86State *env);
 void update_mxcsr_from_sse_status(CPUX86State *env);
 
@@ -2143,7 +2143,7 @@ static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
 {
      env->fpuc = fpuc;
      if (tcg_enabled()) {
-        update_fp_status(env);
+        tcg_i386.update_fp_status(env);
      }
 }
 
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
new file mode 100644
index 000000000000..41ce2ba4eb76
--- /dev/null
+++ b/accel/tcg/tcg-module-i386.c
@@ -0,0 +1,10 @@
+#include "qemu/osdep.h"
+#include "cpu.h"
+
+static void i386_update_cpu_stub(CPUX86State *cpu)
+{
+}
+
+struct TCGI386ModuleOps tcg_i386 = {
+    .update_fp_status = i386_update_cpu_stub,
+};
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 571e98853c64..7f5d80766f28 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -371,7 +371,7 @@ static int cpu_post_load(void *opaque, int version_id)
     }
     if (tcg_enabled()) {
         target_ulong dr7;
-        update_fp_status(env);
+        tcg_i386.update_fp_status(env);
         update_mxcsr_status(env);
 
         cpu_breakpoint_remove_all(cs, BP_CPU);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index eddf0bb9dfc4..0f7206e834fd 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -672,7 +672,7 @@ uint32_t helper_fnstcw(CPUX86State *env)
     return env->fpuc;
 }
 
-void update_fp_status(CPUX86State *env)
+static void update_fp_status(CPUX86State *env)
 {
     FloatRoundMode rnd_mode;
     FloatX80RoundPrec rnd_prec;
@@ -3039,3 +3039,10 @@ void helper_movq(CPUX86State *env, void *d, void *s)
 
 #define SHIFT 1
 #include "ops_sse.h"
+
+static void tcgi386_module_ops_fpu(void)
+{
+    tcg_i386.update_fp_status = update_fp_status;
+}
+
+type_init(tcgi386_module_ops_fpu);
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 93cbbf9f3926..7f1fdd68233b 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -1,6 +1,12 @@
 specific_ss.add(files(
   'tcg-module.c',
 ))
+specific_ss.add(when: 'TARGET_I386', if_true: files(
+  'tcg-module-i386.c',
+))
+specific_ss.add(when: 'TARGET_X86_64', if_true: files(
+  'tcg-module-i386.c',
+))
 
 specific_ss.add(when: 'CONFIG_TCG', if_true: files(
   'cpu-exec-common.c',
-- 
2.31.1

[PATCH 23/29] tcg_i386_funcs: Add update_mxcsr_status to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h | 1 +
 target/i386/cpu.h             | 3 +--
 accel/tcg/tcg-module-i386.c   | 1 +
 target/i386/machine.c         | 2 +-
 target/i386/tcg/fpu_helper.c  | 3 ++-
 5 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 3854b506d5dc..5d8f6434e32d 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -3,6 +3,7 @@
 
 struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
+    void (*update_mxcsr_status)(CPUX86State *env);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 5769c1292683..bdfdbdb0d8a8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2128,14 +2128,13 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 int get_pg_mode(CPUX86State *env);
 
 /* fpu_helper.c */
-void update_mxcsr_status(CPUX86State *env);
 void update_mxcsr_from_sse_status(CPUX86State *env);
 
 static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 {
     env->mxcsr = mxcsr;
     if (tcg_enabled()) {
-        update_mxcsr_status(env);
+        tcg_i386.update_mxcsr_status(env);
     }
 }
 
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 41ce2ba4eb76..fa455a2e02cb 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -7,4 +7,5 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
+    .update_mxcsr_status = i386_update_cpu_stub,
 };
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 7f5d80766f28..dc63de37dd6f 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -372,7 +372,7 @@ static int cpu_post_load(void *opaque, int version_id)
     if (tcg_enabled()) {
         target_ulong dr7;
         tcg_i386.update_fp_status(env);
-        update_mxcsr_status(env);
+        tcg_i386.update_mxcsr_status(env);
 
         cpu_breakpoint_remove_all(cs, BP_CPU);
         cpu_watchpoint_remove_all(cs, BP_CPU);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 0f7206e834fd..12dd6c9a65df 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2947,7 +2947,7 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
 #define SSE_RC_CHOP         0x6000
 #define SSE_FZ              0x8000
 
-void update_mxcsr_status(CPUX86State *env)
+static void update_mxcsr_status(CPUX86State *env)
 {
     uint32_t mxcsr = env->mxcsr;
     int rnd_type;
@@ -3043,6 +3043,7 @@ void helper_movq(CPUX86State *env, void *d, void *s)
 static void tcgi386_module_ops_fpu(void)
 {
     tcg_i386.update_fp_status = update_fp_status;
+    tcg_i386.update_mxcsr_status = update_mxcsr_status;
 }
 
 type_init(tcgi386_module_ops_fpu);
-- 
2.31.1

[PATCH 23/29] tcg_i386_funcs: Add update_mxcsr_status to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h | 1 +
 target/i386/cpu.h             | 3 +--
 accel/tcg/tcg-module-i386.c   | 1 +
 target/i386/machine.c         | 2 +-
 target/i386/tcg/fpu_helper.c  | 3 ++-
 5 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 3854b506d5dc..5d8f6434e32d 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -3,6 +3,7 @@
 
 struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
+    void (*update_mxcsr_status)(CPUX86State *env);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 5769c1292683..bdfdbdb0d8a8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2128,14 +2128,13 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 int get_pg_mode(CPUX86State *env);
 
 /* fpu_helper.c */
-void update_mxcsr_status(CPUX86State *env);
 void update_mxcsr_from_sse_status(CPUX86State *env);
 
 static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 {
     env->mxcsr = mxcsr;
     if (tcg_enabled()) {
-        update_mxcsr_status(env);
+        tcg_i386.update_mxcsr_status(env);
     }
 }
 
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 41ce2ba4eb76..fa455a2e02cb 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -7,4 +7,5 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
+    .update_mxcsr_status = i386_update_cpu_stub,
 };
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 7f5d80766f28..dc63de37dd6f 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -372,7 +372,7 @@ static int cpu_post_load(void *opaque, int version_id)
     if (tcg_enabled()) {
         target_ulong dr7;
         tcg_i386.update_fp_status(env);
-        update_mxcsr_status(env);
+        tcg_i386.update_mxcsr_status(env);
 
         cpu_breakpoint_remove_all(cs, BP_CPU);
         cpu_watchpoint_remove_all(cs, BP_CPU);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 0f7206e834fd..12dd6c9a65df 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2947,7 +2947,7 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, uint64_t mask)
 #define SSE_RC_CHOP         0x6000
 #define SSE_FZ              0x8000
 
-void update_mxcsr_status(CPUX86State *env)
+static void update_mxcsr_status(CPUX86State *env)
 {
     uint32_t mxcsr = env->mxcsr;
     int rnd_type;
@@ -3043,6 +3043,7 @@ void helper_movq(CPUX86State *env, void *d, void *s)
 static void tcgi386_module_ops_fpu(void)
 {
     tcg_i386.update_fp_status = update_fp_status;
+    tcg_i386.update_mxcsr_status = update_mxcsr_status;
 }
 
 type_init(tcgi386_module_ops_fpu);
-- 
2.31.1

[PATCH 24/29] tcg_i386_funcs: Add update_mxcsr_from_sse_status to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h |  2 ++
 target/i386/cpu.h             |  3 ---
 accel/tcg/tcg-module-i386.c   |  1 +
 target/i386/cpu-dump.c        |  2 +-
 target/i386/gdbstub.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  5 +++--
 target/i386/tcg/tcg-stub.c    | 25 -------------------------
 target/i386/tcg/meson.build   |  2 --
 8 files changed, 8 insertions(+), 34 deletions(-)
 delete mode 100644 target/i386/tcg/tcg-stub.c

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 5d8f6434e32d..576e0a63f01f 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -4,6 +4,8 @@
 struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
     void (*update_mxcsr_status)(CPUX86State *env);
+    void (*update_mxcsr_from_sse_status)(CPUX86State *env);
+
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index bdfdbdb0d8a8..deba8eb04d1f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2127,9 +2127,6 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 /* excp_helper.c */
 int get_pg_mode(CPUX86State *env);
 
-/* fpu_helper.c */
-void update_mxcsr_from_sse_status(CPUX86State *env);
-
 static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 {
     env->mxcsr = mxcsr;
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index fa455a2e02cb..6908fe34cef6 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -8,4 +8,5 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
+    .update_mxcsr_from_sse_status = i386_update_cpu_stub,
 };
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 02b635a52cff..cce9110705c7 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -487,7 +487,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
         for(i = 0; i < 8; i++) {
             fptag |= ((!env->fptags[i]) << i);
         }
-        update_mxcsr_from_sse_status(env);
+        tcg_i386.update_mxcsr_from_sse_status(env);
         qemu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n",
                      env->fpuc,
                      (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11,
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 098a2ad15a9c..e73125dbe9e2 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -190,7 +190,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
             return gdb_get_reg32(mem_buf, 0); /* fop */
 
         case IDX_MXCSR_REG:
-            update_mxcsr_from_sse_status(env);
+            tcg_i386.update_mxcsr_from_sse_status(env);
             return gdb_get_reg32(mem_buf, env->mxcsr);
 
         case IDX_CTL_CR0_REG:
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 12dd6c9a65df..9a0d1798985b 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2534,7 +2534,7 @@ static void do_xsave_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra)
 
 static void do_xsave_mxcsr(CPUX86State *env, target_ulong ptr, uintptr_t ra)
 {
-    update_mxcsr_from_sse_status(env);
+    tcg_i386.update_mxcsr_from_sse_status(env);
     cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr), env->mxcsr, ra);
     cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr_mask), 0x0000ffff, ra);
 }
@@ -2985,7 +2985,7 @@ static void update_mxcsr_status(CPUX86State *env)
     set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status);
 }
 
-void update_mxcsr_from_sse_status(CPUX86State *env)
+static void update_mxcsr_from_sse_status(CPUX86State *env)
 {
     uint8_t flags = get_float_exception_flags(&env->sse_status);
     /*
@@ -3044,6 +3044,7 @@ static void tcgi386_module_ops_fpu(void)
 {
     tcg_i386.update_fp_status = update_fp_status;
     tcg_i386.update_mxcsr_status = update_mxcsr_status;
+    tcg_i386.update_mxcsr_from_sse_status = update_mxcsr_from_sse_status;
 }
 
 type_init(tcgi386_module_ops_fpu);
diff --git a/target/i386/tcg/tcg-stub.c b/target/i386/tcg/tcg-stub.c
deleted file mode 100644
index 8d45579ada25..000000000000
--- a/target/i386/tcg/tcg-stub.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  x86 FPU, MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI helpers
- *
- *  Copyright (c) 2003 Fabrice Bellard
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "qemu/osdep.h"
-#include "cpu.h"
-
-void update_mxcsr_from_sse_status(CPUX86State *env)
-{
-}
diff --git a/target/i386/tcg/meson.build b/target/i386/tcg/meson.build
index 7bbe3d926975..8162511e6dac 100644
--- a/target/i386/tcg/meson.build
+++ b/target/i386/tcg/meson.build
@@ -1,5 +1,3 @@
-i386_softmmu_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
-
 files_ss = ss.source_set()
 files_ss.add(when: 'CONFIG_TCG', if_true: files(
   'bpt_helper.c',
-- 
2.31.1

[PATCH 24/29] tcg_i386_funcs: Add update_mxcsr_from_sse_status to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h |  2 ++
 target/i386/cpu.h             |  3 ---
 accel/tcg/tcg-module-i386.c   |  1 +
 target/i386/cpu-dump.c        |  2 +-
 target/i386/gdbstub.c         |  2 +-
 target/i386/tcg/fpu_helper.c  |  5 +++--
 target/i386/tcg/tcg-stub.c    | 25 -------------------------
 target/i386/tcg/meson.build   |  2 --
 8 files changed, 8 insertions(+), 34 deletions(-)
 delete mode 100644 target/i386/tcg/tcg-stub.c

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 5d8f6434e32d..576e0a63f01f 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -4,6 +4,8 @@
 struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
     void (*update_mxcsr_status)(CPUX86State *env);
+    void (*update_mxcsr_from_sse_status)(CPUX86State *env);
+
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index bdfdbdb0d8a8..deba8eb04d1f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2127,9 +2127,6 @@ static inline bool cpu_vmx_maybe_enabled(CPUX86State *env)
 /* excp_helper.c */
 int get_pg_mode(CPUX86State *env);
 
-/* fpu_helper.c */
-void update_mxcsr_from_sse_status(CPUX86State *env);
-
 static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr)
 {
     env->mxcsr = mxcsr;
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index fa455a2e02cb..6908fe34cef6 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -8,4 +8,5 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
+    .update_mxcsr_from_sse_status = i386_update_cpu_stub,
 };
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 02b635a52cff..cce9110705c7 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -487,7 +487,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
         for(i = 0; i < 8; i++) {
             fptag |= ((!env->fptags[i]) << i);
         }
-        update_mxcsr_from_sse_status(env);
+        tcg_i386.update_mxcsr_from_sse_status(env);
         qemu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n",
                      env->fpuc,
                      (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11,
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 098a2ad15a9c..e73125dbe9e2 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -190,7 +190,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
             return gdb_get_reg32(mem_buf, 0); /* fop */
 
         case IDX_MXCSR_REG:
-            update_mxcsr_from_sse_status(env);
+            tcg_i386.update_mxcsr_from_sse_status(env);
             return gdb_get_reg32(mem_buf, env->mxcsr);
 
         case IDX_CTL_CR0_REG:
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 12dd6c9a65df..9a0d1798985b 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -2534,7 +2534,7 @@ static void do_xsave_fpu(CPUX86State *env, target_ulong ptr, uintptr_t ra)
 
 static void do_xsave_mxcsr(CPUX86State *env, target_ulong ptr, uintptr_t ra)
 {
-    update_mxcsr_from_sse_status(env);
+    tcg_i386.update_mxcsr_from_sse_status(env);
     cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr), env->mxcsr, ra);
     cpu_stl_data_ra(env, ptr + XO(legacy.mxcsr_mask), 0x0000ffff, ra);
 }
@@ -2985,7 +2985,7 @@ static void update_mxcsr_status(CPUX86State *env)
     set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->sse_status);
 }
 
-void update_mxcsr_from_sse_status(CPUX86State *env)
+static void update_mxcsr_from_sse_status(CPUX86State *env)
 {
     uint8_t flags = get_float_exception_flags(&env->sse_status);
     /*
@@ -3044,6 +3044,7 @@ static void tcgi386_module_ops_fpu(void)
 {
     tcg_i386.update_fp_status = update_fp_status;
     tcg_i386.update_mxcsr_status = update_mxcsr_status;
+    tcg_i386.update_mxcsr_from_sse_status = update_mxcsr_from_sse_status;
 }
 
 type_init(tcgi386_module_ops_fpu);
diff --git a/target/i386/tcg/tcg-stub.c b/target/i386/tcg/tcg-stub.c
deleted file mode 100644
index 8d45579ada25..000000000000
--- a/target/i386/tcg/tcg-stub.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *  x86 FPU, MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI helpers
- *
- *  Copyright (c) 2003 Fabrice Bellard
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "qemu/osdep.h"
-#include "cpu.h"
-
-void update_mxcsr_from_sse_status(CPUX86State *env)
-{
-}
diff --git a/target/i386/tcg/meson.build b/target/i386/tcg/meson.build
index 7bbe3d926975..8162511e6dac 100644
--- a/target/i386/tcg/meson.build
+++ b/target/i386/tcg/meson.build
@@ -1,5 +1,3 @@
-i386_softmmu_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
-
 files_ss = ss.source_set()
 files_ss.add(when: 'CONFIG_TCG', if_true: files(
   'bpt_helper.c',
-- 
2.31.1

[PATCH 25/29] tcg_i386_funcs: Add x86_register_ferr_irq to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 2 +-
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 hw/i386/pc_piix.c                   | 2 +-
 hw/i386/pc_q35.c                    | 2 +-
 target/i386/tcg/sysemu/fpu_helper.c | 9 ++++++++-
 6 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 576e0a63f01f..7b99b9836a20 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -5,7 +5,7 @@ struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
     void (*update_mxcsr_status)(CPUX86State *env);
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
-
+    void (*x86_register_ferr_irq)(qemu_irq irq);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index deba8eb04d1f..d1819166ae11 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1835,7 +1835,6 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env);
 
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
-void x86_register_ferr_irq(qemu_irq irq);
 void fpu_check_raise_ferr_irq(CPUX86State *s);
 void cpu_set_ignne(void);
 void cpu_clear_ignne(void);
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 6908fe34cef6..f6d367912c17 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -5,8 +5,13 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 {
 }
 
+static void x86_register_ferr_irq_stub(qemu_irq irq)
+{
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
+    .x86_register_ferr_irq = x86_register_ferr_irq_stub,
 };
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 1bc30167acc0..d02edaa7e611 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -224,7 +224,7 @@ static void pc_init1(MachineState *machine,
     }
 
     if (tcg_enabled()) {
-        x86_register_ferr_irq(x86ms->gsi[13]);
+        tcg_i386.x86_register_ferr_irq(x86ms->gsi[13]);
     }
 
     pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index eeb0b185b118..9c2623fe61e0 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -266,7 +266,7 @@ static void pc_q35_init(MachineState *machine)
     }
 
     if (tcg_enabled()) {
-        x86_register_ferr_irq(x86ms->gsi[13]);
+        tcg_i386.x86_register_ferr_irq(x86ms->gsi[13]);
     }
 
     assert(pcms->vmport != ON_OFF_AUTO__MAX);
diff --git a/target/i386/tcg/sysemu/fpu_helper.c b/target/i386/tcg/sysemu/fpu_helper.c
index 1c3610da3b91..9caf164a7269 100644
--- a/target/i386/tcg/sysemu/fpu_helper.c
+++ b/target/i386/tcg/sysemu/fpu_helper.c
@@ -23,7 +23,7 @@
 
 static qemu_irq ferr_irq;
 
-void x86_register_ferr_irq(qemu_irq irq)
+static void x86_register_ferr_irq(qemu_irq irq)
 {
     ferr_irq = irq;
 }
@@ -55,3 +55,10 @@ void cpu_set_ignne(void)
      */
     qemu_irq_lower(ferr_irq);
 }
+
+static void tcgi386_module_ops_fpu_sys(void)
+{
+    tcg_i386.x86_register_ferr_irq = x86_register_ferr_irq;
+}
+
+type_init(tcgi386_module_ops_fpu_sys);
-- 
2.31.1

[PATCH 25/29] tcg_i386_funcs: Add x86_register_ferr_irq to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 2 +-
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 hw/i386/pc_piix.c                   | 2 +-
 hw/i386/pc_q35.c                    | 2 +-
 target/i386/tcg/sysemu/fpu_helper.c | 9 ++++++++-
 6 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 576e0a63f01f..7b99b9836a20 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -5,7 +5,7 @@ struct TCGI386ModuleOps {
     void (*update_fp_status)(CPUX86State *env);
     void (*update_mxcsr_status)(CPUX86State *env);
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
-
+    void (*x86_register_ferr_irq)(qemu_irq irq);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index deba8eb04d1f..d1819166ae11 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1835,7 +1835,6 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env);
 
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
-void x86_register_ferr_irq(qemu_irq irq);
 void fpu_check_raise_ferr_irq(CPUX86State *s);
 void cpu_set_ignne(void);
 void cpu_clear_ignne(void);
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 6908fe34cef6..f6d367912c17 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -5,8 +5,13 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 {
 }
 
+static void x86_register_ferr_irq_stub(qemu_irq irq)
+{
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
+    .x86_register_ferr_irq = x86_register_ferr_irq_stub,
 };
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 1bc30167acc0..d02edaa7e611 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -224,7 +224,7 @@ static void pc_init1(MachineState *machine,
     }
 
     if (tcg_enabled()) {
-        x86_register_ferr_irq(x86ms->gsi[13]);
+        tcg_i386.x86_register_ferr_irq(x86ms->gsi[13]);
     }
 
     pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index eeb0b185b118..9c2623fe61e0 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -266,7 +266,7 @@ static void pc_q35_init(MachineState *machine)
     }
 
     if (tcg_enabled()) {
-        x86_register_ferr_irq(x86ms->gsi[13]);
+        tcg_i386.x86_register_ferr_irq(x86ms->gsi[13]);
     }
 
     assert(pcms->vmport != ON_OFF_AUTO__MAX);
diff --git a/target/i386/tcg/sysemu/fpu_helper.c b/target/i386/tcg/sysemu/fpu_helper.c
index 1c3610da3b91..9caf164a7269 100644
--- a/target/i386/tcg/sysemu/fpu_helper.c
+++ b/target/i386/tcg/sysemu/fpu_helper.c
@@ -23,7 +23,7 @@
 
 static qemu_irq ferr_irq;
 
-void x86_register_ferr_irq(qemu_irq irq)
+static void x86_register_ferr_irq(qemu_irq irq)
 {
     ferr_irq = irq;
 }
@@ -55,3 +55,10 @@ void cpu_set_ignne(void)
      */
     qemu_irq_lower(ferr_irq);
 }
+
+static void tcgi386_module_ops_fpu_sys(void)
+{
+    tcg_i386.x86_register_ferr_irq = x86_register_ferr_irq;
+}
+
+type_init(tcgi386_module_ops_fpu_sys);
-- 
2.31.1

[PATCH 26/29] tcg_i386_funcs: Add cpu_set_ignne to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 1 +
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 hw/i386/pc.c                        | 2 +-
 target/i386/tcg/sysemu/fpu_helper.c | 3 ++-
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 7b99b9836a20..aa96aca82c4a 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -6,6 +6,7 @@ struct TCGI386ModuleOps {
     void (*update_mxcsr_status)(CPUX86State *env);
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
     void (*x86_register_ferr_irq)(qemu_irq irq);
+    void (*cpu_set_ignne)(void);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index d1819166ae11..6b9b1fad016f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1836,7 +1836,6 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env);
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
 void fpu_check_raise_ferr_irq(CPUX86State *s);
-void cpu_set_ignne(void);
 void cpu_clear_ignne(void);
 
 /* mpx_helper.c */
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index f6d367912c17..307238e3bc78 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -5,6 +5,10 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 {
 }
 
+static void i386_update_stub(void)
+{
+}
+
 static void x86_register_ferr_irq_stub(qemu_irq irq)
 {
 }
@@ -14,4 +18,5 @@ struct TCGI386ModuleOps tcg_i386 = {
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
+    .cpu_set_ignne = i386_update_stub,
 };
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 102b22394689..4b74776f6d8a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -389,7 +389,7 @@ static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
                            unsigned size)
 {
     if (tcg_enabled()) {
-        cpu_set_ignne();
+        tcg_i386.cpu_set_ignne();
     }
 }
 
diff --git a/target/i386/tcg/sysemu/fpu_helper.c b/target/i386/tcg/sysemu/fpu_helper.c
index 9caf164a7269..6453760b33c7 100644
--- a/target/i386/tcg/sysemu/fpu_helper.c
+++ b/target/i386/tcg/sysemu/fpu_helper.c
@@ -42,7 +42,7 @@ void cpu_clear_ignne(void)
     env->hflags2 &= ~HF2_IGNNE_MASK;
 }
 
-void cpu_set_ignne(void)
+static void cpu_set_ignne(void)
 {
     CPUX86State *env = &X86_CPU(first_cpu)->env;
     env->hflags2 |= HF2_IGNNE_MASK;
@@ -59,6 +59,7 @@ void cpu_set_ignne(void)
 static void tcgi386_module_ops_fpu_sys(void)
 {
     tcg_i386.x86_register_ferr_irq = x86_register_ferr_irq;
+    tcg_i386.cpu_set_ignne = cpu_set_ignne;
 }
 
 type_init(tcgi386_module_ops_fpu_sys);
-- 
2.31.1

[PATCH 26/29] tcg_i386_funcs: Add cpu_set_ignne to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 1 +
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 hw/i386/pc.c                        | 2 +-
 target/i386/tcg/sysemu/fpu_helper.c | 3 ++-
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 7b99b9836a20..aa96aca82c4a 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -6,6 +6,7 @@ struct TCGI386ModuleOps {
     void (*update_mxcsr_status)(CPUX86State *env);
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
     void (*x86_register_ferr_irq)(qemu_irq irq);
+    void (*cpu_set_ignne)(void);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index d1819166ae11..6b9b1fad016f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1836,7 +1836,6 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env);
 int cpu_get_pic_interrupt(CPUX86State *s);
 /* MSDOS compatibility mode FPU exception support */
 void fpu_check_raise_ferr_irq(CPUX86State *s);
-void cpu_set_ignne(void);
 void cpu_clear_ignne(void);
 
 /* mpx_helper.c */
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index f6d367912c17..307238e3bc78 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -5,6 +5,10 @@ static void i386_update_cpu_stub(CPUX86State *cpu)
 {
 }
 
+static void i386_update_stub(void)
+{
+}
+
 static void x86_register_ferr_irq_stub(qemu_irq irq)
 {
 }
@@ -14,4 +18,5 @@ struct TCGI386ModuleOps tcg_i386 = {
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
+    .cpu_set_ignne = i386_update_stub,
 };
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 102b22394689..4b74776f6d8a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -389,7 +389,7 @@ static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
                            unsigned size)
 {
     if (tcg_enabled()) {
-        cpu_set_ignne();
+        tcg_i386.cpu_set_ignne();
     }
 }
 
diff --git a/target/i386/tcg/sysemu/fpu_helper.c b/target/i386/tcg/sysemu/fpu_helper.c
index 9caf164a7269..6453760b33c7 100644
--- a/target/i386/tcg/sysemu/fpu_helper.c
+++ b/target/i386/tcg/sysemu/fpu_helper.c
@@ -42,7 +42,7 @@ void cpu_clear_ignne(void)
     env->hflags2 &= ~HF2_IGNNE_MASK;
 }
 
-void cpu_set_ignne(void)
+static void cpu_set_ignne(void)
 {
     CPUX86State *env = &X86_CPU(first_cpu)->env;
     env->hflags2 |= HF2_IGNNE_MASK;
@@ -59,6 +59,7 @@ void cpu_set_ignne(void)
 static void tcgi386_module_ops_fpu_sys(void)
 {
     tcg_i386.x86_register_ferr_irq = x86_register_ferr_irq;
+    tcg_i386.cpu_set_ignne = cpu_set_ignne;
 }
 
 type_init(tcgi386_module_ops_fpu_sys);
-- 
2.31.1

[PATCH 27/29] tcg_i386_funcs: Add cpu_x86_update_dr7 to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 1 +
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 target/i386/machine.c               | 2 +-
 target/i386/tcg/seg_helper.c        | 2 +-
 target/i386/tcg/sysemu/bpt_helper.c | 9 ++++++++-
 6 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index aa96aca82c4a..02a9716e2e66 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -7,6 +7,7 @@ struct TCGI386ModuleOps {
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
     void (*x86_register_ferr_irq)(qemu_irq irq);
     void (*cpu_set_ignne)(void);
+    void (*cpu_x86_update_dr7)(CPUX86State *env, uint32_t new_dr7);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6b9b1fad016f..0f3922939eb6 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1995,7 +1995,6 @@ void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t val);
 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
 
 /* hw/pc.c */
 uint64_t cpu_get_tsc(CPUX86State *env);
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 307238e3bc78..1025943c8b21 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -13,10 +13,15 @@ static void x86_register_ferr_irq_stub(qemu_irq irq)
 {
 }
 
+static void cpu_x86_update_dr7_stub(CPUX86State *env, uint32_t new_dr7)
+{
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
     .cpu_set_ignne = i386_update_stub,
+    .cpu_x86_update_dr7 = cpu_x86_update_dr7_stub,
 };
diff --git a/target/i386/machine.c b/target/i386/machine.c
index dc63de37dd6f..44736cb036c0 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -381,7 +381,7 @@ static int cpu_post_load(void *opaque, int version_id)
            let the helper re-enable them.  */
         dr7 = env->dr[7];
         env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
-        cpu_x86_update_dr7(env, dr7);
+        tcg_i386.cpu_x86_update_dr7(env, dr7);
     }
     tcg.tlb_flush(cs);
     return 0;
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 3ed20ca31d75..f39d5be97b94 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -460,7 +460,7 @@ static void switch_tss_ra(CPUX86State *env, int tss_selector,
 #ifndef CONFIG_USER_ONLY
     /* reset local breakpoints */
     if (env->dr[7] & DR7_LOCAL_BP_MASK) {
-        cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
+        tcg_i386.cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
     }
 #endif
 }
diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c
index 4d96a48a3ca3..b90c5e267ddf 100644
--- a/target/i386/tcg/sysemu/bpt_helper.c
+++ b/target/i386/tcg/sysemu/bpt_helper.c
@@ -121,7 +121,7 @@ static void hw_breakpoint_remove(CPUX86State *env, int index)
     }
 }
 
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
+static void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
 {
     target_ulong old_dr7 = env->dr[7];
     int iobpt = 0;
@@ -296,3 +296,10 @@ void helper_bpt_io(CPUX86State *env, uint32_t port,
         raise_exception(env, EXCP01_DB);
     }
 }
+
+static void tcgi386_module_ops_bpt_sys(void)
+{
+    tcg_i386.cpu_x86_update_dr7 = cpu_x86_update_dr7;
+}
+
+type_init(tcgi386_module_ops_bpt_sys);
-- 
2.31.1

[PATCH 27/29] tcg_i386_funcs: Add cpu_x86_update_dr7 to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h       | 1 +
 target/i386/cpu.h                   | 1 -
 accel/tcg/tcg-module-i386.c         | 5 +++++
 target/i386/machine.c               | 2 +-
 target/i386/tcg/seg_helper.c        | 2 +-
 target/i386/tcg/sysemu/bpt_helper.c | 9 ++++++++-
 6 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index aa96aca82c4a..02a9716e2e66 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -7,6 +7,7 @@ struct TCGI386ModuleOps {
     void (*update_mxcsr_from_sse_status)(CPUX86State *env);
     void (*x86_register_ferr_irq)(qemu_irq irq);
     void (*cpu_set_ignne)(void);
+    void (*cpu_x86_update_dr7)(CPUX86State *env, uint32_t new_dr7);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 6b9b1fad016f..0f3922939eb6 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1995,7 +1995,6 @@ void x86_stq_phys(CPUState *cs, hwaddr addr, uint64_t val);
 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
 
 /* hw/pc.c */
 uint64_t cpu_get_tsc(CPUX86State *env);
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 307238e3bc78..1025943c8b21 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -13,10 +13,15 @@ static void x86_register_ferr_irq_stub(qemu_irq irq)
 {
 }
 
+static void cpu_x86_update_dr7_stub(CPUX86State *env, uint32_t new_dr7)
+{
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
     .update_mxcsr_from_sse_status = i386_update_cpu_stub,
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
     .cpu_set_ignne = i386_update_stub,
+    .cpu_x86_update_dr7 = cpu_x86_update_dr7_stub,
 };
diff --git a/target/i386/machine.c b/target/i386/machine.c
index dc63de37dd6f..44736cb036c0 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -381,7 +381,7 @@ static int cpu_post_load(void *opaque, int version_id)
            let the helper re-enable them.  */
         dr7 = env->dr[7];
         env->dr[7] = dr7 & ~(DR7_GLOBAL_BP_MASK | DR7_LOCAL_BP_MASK);
-        cpu_x86_update_dr7(env, dr7);
+        tcg_i386.cpu_x86_update_dr7(env, dr7);
     }
     tcg.tlb_flush(cs);
     return 0;
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index 3ed20ca31d75..f39d5be97b94 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -460,7 +460,7 @@ static void switch_tss_ra(CPUX86State *env, int tss_selector,
 #ifndef CONFIG_USER_ONLY
     /* reset local breakpoints */
     if (env->dr[7] & DR7_LOCAL_BP_MASK) {
-        cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
+        tcg_i386.cpu_x86_update_dr7(env, env->dr[7] & ~DR7_LOCAL_BP_MASK);
     }
 #endif
 }
diff --git a/target/i386/tcg/sysemu/bpt_helper.c b/target/i386/tcg/sysemu/bpt_helper.c
index 4d96a48a3ca3..b90c5e267ddf 100644
--- a/target/i386/tcg/sysemu/bpt_helper.c
+++ b/target/i386/tcg/sysemu/bpt_helper.c
@@ -121,7 +121,7 @@ static void hw_breakpoint_remove(CPUX86State *env, int index)
     }
 }
 
-void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
+static void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
 {
     target_ulong old_dr7 = env->dr[7];
     int iobpt = 0;
@@ -296,3 +296,10 @@ void helper_bpt_io(CPUX86State *env, uint32_t port,
         raise_exception(env, EXCP01_DB);
     }
 }
+
+static void tcgi386_module_ops_bpt_sys(void)
+{
+    tcg_i386.cpu_x86_update_dr7 = cpu_x86_update_dr7;
+}
+
+type_init(tcgi386_module_ops_bpt_sys);
-- 
2.31.1

[PATCH 28/29] tcg_i386_funcs: Add cpu_cc_compute_all to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h | 1 +
 target/i386/cpu.h             | 4 +---
 accel/tcg/tcg-module-i386.c   | 6 ++++++
 target/i386/tcg/cc_helper.c   | 9 ++++++++-
 target/i386/tcg/fpu_helper.c  | 4 ++--
 target/i386/tcg/int_helper.c  | 8 ++++----
 target/i386/tcg/mem_helper.c  | 8 ++++----
 target/i386/tcg/misc_helper.c | 2 +-
 target/i386/tcg/seg_helper.c  | 8 ++++----
 9 files changed, 31 insertions(+), 19 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 02a9716e2e66..f6cd2bc075c7 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -8,6 +8,7 @@ struct TCGI386ModuleOps {
     void (*x86_register_ferr_irq)(qemu_irq irq);
     void (*cpu_set_ignne)(void);
     void (*cpu_x86_update_dr7)(CPUX86State *env, uint32_t new_dr7);
+    uint32_t (*cpu_cc_compute_all)(CPUX86State *env1, int op);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 0f3922939eb6..43f97fe5686d 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2064,13 +2064,11 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
                         uint64_t status, uint64_t mcg_status, uint64_t addr,
                         uint64_t misc, int flags);
 
-uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
-
 static inline uint32_t cpu_compute_eflags(CPUX86State *env)
 {
     uint32_t eflags = env->eflags;
     if (tcg_enabled()) {
-        eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
+        eflags |= tcg_i386.cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
     }
     return eflags;
 }
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 1025943c8b21..0954fbbc2db5 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -17,6 +17,11 @@ static void cpu_x86_update_dr7_stub(CPUX86State *env, uint32_t new_dr7)
 {
 }
 
+static uint32_t cpu_cc_compute_all_stub(CPUX86State *env1, int op)
+{
+    return 0;
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
@@ -24,4 +29,5 @@ struct TCGI386ModuleOps tcg_i386 = {
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
     .cpu_set_ignne = i386_update_stub,
     .cpu_x86_update_dr7 = cpu_x86_update_dr7_stub,
+    .cpu_cc_compute_all = cpu_cc_compute_all_stub,
 };
diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c
index cc7ea9e8b9d9..d61f5c5131aa 100644
--- a/target/i386/tcg/cc_helper.c
+++ b/target/i386/tcg/cc_helper.c
@@ -220,7 +220,7 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
     }
 }
 
-uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
+static uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
 {
     return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
 }
@@ -387,3 +387,10 @@ void helper_sti_vm(CPUX86State *env)
     }
 }
 #endif
+
+static void tcgi386_module_ops_cc(void)
+{
+    tcg_i386.cpu_cc_compute_all = cpu_cc_compute_all;
+}
+
+type_init(tcgi386_module_ops_cc);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 9a0d1798985b..12d4988713b8 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -469,7 +469,7 @@ void helper_fcomi_ST0_FT0(CPUX86State *env)
     FloatRelation ret;
 
     ret = floatx80_compare(ST0, FT0, &env->fp_status);
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
     merge_exception_flags(env, old_flags);
@@ -482,7 +482,7 @@ void helper_fucomi_ST0_FT0(CPUX86State *env)
     FloatRelation ret;
 
     ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
     merge_exception_flags(env, old_flags);
diff --git a/target/i386/tcg/int_helper.c b/target/i386/tcg/int_helper.c
index 87fa7280eec7..658989ebd464 100644
--- a/target/i386/tcg/int_helper.c
+++ b/target/i386/tcg/int_helper.c
@@ -189,7 +189,7 @@ void helper_aaa(CPUX86State *env)
     int al, ah, af;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
     ah = (env->regs[R_EAX] >> 8) & 0xff;
@@ -213,7 +213,7 @@ void helper_aas(CPUX86State *env)
     int al, ah, af;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
     ah = (env->regs[R_EAX] >> 8) & 0xff;
@@ -236,7 +236,7 @@ void helper_daa(CPUX86State *env)
     int old_al, al, af, cf;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
     old_al = al = env->regs[R_EAX] & 0xff;
@@ -263,7 +263,7 @@ void helper_das(CPUX86State *env)
     int al, al1, af, cf;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
diff --git a/target/i386/tcg/mem_helper.c b/target/i386/tcg/mem_helper.c
index 2da3cd14b66d..5338b26be7f7 100644
--- a/target/i386/tcg/mem_helper.c
+++ b/target/i386/tcg/mem_helper.c
@@ -33,7 +33,7 @@ void helper_cmpxchg8b_unlocked(CPUX86State *env, target_ulong a0)
     uint64_t oldv, cmpv, newv;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
     newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
@@ -59,7 +59,7 @@ void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
     uint64_t oldv, cmpv, newv;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
     newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
@@ -96,7 +96,7 @@ void helper_cmpxchg16b_unlocked(CPUX86State *env, target_ulong a0)
     if ((a0 & 0xf) != 0) {
         raise_exception_ra(env, EXCP0D_GPF, GETPC());
     }
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
     newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
@@ -130,7 +130,7 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
     if ((a0 & 0xf) != 0) {
         raise_exception_ra(env, EXCP0D_GPF, ra);
     } else if (HAVE_CMPXCHG128) {
-        int eflags = cpu_cc_compute_all(env, CC_OP);
+        int eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
         Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
         Int128 newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index dc974dad6acc..15c549277ebc 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -40,7 +40,7 @@ void helper_into(CPUX86State *env, int next_eip_addend)
 {
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if (eflags & CC_O) {
         raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
     }
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index f39d5be97b94..cae88059689f 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -2252,7 +2252,7 @@ target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl, type;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2299,7 +2299,7 @@ target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl, type;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2348,7 +2348,7 @@ void helper_verr(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2386,7 +2386,7 @@ void helper_verw(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
-- 
2.31.1

[PATCH 28/29] tcg_i386_funcs: Add cpu_cc_compute_all to TCGI386ModuleOps

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 include/tcg/tcg-module-i386.h | 1 +
 target/i386/cpu.h             | 4 +---
 accel/tcg/tcg-module-i386.c   | 6 ++++++
 target/i386/tcg/cc_helper.c   | 9 ++++++++-
 target/i386/tcg/fpu_helper.c  | 4 ++--
 target/i386/tcg/int_helper.c  | 8 ++++----
 target/i386/tcg/mem_helper.c  | 8 ++++----
 target/i386/tcg/misc_helper.c | 2 +-
 target/i386/tcg/seg_helper.c  | 8 ++++----
 9 files changed, 31 insertions(+), 19 deletions(-)

diff --git a/include/tcg/tcg-module-i386.h b/include/tcg/tcg-module-i386.h
index 02a9716e2e66..f6cd2bc075c7 100644
--- a/include/tcg/tcg-module-i386.h
+++ b/include/tcg/tcg-module-i386.h
@@ -8,6 +8,7 @@ struct TCGI386ModuleOps {
     void (*x86_register_ferr_irq)(qemu_irq irq);
     void (*cpu_set_ignne)(void);
     void (*cpu_x86_update_dr7)(CPUX86State *env, uint32_t new_dr7);
+    uint32_t (*cpu_cc_compute_all)(CPUX86State *env1, int op);
 };
 extern struct TCGI386ModuleOps tcg_i386;
 
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 0f3922939eb6..43f97fe5686d 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2064,13 +2064,11 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
                         uint64_t status, uint64_t mcg_status, uint64_t addr,
                         uint64_t misc, int flags);
 
-uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
-
 static inline uint32_t cpu_compute_eflags(CPUX86State *env)
 {
     uint32_t eflags = env->eflags;
     if (tcg_enabled()) {
-        eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
+        eflags |= tcg_i386.cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
     }
     return eflags;
 }
diff --git a/accel/tcg/tcg-module-i386.c b/accel/tcg/tcg-module-i386.c
index 1025943c8b21..0954fbbc2db5 100644
--- a/accel/tcg/tcg-module-i386.c
+++ b/accel/tcg/tcg-module-i386.c
@@ -17,6 +17,11 @@ static void cpu_x86_update_dr7_stub(CPUX86State *env, uint32_t new_dr7)
 {
 }
 
+static uint32_t cpu_cc_compute_all_stub(CPUX86State *env1, int op)
+{
+    return 0;
+}
+
 struct TCGI386ModuleOps tcg_i386 = {
     .update_fp_status = i386_update_cpu_stub,
     .update_mxcsr_status = i386_update_cpu_stub,
@@ -24,4 +29,5 @@ struct TCGI386ModuleOps tcg_i386 = {
     .x86_register_ferr_irq = x86_register_ferr_irq_stub,
     .cpu_set_ignne = i386_update_stub,
     .cpu_x86_update_dr7 = cpu_x86_update_dr7_stub,
+    .cpu_cc_compute_all = cpu_cc_compute_all_stub,
 };
diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c
index cc7ea9e8b9d9..d61f5c5131aa 100644
--- a/target/i386/tcg/cc_helper.c
+++ b/target/i386/tcg/cc_helper.c
@@ -220,7 +220,7 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
     }
 }
 
-uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
+static uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
 {
     return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
 }
@@ -387,3 +387,10 @@ void helper_sti_vm(CPUX86State *env)
     }
 }
 #endif
+
+static void tcgi386_module_ops_cc(void)
+{
+    tcg_i386.cpu_cc_compute_all = cpu_cc_compute_all;
+}
+
+type_init(tcgi386_module_ops_cc);
diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c
index 9a0d1798985b..12d4988713b8 100644
--- a/target/i386/tcg/fpu_helper.c
+++ b/target/i386/tcg/fpu_helper.c
@@ -469,7 +469,7 @@ void helper_fcomi_ST0_FT0(CPUX86State *env)
     FloatRelation ret;
 
     ret = floatx80_compare(ST0, FT0, &env->fp_status);
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
     merge_exception_flags(env, old_flags);
@@ -482,7 +482,7 @@ void helper_fucomi_ST0_FT0(CPUX86State *env)
     FloatRelation ret;
 
     ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
     merge_exception_flags(env, old_flags);
diff --git a/target/i386/tcg/int_helper.c b/target/i386/tcg/int_helper.c
index 87fa7280eec7..658989ebd464 100644
--- a/target/i386/tcg/int_helper.c
+++ b/target/i386/tcg/int_helper.c
@@ -189,7 +189,7 @@ void helper_aaa(CPUX86State *env)
     int al, ah, af;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
     ah = (env->regs[R_EAX] >> 8) & 0xff;
@@ -213,7 +213,7 @@ void helper_aas(CPUX86State *env)
     int al, ah, af;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
     ah = (env->regs[R_EAX] >> 8) & 0xff;
@@ -236,7 +236,7 @@ void helper_daa(CPUX86State *env)
     int old_al, al, af, cf;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
     old_al = al = env->regs[R_EAX] & 0xff;
@@ -263,7 +263,7 @@ void helper_das(CPUX86State *env)
     int al, al1, af, cf;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
     al = env->regs[R_EAX] & 0xff;
diff --git a/target/i386/tcg/mem_helper.c b/target/i386/tcg/mem_helper.c
index 2da3cd14b66d..5338b26be7f7 100644
--- a/target/i386/tcg/mem_helper.c
+++ b/target/i386/tcg/mem_helper.c
@@ -33,7 +33,7 @@ void helper_cmpxchg8b_unlocked(CPUX86State *env, target_ulong a0)
     uint64_t oldv, cmpv, newv;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
     newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
@@ -59,7 +59,7 @@ void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
     uint64_t oldv, cmpv, newv;
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = deposit64(env->regs[R_EAX], 32, 32, env->regs[R_EDX]);
     newv = deposit64(env->regs[R_EBX], 32, 32, env->regs[R_ECX]);
@@ -96,7 +96,7 @@ void helper_cmpxchg16b_unlocked(CPUX86State *env, target_ulong a0)
     if ((a0 & 0xf) != 0) {
         raise_exception_ra(env, EXCP0D_GPF, GETPC());
     }
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
     cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
     newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
@@ -130,7 +130,7 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
     if ((a0 & 0xf) != 0) {
         raise_exception_ra(env, EXCP0D_GPF, ra);
     } else if (HAVE_CMPXCHG128) {
-        int eflags = cpu_cc_compute_all(env, CC_OP);
+        int eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
 
         Int128 cmpv = int128_make128(env->regs[R_EAX], env->regs[R_EDX]);
         Int128 newv = int128_make128(env->regs[R_EBX], env->regs[R_ECX]);
diff --git a/target/i386/tcg/misc_helper.c b/target/i386/tcg/misc_helper.c
index dc974dad6acc..15c549277ebc 100644
--- a/target/i386/tcg/misc_helper.c
+++ b/target/i386/tcg/misc_helper.c
@@ -40,7 +40,7 @@ void helper_into(CPUX86State *env, int next_eip_addend)
 {
     int eflags;
 
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if (eflags & CC_O) {
         raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
     }
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index f39d5be97b94..cae88059689f 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -2252,7 +2252,7 @@ target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl, type;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2299,7 +2299,7 @@ target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl, type;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2348,7 +2348,7 @@ void helper_verr(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
@@ -2386,7 +2386,7 @@ void helper_verw(CPUX86State *env, target_ulong selector1)
     int rpl, dpl, cpl;
 
     selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
+    eflags = tcg_i386.cpu_cc_compute_all(env, CC_OP);
     if ((selector & 0xfffc) == 0) {
         goto fail;
     }
-- 
2.31.1

[PATCH 29/29] Revert "build: temporarily disable modular tcg"

[Gerd Hoffmann]

Everything is in place now, so re-enable modular tcg builds,
with alot more code actually being built modular now.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index e83aa4f5c3c9..bf6378481250 100644
--- a/meson.build
+++ b/meson.build
@@ -94,7 +94,7 @@ endif
 
 modular_tcg = []
 # Darwin does not support references to thread-local variables in modules
-if false #targetos != 'darwin'
+if targetos != 'darwin'
   modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
 endif
 
-- 
2.31.1

[PATCH 29/29] Revert "build: temporarily disable modular tcg"

[Gerd Hoffmann]

Everything is in place now, so re-enable modular tcg builds,
with alot more code actually being built modular now.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index e83aa4f5c3c9..bf6378481250 100644
--- a/meson.build
+++ b/meson.build
@@ -94,7 +94,7 @@ endif
 
 modular_tcg = []
 # Darwin does not support references to thread-local variables in modules
-if false #targetos != 'darwin'
+if targetos != 'darwin'
   modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
 endif
 
-- 
2.31.1