* [PATCH 0/3] v3u: add support for TPU
@ 2021-09-01 9:17 Wolfram Sang
2021-09-01 9:17 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock Wolfram Sang
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-09-01 9:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Wolfram Sang
Here is the series with patches for Geert to enable TPU on V3U. I took
the DTS patches from the BSP, the rest was developed on mainline tree.
Patch 3 enables it on the Falcon board where it will be available on the
GPIO connector CN4. Otherwise, it is not actively used on that platform.
Not essential, but nice to have, I'd say.
Tested remotely using the sloppy GPIO logic analyzer. Pulses could be
traced and changes to period and duty cycles showed up in the scopes as
well.
Duc Nguyen (2):
arm64: dts: renesas: r8a779a0: Add TPU node
arm64: dts: r8a779a0-falcon-cpu: Add TPU support
Wolfram Sang (1):
clk: renesas: r8a779a0: Add TPU clock
arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 11 +++++++++++
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 +
3 files changed, 24 insertions(+)
--
2.30.2
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock
2021-09-01 9:17 [PATCH 0/3] v3u: add support for TPU Wolfram Sang
@ 2021-09-01 9:17 ` Wolfram Sang
2021-09-06 9:36 ` Geert Uytterhoeven
2021-09-01 9:17 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node Wolfram Sang
2021-09-01 9:17 ` [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support Wolfram Sang
2 siblings, 1 reply; 8+ messages in thread
From: Wolfram Sang @ 2021-09-01 9:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Wolfram Sang
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index acaf5a93f1d3..7bef98f1cd7f 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -202,6 +202,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
DEF_MOD("tmu2", 715, R8A779A0_CLK_S1D4),
DEF_MOD("tmu3", 716, R8A779A0_CLK_S1D4),
DEF_MOD("tmu4", 717, R8A779A0_CLK_S1D4),
+ DEF_MOD("tpu0", 718, R8A779A0_CLK_S1D8),
DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1),
DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1),
DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1),
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node
2021-09-01 9:17 [PATCH 0/3] v3u: add support for TPU Wolfram Sang
2021-09-01 9:17 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock Wolfram Sang
@ 2021-09-01 9:17 ` Wolfram Sang
2021-09-06 9:38 ` Geert Uytterhoeven
2021-09-01 9:17 ` [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support Wolfram Sang
2 siblings, 1 reply; 8+ messages in thread
From: Wolfram Sang @ 2021-09-01 9:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Duc Nguyen, LUU HOAI, Wolfram Sang
From: Duc Nguyen <duc.nguyen.ub@renesas.com>
This patch adds TPU node for R-Car V3U (r8a779a0) SoC.
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 78ca75f619f6..3b022abdf212 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -1023,6 +1023,17 @@ msiof5: spi@e6c28000 {
status = "disabled";
};
+ tpu: pwm@e6e80000 {
+ compatible = "renesas,tpu-r8a779a0", "renesas,tpu";
+ reg = <0 0xe6e80000 0 0x148>;
+ interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 718>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 718>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
dmac1: dma-controller@e7350000 {
compatible = "renesas,dmac-r8a779a0";
reg = <0 0xe7350000 0 0x1000>,
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support
2021-09-01 9:17 [PATCH 0/3] v3u: add support for TPU Wolfram Sang
2021-09-01 9:17 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock Wolfram Sang
2021-09-01 9:17 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node Wolfram Sang
@ 2021-09-01 9:17 ` Wolfram Sang
2021-09-06 9:45 ` Geert Uytterhoeven
2 siblings, 1 reply; 8+ messages in thread
From: Wolfram Sang @ 2021-09-01 9:17 UTC (permalink / raw)
To: linux-renesas-soc; +Cc: Geert Uytterhoeven, Duc Nguyen, Wolfram Sang
From: Duc Nguyen <duc.nguyen.ub@renesas.com>
This patch enables TPU channel 1 for the Falcon board.
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
---
Do we want this activated upstream? I think it is nice to have.
arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index a0a1a1da0d87..cf777c2799e8 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -175,6 +175,11 @@ scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
};
+
+ tpu_pin: tpu {
+ groups = "tpu_to1";
+ function = "tpu";
+ };
};
&rwdt {
@@ -193,3 +198,10 @@ &scif0 {
&scif_clk {
clock-frequency = <24000000>;
};
+
+&tpu {
+ pinctrl-0 = <&tpu_pin>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock
2021-09-01 9:17 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock Wolfram Sang
@ 2021-09-06 9:36 ` Geert Uytterhoeven
0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-06 9:36 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas
On Wed, Sep 1, 2021 at 11:17 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk-for-v5.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node
2021-09-01 9:17 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node Wolfram Sang
@ 2021-09-06 9:38 ` Geert Uytterhoeven
0 siblings, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-06 9:38 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas, Duc Nguyen, LUU HOAI, Wolfram Sang
On Wed, Sep 1, 2021 at 11:17 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Duc Nguyen <duc.nguyen.ub@renesas.com>
>
> This patch adds TPU node for R-Car V3U (r8a779a0) SoC.
>
> Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.16.
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -1023,6 +1023,17 @@ msiof5: spi@e6c28000 {
> status = "disabled";
> };
>
> + tpu: pwm@e6e80000 {
I'll move this just before "msiof0: spi@e6e90000" while applying,
to preserve sort order.
> + compatible = "renesas,tpu-r8a779a0", "renesas,tpu";
> + reg = <0 0xe6e80000 0 0x148>;
> + interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 718>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 718>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> dmac1: dma-controller@e7350000 {
> compatible = "renesas,dmac-r8a779a0";
> reg = <0 0xe7350000 0 0x1000>,
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support
2021-09-01 9:17 ` [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support Wolfram Sang
@ 2021-09-06 9:45 ` Geert Uytterhoeven
2021-09-06 9:50 ` Wolfram Sang
0 siblings, 1 reply; 8+ messages in thread
From: Geert Uytterhoeven @ 2021-09-06 9:45 UTC (permalink / raw)
To: Wolfram Sang; +Cc: Linux-Renesas, Duc Nguyen, Wolfram Sang
Hi Wolfram,
On Wed, Sep 1, 2021 at 11:17 AM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> From: Duc Nguyen <duc.nguyen.ub@renesas.com>
>
> This patch enables TPU channel 1 for the Falcon board.
>
> Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Do we want this activated upstream? I think it is nice to have.
I don't think so, as there is no actual user.
It could be enabled in a DT overlay describing a board connected to
CN4. Or just a simple overlay for testing TPU on CN4. I'd be happy
to add the latter to
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/renesas-overlays
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support
2021-09-06 9:45 ` Geert Uytterhoeven
@ 2021-09-06 9:50 ` Wolfram Sang
0 siblings, 0 replies; 8+ messages in thread
From: Wolfram Sang @ 2021-09-06 9:50 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linux-Renesas, Duc Nguyen
[-- Attachment #1: Type: text/plain, Size: 561 bytes --]
> > Do we want this activated upstream? I think it is nice to have.
>
> I don't think so, as there is no actual user.
OK.
> It could be enabled in a DT overlay describing a board connected to
> CN4. Or just a simple overlay for testing TPU on CN4. I'd be happy
> to add the latter to
> https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/log/?h=topic/renesas-overlays
With the same argument, let's see if someones actually wants to use it
and adds it as an overly then.
Thanks for fixing the sorting in patch 2/3!
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 8+ messages in thread
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2021-09-01 9:17 [PATCH 0/3] v3u: add support for TPU Wolfram Sang
2021-09-01 9:17 ` [PATCH 1/3] clk: renesas: r8a779a0: Add TPU clock Wolfram Sang
2021-09-06 9:36 ` Geert Uytterhoeven
2021-09-01 9:17 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add TPU node Wolfram Sang
2021-09-06 9:38 ` Geert Uytterhoeven
2021-09-01 9:17 ` [RFC PATCH 3/3] arm64: dts: r8a779a0-falcon-cpu: Add TPU support Wolfram Sang
2021-09-06 9:45 ` Geert Uytterhoeven
2021-09-06 9:50 ` Wolfram Sang
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