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[2603:6081:7b01:cbda:c0de:1187:e67f:31d5]) by smtp.gmail.com with ESMTPSA id f2sm12279629qth.11.2021.09.01.04.29.27 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Sep 2021 04:29:27 -0700 (PDT) Date: Wed, 1 Sep 2021 07:29:25 -0400 From: Tom Rini To: Stefan Roese Cc: u-boot@lists.denx.de, Marek =?iso-8859-1?Q?Beh=FAn?= Subject: Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Message-ID: <20210901112925.GW858@bill-the-cat> References: <20210821175019.24180-1-trini@konsulko.com> <20210821175019.24180-4-trini@konsulko.com> <30126d52-96c9-7d75-b1f6-69b79227402e@denx.de> <20210831124303.GB858@bill-the-cat> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="lb7oz4vqFFPCyZFJ" Content-Disposition: inline In-Reply-To: X-Clacks-Overhead: GNU Terry Pratchett User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean --lb7oz4vqFFPCyZFJ Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote: > Hi Tom, >=20 > On 31.08.21 14:43, Tom Rini wrote: > > On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote: > > > Hi Tom, > > >=20 > > > On 21.08.21 19:50, Tom Rini wrote: > > > > We have a number of CONFIG symbols to express the fixed size of sys= tem > > > > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_= SIZE > > > > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the en= tire > > > > size rather than MiB. > > > >=20 > > > > Cc: Marek Beh=FAn > > > > Cc: Stefan Roese > > > > Signed-off-by: Tom Rini > > > > --- > > > > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++-- > > > > include/configs/maxbcm.h | 4 +++- > > > > include/configs/theadorable.h | 4 +++- > > > > 3 files changed, 8 insertions(+), 4 deletions(-) > > > >=20 > > > > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marve= ll/axp/ddr3_axp.h > > > > index 270691e9bcd3..970651f87029 100644 > > > > --- a/drivers/ddr/marvell/axp/ddr3_axp.h > > > > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h > > > > @@ -19,10 +19,10 @@ > > > > #define FAR_END_DIMM_ADDR 0x50 > > > > #define MAX_DIMM_ADDR 0x60 > > > > -#ifndef CONFIG_DDR_FIXED_SIZE > > > > +#ifndef CONFIG_SYS_SDRAM_SIZE > > > > #define SDRAM_CS_SIZE 0xFFFFFFF > > > > #else > > > > -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1) > > > > +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1) > > >=20 > > > Why are you using ">> 10" (dividing by 1024) here? > > >=20 > > > Thanks, > > > Stefan > > >=20 > > > > #endif > > > > #define SDRAM_CS_BASE 0x0 > > > > #define SDRAM_DIMM_SIZE 0x80000000 > > > > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h > > > > index fc2393204bec..5098f12f5425 100644 > > > > --- a/include/configs/maxbcm.h > > > > +++ b/include/configs/maxbcm.h > > > > @@ -6,6 +6,8 @@ > > > > #ifndef _CONFIG_DB_MV7846MP_GP_H > > > > #define _CONFIG_DB_MV7846MP_GP_H > > > > +#include > > > > + > > > > /* > > > > * High Level Configuration Options (easy to change) > > > > */ > > > > @@ -65,7 +67,7 @@ > > > > /* SPL related SPI defines */ > > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr= ) */ > > > > -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ > > > > +#define CONFIG_SYS_SDRAM_SIZE SZ_1G > >=20 > > OK, so before my change, SDRAM_CS_SIZE =3D 0xfffff. After my change, > > SDRAM_CS_SIZE =3D 0xfffff, still. > >=20 > > > > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ > > > > #endif /* _CONFIG_DB_MV7846MP_GP_H */ > > > > diff --git a/include/configs/theadorable.h b/include/configs/theado= rable.h > > > > index 760713d3ef87..abc48ff44ca5 100644 > > > > --- a/include/configs/theadorable.h > > > > +++ b/include/configs/theadorable.h > > > > @@ -6,6 +6,8 @@ > > > > #ifndef _CONFIG_THEADORABLE_H > > > > #define _CONFIG_THEADORABLE_H > > > > +#include > > > > + > > > > /* > > > > * High Level Configuration Options (easy to change) > > > > */ > > > > @@ -93,6 +95,6 @@ > > > > #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) > > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr= ) */ > > > > -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */ > > > > +#define CONFIG_SYS_SDRAM_SIZE SZ_2G > >=20 > > Here, before SDRAM_CS_SIZE =3D 0x1fffff and then after SDRAM_CS_SIZE =3D > > 0x1fffff. > >=20 > > This is because CONFIG_DDR_FIXED_SIZE is kilobytes and > > CONFIG_SYS_SDRAM_SIZE is bytes, yes? Thanks. >=20 > Only if CONFIG_DDR_FIXED_SIZE / CONFIG_SYS_SDRAM_SIZE is undefined. >=20 > Please see e.g. theadorable.h above. Here we have: >=20 > #define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */ >=20 > With this, the following will happen in ddr3_axp.h: >=20 > #ifndef CONFIG_DDR_FIXED_SIZE > #define SDRAM_CS_SIZE 0xFFFFFFF > #else > #define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1) > #endif >=20 > So SDRAM_CS_SIZE will be set to "(2 << 20) - 1". >=20 > AFAICT, on Armada XP CONFIG_DDR_FIXED_SIZE is bytes and not > kilobytes. I'm not follow, sorry. There's exactly two defines of CONFIG_DDR_FIXED_SIZE before this patch, neither platform also set CONFIG_SYS_SDRAM_SIZE, and they're converted to CONFIG_SYS_SDRAM_SIZE now. I did the evaluations to confirm the code is unchanged. As an aside, I do need to get merging of Pali's series to finish reproducible builds as I could then do a before/after world build where I verify things by objdump before/after. --=20 Tom --lb7oz4vqFFPCyZFJ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmEvZBIACgkQFHw5/5Y0 tyzfrgv/Tb+wXFVoEtRdoLitbKweEdx0WIPDVFZZapUMDLgZWbYUbxk4kXelpctG gEOXNU9U1SWzXEWrMe3np73gHBPAS1VkyQPoWk7TuDMbyxp+cp2fvBWIgznjntay +gMvyQn8/TFh2n19SfgeZLQni79e1Y0mYYBFDkoxoBQ4qEoA9GJcmA3CYgaloFOn dqM8etCGQYbck5aREN78YlO3C8AsVBZF4nk+k/S6LH5pCDhZep1k+9iV82OK+mhG eJ4jnnaZD6KA7QbpQMmOE41xCyXgG8XPOy5m0t8m1k8+MThL+H9keethfgT96Pbv t0g0mRLEjMP1BMD0RltbwF+cQoee/lraDMd+Pn7Ej46TWd3E6WoPZ0SWm7TdgLxs dcqaTe4NiMNblnnHWGfE9W+OPx61NYFpcztj30LfVW4FpokZ0qTJ0ZW4+7OQHuO2 EZKBkbWioO/eS3VQGQLZ8I+xhzAfvPYPnDs/ErfkqYA04S1KwAQG74jxHUsY8ZwV lz2MIyW0 =Nipx -----END PGP SIGNATURE----- --lb7oz4vqFFPCyZFJ--