From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.3 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 900E5C432BE for ; Wed, 1 Sep 2021 12:56:27 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E73E760F23 for ; Wed, 1 Sep 2021 12:56:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E73E760F23 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E87DB832A1; Wed, 1 Sep 2021 14:56:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.b="CIhd5RZx"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3751C834CA; Wed, 1 Sep 2021 14:56:22 +0200 (CEST) Received: from mail-qt1-x82c.google.com (mail-qt1-x82c.google.com [IPv6:2607:f8b0:4864:20::82c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 59768832A1 for ; Wed, 1 Sep 2021 14:56:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=trini@konsulko.com Received: by mail-qt1-x82c.google.com with SMTP id x5so2386441qtq.13 for ; Wed, 01 Sep 2021 05:56:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=konsulko.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=XL0Kp/T+my0bDYuKGqA0wXtE5c0Pxtt3iBTj4tyVSiA=; b=CIhd5RZxZI0l70rOlz5jRs7uW7aeVglw2W37oQzdo7rtF42d9FWw8tGZQRLlnZoD6R g5INIDAgiyIMjqY7gtMK1R8p2grYMAhpdfQSnzuXc+WObyK1frReY8Q4yBjthu+BEhhA /2Jni/QcA0e9Xc8NMhHhAfz+GeKiNejDvMTDk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=XL0Kp/T+my0bDYuKGqA0wXtE5c0Pxtt3iBTj4tyVSiA=; b=t76Ybpv7cWNqIvd4QjyBB1iFIlLtgqQ1mSf2E2X5snw45+njbPBS6EjGbXiWAjFl/4 HvgUZZEO1ZUcSpRqQA89z2bgK/GrhDa65rTXLUOSuOgg6Ws80EalZV60GkPlOGO27DuD GhK3R0o/PXuiRqA6T039NACYYphI5+YWzUegy27QgQXes/QX7W5exgxQdHFOES8LCE7V GTG3UYhuS/2wN8PMAmsEXyp8nVTaC74UNohBSrr3H3KheTlHAvYjh8NhH54tfytQUwu1 3JUli9O1fugxp/hBt8oRKvNGKDnPlBRogW2cqJG7BwLxgqKm2VAZxn1DLMJLq/Ra8fm5 N7XQ== X-Gm-Message-State: AOAM530wCOXASDRSZqxJbLYPzVQLpSKcumUhmE23U7QjImtRb2HQ+WBV IUOrAOleTC/AY2irC2AADc+and3Ydbr/ZwBg X-Google-Smtp-Source: ABdhPJx1I4OD/3EfI9Itp2Gask0BAWmFBkJOvVY6EcKrPR+uA3E2nlQU71P9JuFSpmXdVbYq08urlw== X-Received: by 2002:a05:622a:347:: with SMTP id r7mr7849536qtw.339.1630500975025; Wed, 01 Sep 2021 05:56:15 -0700 (PDT) Received: from bill-the-cat (2603-6081-7b01-cbda-9d52-d816-c53d-6548.res6.spectrum.com. [2603:6081:7b01:cbda:9d52:d816:c53d:6548]) by smtp.gmail.com with ESMTPSA id x19sm1320444qkm.115.2021.09.01.05.56.13 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Sep 2021 05:56:14 -0700 (PDT) Date: Wed, 1 Sep 2021 08:56:12 -0400 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Stefan Roese , Marek =?iso-8859-1?Q?Beh=FAn?= , u-boot@lists.denx.de Subject: Re: [PATCH v2] arm: mvebu: a37xx: Define CONFIG_SYS_REF_CLK and use it instead of get_ref_clk() Message-ID: <20210901125612.GC858@bill-the-cat> References: <20210811185330.15414-2-pali@kernel.org> <20210816100227.24792-1-pali@kernel.org> <20210901121410.GZ858@bill-the-cat> <20210901123243.qs5ugus36qkbpd4e@pali> <20210901123533.GA858@bill-the-cat> <20210901124021.337q4tbyrgg4e3kp@pali> <20210901124110.GB858@bill-the-cat> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="KFnFbHDFsVdcyc0g" Content-Disposition: inline In-Reply-To: <20210901124110.GB858@bill-the-cat> X-Clacks-Overhead: GNU Terry Pratchett User-Agent: Mutt/1.9.4 (2018-02-28) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean --KFnFbHDFsVdcyc0g Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 01, 2021 at 08:41:10AM -0400, Tom Rini wrote: > On Wed, Sep 01, 2021 at 02:40:21PM +0200, Pali Roh=E1r wrote: > > On Wednesday 01 September 2021 08:35:33 Tom Rini wrote: > > > On Wed, Sep 01, 2021 at 02:32:43PM +0200, Pali Roh=E1r wrote: > > > > On Wednesday 01 September 2021 08:14:10 Tom Rini wrote: > > > > > On Wed, Sep 01, 2021 at 11:12:58AM +0200, Stefan Roese wrote: > > > > >=20 > > > > > > Hi Pali, > > > > > >=20 > > > > > > On 16.08.21 12:02, Pali Roh=E1r wrote: > > > > > > > Like for all other mvebu platforms with CONFIG_SYS_TCLK macro= , define > > > > > > > CONFIG_SYS_REF_CLK macro for a37xx with base reference clock = value which is > > > > > > > read from latched reset register. > > > > > > >=20 > > > > > > > Replace all usages of get_ref_clk() function by this CONFIG_S= YS_REF_CLK > > > > > > > macro and completely remove get_ref_clk() function. > > > > > > >=20 > > > > > > > Replace also custom open-coded implementation of determining = reference > > > > > > > clock by CONFIG_SYS_REF_CLK in a37xx serial driver. > > > > > > >=20 > > > > > > > The only difference is that macro CONFIG_SYS_REF_CLK returns = base reference > > > > > > > clock in Hz and old function get_ref_clk() returned it in MHz. > > > > > > >=20 > > > > > > > Signed-off-by: Pali Roh=E1r > > > > > > >=20 > > > > > > > --- > > > > > > > Changes in v2: > > > > > > > * Do not remove MVEBU_TEST_PIN_LATCH_N and MVEBU_XTAL_MODE_MA= SK macros > > > > > >=20 > > > > > > This patch does not apply any more, with all the other patches = applied. > > > > > > Please wait a bit until these patches are included in master an= d then > > > > > > send a new version. > > > > > >=20 > > > > > > Sorry for the trouble. > > > > > >=20 > > > > > > Thanks, > > > > > > Stefan > > > > > >=20 > > > > > > > --- > > > > > > > arch/arm/mach-mvebu/armada3700/cpu.c | 24 ---------------= --------- > > > > > > > arch/arm/mach-mvebu/include/mach/cpu.h | 7 ------- > > > > > > > arch/arm/mach-mvebu/include/mach/soc.h | 6 ++++++ > > > > > > > drivers/clk/mvebu/armada-37xx-periph.c | 6 +++--- > > > > > > > drivers/clk/mvebu/armada-37xx-tbg.c | 4 ++-- > > > > > > > drivers/phy/marvell/comphy_a3700.c | 12 ++++++------ > > > > > > > drivers/serial/serial_mvebu_a3700.c | 11 ++++------- > > > > > > > drivers/watchdog/armada-37xx-wdt.c | 2 +- > > > > > > > 8 files changed, 22 insertions(+), 50 deletions(-) > > > > > > >=20 > > > > > > > diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/= mach-mvebu/armada3700/cpu.c > > > > > > > index 7702028ba19b..bdf8dc377528 100644 > > > > > > > --- a/arch/arm/mach-mvebu/armada3700/cpu.c > > > > > > > +++ b/arch/arm/mach-mvebu/armada3700/cpu.c > > > > > > > @@ -23,12 +23,6 @@ > > > > > > > /* Armada 3700 */ > > > > > > > #define MVEBU_GPIO_NB_REG_BASE (MVEBU_REGISTER(0x13800)) > > > > > > > -#define MVEBU_TEST_PIN_LATCH_N (MVEBU_GPIO_NB_REG_BASE + 0x= 8) > > > > > > > -#define MVEBU_XTAL_MODE_MASK BIT(9) > > > > > > > -#define MVEBU_XTAL_MODE_OFFS 9 > > > > > > > -#define MVEBU_XTAL_CLOCK_25MHZ 0x0 > > > > > > > -#define MVEBU_XTAL_CLOCK_40MHZ 0x1 > > > > > > > - > > > > > > > #define MVEBU_NB_WARM_RST_REG (MVEBU_GPIO_NB_REG_BASE + 0x= 40) > > > > > > > #define MVEBU_NB_WARM_RST_MAGIC_NUM 0x1d1e > > > > > > > @@ -370,21 +364,3 @@ void reset_cpu(void) > > > > > > > */ > > > > > > > writel(MVEBU_NB_WARM_RST_MAGIC_NUM, MVEBU_NB_WARM_RST_REG); > > > > > > > } > > > > > > > - > > > > > > > -/* > > > > > > > - * get_ref_clk > > > > > > > - * > > > > > > > - * return: reference clock in MHz (25 or 40) > > > > > > > - */ > > > > > > > -u32 get_ref_clk(void) > > > > > > > -{ > > > > > > > - u32 regval; > > > > > > > - > > > > > > > - regval =3D (readl(MVEBU_TEST_PIN_LATCH_N) & MVEBU_XTAL_MODE= _MASK) >> > > > > > > > - MVEBU_XTAL_MODE_OFFS; > > > > > > > - > > > > > > > - if (regval =3D=3D MVEBU_XTAL_CLOCK_25MHZ) > > > > > > > - return 25; > > > > > > > - else > > > > > > > - return 40; > > > > > > > -} > > > > > > > diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/ar= m/mach-mvebu/include/mach/cpu.h > > > > > > > index 79858858c259..9b8907e0fe55 100644 > > > > > > > --- a/arch/arm/mach-mvebu/include/mach/cpu.h > > > > > > > +++ b/arch/arm/mach-mvebu/include/mach/cpu.h > > > > > > > @@ -183,12 +183,5 @@ int a3700_dram_init_banksize(void); > > > > > > > /* A3700 PCIe regions fixer for device tree */ > > > > > > > int a3700_fdt_fix_pcie_regions(void *blob); > > > > > > > -/* > > > > > > > - * get_ref_clk > > > > > > > - * > > > > > > > - * return: reference clock in MHz (25 or 40) > > > > > > > - */ > > > > > > > -u32 get_ref_clk(void); > > > > > > > - > > > > > > > #endif /* __ASSEMBLY__ */ > > > > > > > #endif /* _MVEBU_CPU_H */ > > > > > > > diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/ar= m/mach-mvebu/include/mach/soc.h > > > > > > > index aab61f7c15cf..b03b6de3c6cd 100644 > > > > > > > --- a/arch/arm/mach-mvebu/include/mach/soc.h > > > > > > > +++ b/arch/arm/mach-mvebu/include/mach/soc.h > > > > > > > @@ -210,6 +210,12 @@ > > > > > > > #define BOOT_FROM_SPI 0x3 > > > > > > > #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ > > > > > > > +#elif defined(CONFIG_ARMADA_3700) > > > > > > > +/* SAR values for Armada 3700 */ > > > > > > > +#define MVEBU_TEST_PIN_LATCH_N MVEBU_REGISTER(0x13808) > > > > > > > +#define MVEBU_XTAL_MODE_MASK BIT(9) > > > > > > > +#define CONFIG_SYS_REF_CLK ((readl(MVEBU_TEST_PIN_LATCH_N) &= MVEBU_XTAL_MODE_MASK) ? \ > > > > > > > + 40000000 : 25000000) > > > > >=20 > > > > > NAK. CONFIG_xxx which evaluate out to a macro / function are the > > > > > hardest to convert to Kconfig. This patch is taking a step backw= ards. > > > > > In fact, wait, how does patch apply and work? There are no > > > > > CONFIG_SYS_REF_CLK instances today, so the build should blow up a= bout > > > > > adding a new non-Kconfig symbol. > > > >=20 > > > > So, could you please provide some other solution for this issue whi= ch > > > > Marek and Stefan pointed? > > >=20 > > > I don't know what the issue is, sorry. But you cannot do what you're > > > doing there with CONFIG. If for some reason you cannot use an inline > > > function, just don't name it CONFIG_SYS_REF_CLK. > >=20 > > Inline function is possible. >=20 > Then that please. >=20 > > >=A0But also, really, did > > > your build not fail when you tried to do this? It really should have > > > failed and told you to not add new CONFIG symbols. > >=20 > > There were no build issues, and built binary worked fine without any > > issue. >=20 > Ugh. I can reproduce that failure of the check here as well. Time to > go see what's going on there. Ah, common.h including a whole lot less means that some uncommon headers, such as might slip through the checks. Sigh, one more reason everything needs to get migrated. --=20 Tom --KFnFbHDFsVdcyc0g Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmEveGgACgkQFHw5/5Y0 tyw73Qv+Myr/AJ203IeNcRMLzDMOiVCaG/ecDlPKx0mdA901YJh79fcgKwmRcA91 AmSfYElezMVYe55v7XLweVL7ZCVAoXEk95iZT+J3vgRPmNULi2Do4FMg2f3WL2sy vqtdjBlUSdkcrGeo+3As4XxBa5ZzuRtHrAZPoD6ZWkUvWaeagsSi7SJ7yqBaP/bH LKsas1OpNW93IHaU9odZT0ZybQ6jh3sQ0L6JfP/xpOJV79GloGcDaRETyoKYUsV6 EJfm6EOsWnBVutZEG/o+eMa9cZdL5pwTMQ6kUE9DCfQpwK/o8eE8fWT+YxnLLdxg AK6WeMewSwBVSb0Eq6oBSHI6N+OQvndlHtBP/Q8wlc+jmqtkzA5S1uOiyG1VMVRm BIkSPMTv+aIBbRncFAN81xCjbwtYCG2HN5rcAwyiVDd7G+EBUrdhNtPnma5KTujN SyKXkchOW3xGJQybZdl6XSZCm8ACMaAwyaInnthyMai4Dea36y97r8vf2lzw6egU ruXFAhEf =GSzP -----END PGP SIGNATURE----- --KFnFbHDFsVdcyc0g--