From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D22C83026 for ; Thu, 2 Sep 2021 16:52:01 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3EC9760EE3 for ; Thu, 2 Sep 2021 16:52:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3EC9760EE3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 97F1F83569; Thu, 2 Sep 2021 18:48:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; secure) header.d=walle.cc header.i=@walle.cc header.b="eS29snYp"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C91FE83507; Thu, 2 Sep 2021 18:47:06 +0200 (CEST) Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 860478349D for ; Thu, 2 Sep 2021 18:46:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=michael@walle.cc Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 10E6622248; Thu, 2 Sep 2021 18:46:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1630601192; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5oVMemKI2a7hYFWnwCc5TVloQIQRyRJnBbCz9GMt53Q=; b=eS29snYpDG8XtGLf/bQUKQVOQcysqALnVcO8XxPJ0+HZmrHsrb4BdA7DkiQkLPFfWF3Imm iUsD9nPTvt80slqdkgDXlixJJ6r0DRfjzuHVjsYAj7M3h44DeBFEowPfgNkaoHT6yr7wj/ 10zzebswntepNVtb5lsTVSVMI/VdRig= From: Michael Walle To: u-boot@lists.denx.de Cc: Jagan Teki , Priyanka Jain , Vladimir Oltean , Tom Rini , Peter Griffin , Manivannan Sadhasivam , Michael Walle Subject: [PATCH v3 26/29] arm: dts: ls1028a: disable the PCIe controller by default Date: Thu, 2 Sep 2021 18:45:55 +0200 Message-Id: <20210902164558.1920849-27-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210902164558.1920849-1-michael@walle.cc> References: <20210902164558.1920849-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Disable the PCIe controllers by default, just like in the linux device tree. But there is one catch, for linux they are enabled in-place by the bootloader. Obviously, this doesn't work for the bootloader. Thus we explicitly enable the controllers in the -u-boot.dtsi files. Signed-off-by: Michael Walle --- arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 13 +++++++++++++ arch/arm/dts/fsl-ls1028a-qds.dtsi | 8 ++++++++ arch/arm/dts/fsl-ls1028a-rdb.dts | 8 ++++++++ arch/arm/dts/fsl-ls1028a.dtsi | 2 ++ 4 files changed, 31 insertions(+) diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi index 42bd3138b2..25aa274765 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi @@ -266,6 +266,19 @@ u-boot,dm-pre-reloc; }; +/* + * u-boot will enable the device in the linux device tree in place. Because + * we are using the linux device tree, we have to enable the PCI controller + * ourselves. + */ +&pcie1 { + status = "okay"; +}; + +&pcie2 { + status = "okay"; +}; + &soc { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/fsl-ls1028a-qds.dtsi b/arch/arm/dts/fsl-ls1028a-qds.dtsi index babd8445ee..0da0a7bc5d 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dtsi +++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi @@ -240,6 +240,14 @@ status = "okay"; }; +&pcie1 { + status = "okay"; +}; + +&pcie2 { + status = "okay"; +}; + &usb0 { status = "okay"; }; diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 18ee363d75..537ebbc697 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -122,6 +122,14 @@ status = "okay"; }; +&pcie1 { + status = "okay"; +}; + +&pcie2 { + status = "okay"; +}; + &usb0 { status = "okay"; }; diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index f11e75032b..d2f558d208 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -354,6 +354,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + status = "disabled"; }; pcie2: pcie@3500000 { @@ -367,6 +368,7 @@ bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + status = "disabled"; }; cluster1_core0_watchdog: wdt@c000000 { -- 2.30.2