From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 520A972 for ; Fri, 3 Sep 2021 09:19:13 +0000 (UTC) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.west.internal (Postfix) with ESMTP id 382A232009A4; Fri, 3 Sep 2021 05:19:12 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Fri, 03 Sep 2021 05:19:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h= date:from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=fm3; bh=jVxn/4v9E3VEwSOtkkpFTKH8mhl 2X8WtKi4ZUbok6o4=; b=Lc5ABoi1KOKOzQ86OXZCi4odRLWCR7On5ZHyFA2EGq4 tiKX3Frze7DWSztmOOzWTVPGgiwwpTsQhAlyDvcOeFmXa98Kowau61ZTFqR3Uhqq swnu0RQNzk3R+JXNIJkTXUdXcYqj5U7RdhmvR6zgbUKZ7EySjG1Dw6TigkzXFF2L c6ZRzwFjv7cegegNLiyY/5zXSo93BVGVa1Q2+RXrkWedW5qyv2aXRR5YdhpAM97S GdK7LONZXuS0o7xCAh9NyteEcg6+7i3ii2zY3U9iCyvfLvLdl4enQoLCRov9dFe3 xWlS9cPJFzNqvtv8GF8xDBAvKXnYz81+oyMIb46J9yA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=jVxn/4 v9E3VEwSOtkkpFTKH8mhl2X8WtKi4ZUbok6o4=; b=RN8q7uo+t3Oojk+GPktStl T+QPdm+Ef5i5Npr72t4/3onhc5ePxpfXX4rG18AAVKjfFp9vwSOap8phC213BUiO XwUX63KjyMp19pHeH9sL8VzbwKEfERfemswRkp/qvAGBYGD+xbhsUo5rJVYEnyFJ 5otFmYeVoDI/rv4768gTF8bQttxFyXNSSQ6Kkw2eKyDv/gELhuOlrvW5EbQ0X21g 7ZqiIKqNVDQeCGgsLnPP0YdfgO6dcn9ZYL3m4vgcA1phBJ4I9IYvcbfaEwAn4lUX leJC6P+FOBAOAi6rk/VwA1v5FPvrxP7b0J8QsiCZcky9Fveh8l5JaQf9X8W8GvEA == X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddruddvjedgudegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepfffhvffukfhfgggtuggjsehgtderredttddvnecuhfhrohhmpeforgigihhm vgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrfgrth htvghrnhepleekgeehhfdutdeljefgleejffehfffgieejhffgueefhfdtveetgeehieeh gedunecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepmh grgihimhgvsegtvghrnhhordhtvggthh X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 3 Sep 2021 05:19:10 -0400 (EDT) Date: Fri, 3 Sep 2021 11:19:09 +0200 From: Maxime Ripard To: Samuel Holland Cc: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/8] clk: sunxi-ng: Convert early providers to platform drivers Message-ID: <20210903091909.dbibqmw5dx3l5xzu@gilmour> References: <20210901050526.45673-1-samuel@sholland.org> <20210901050526.45673-8-samuel@sholland.org> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hbabr2aynocczr7s" Content-Disposition: inline In-Reply-To: <20210901050526.45673-8-samuel@sholland.org> --hbabr2aynocczr7s Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, Sep 01, 2021 at 12:05:25AM -0500, Samuel Holland wrote: > The PRCM CCU drivers depend on clocks provided by other CCU drivers. For > example, the sun8i-r-ccu driver uses the "pll-periph" clock provided by > the SoC's main CCU. >=20 > However, sun8i-r-ccu is an early OF clock provider, and many of the > main CCUs (e.g. sun50i-a64-ccu) use platform drivers. This means that > the consumer clocks will be orphaned until the supplier driver is bound. > This can be avoided by converting the remaining CCUs to use platform > drivers. Then fw_devlink will ensure the drivers are bound in the > optimal order. >=20 > The sun5i CCU is the only one which actually needs to be an early clock > provider, because it provides the clock for the system timer. That one > is left alone. >=20 > Signed-off-by: Samuel Holland The patch looks great to me, thanks for doing this work I'm surprised you were able to convert the A10 and F1C100S as well, since they don't have the arch timer. It seems we only use the fixed 24MHz clock on the A10 for the timer and the interrupt controller doesn't have a parent clock, so it works. The A10 timer can be fed with one PLL though and would require that dependency, but I guess no one ever cared. It's easy enough to revert if someone complains anyway. Maxime --hbabr2aynocczr7s Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYTHojQAKCRDj7w1vZxhR xY24AP9QkxtXTpu2pkuoyr5bNFaWFTYVALN9LHVRfNLojuWD9wEAgXLRbTNdtw7/ kgv7agI8PXtUG/dYtIOGlZoM4OfgDgc= =UHC4 -----END PGP SIGNATURE----- --hbabr2aynocczr7s-- From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFC9AC433F5 for ; Fri, 3 Sep 2021 09:21:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A48A8603E7 for ; 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Fri, 3 Sep 2021 05:19:10 -0400 (EDT) Date: Fri, 3 Sep 2021 11:19:09 +0200 From: Maxime Ripard To: Samuel Holland Cc: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/8] clk: sunxi-ng: Convert early providers to platform drivers Message-ID: <20210903091909.dbibqmw5dx3l5xzu@gilmour> References: <20210901050526.45673-1-samuel@sholland.org> <20210901050526.45673-8-samuel@sholland.org> MIME-Version: 1.0 In-Reply-To: <20210901050526.45673-8-samuel@sholland.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210903_021914_035517_F9F1A263 X-CRM114-Status: GOOD ( 19.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============0884031271627706987==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============0884031271627706987== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hbabr2aynocczr7s" Content-Disposition: inline --hbabr2aynocczr7s Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, Sep 01, 2021 at 12:05:25AM -0500, Samuel Holland wrote: > The PRCM CCU drivers depend on clocks provided by other CCU drivers. For > example, the sun8i-r-ccu driver uses the "pll-periph" clock provided by > the SoC's main CCU. >=20 > However, sun8i-r-ccu is an early OF clock provider, and many of the > main CCUs (e.g. sun50i-a64-ccu) use platform drivers. This means that > the consumer clocks will be orphaned until the supplier driver is bound. > This can be avoided by converting the remaining CCUs to use platform > drivers. Then fw_devlink will ensure the drivers are bound in the > optimal order. >=20 > The sun5i CCU is the only one which actually needs to be an early clock > provider, because it provides the clock for the system timer. That one > is left alone. >=20 > Signed-off-by: Samuel Holland The patch looks great to me, thanks for doing this work I'm surprised you were able to convert the A10 and F1C100S as well, since they don't have the arch timer. It seems we only use the fixed 24MHz clock on the A10 for the timer and the interrupt controller doesn't have a parent clock, so it works. The A10 timer can be fed with one PLL though and would require that dependency, but I guess no one ever cared. It's easy enough to revert if someone complains anyway. Maxime --hbabr2aynocczr7s Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYTHojQAKCRDj7w1vZxhR xY24AP9QkxtXTpu2pkuoyr5bNFaWFTYVALN9LHVRfNLojuWD9wEAgXLRbTNdtw7/ kgv7agI8PXtUG/dYtIOGlZoM4OfgDgc= =UHC4 -----END PGP SIGNATURE----- --hbabr2aynocczr7s-- --===============0884031271627706987== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============0884031271627706987==--