From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50AC9C433FE for ; Sat, 4 Sep 2021 06:09:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 31FD160F9C for ; Sat, 4 Sep 2021 06:09:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235970AbhIDGK0 (ORCPT ); Sat, 4 Sep 2021 02:10:26 -0400 Received: from home.keithp.com ([63.227.221.253]:36132 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233118AbhIDGKV (ORCPT ); Sat, 4 Sep 2021 02:10:21 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id 287B43F30825; Fri, 3 Sep 2021 23:08:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=keithp.com; s=mail; t=1630735730; bh=wHQHhe/z1t+7Muqi7BuBwKnQBrGZ5zjoyELUUVwVsjo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NNne2WrsnXzSaePx9piswHltvkemkeEqQaa4YChPuYsL2R+x9EHmySiPxw1g8PFjF NNY2ge9DS22vSce77rx0Qx0CFborlsZUDfOC+vunAPgOhhLSYDdRJILQxG+aILNCJS OxrazLA8GQaVzixeSqT/t8cNHnJcPvHEvLR+XZTOXSBRbCA+MYcesO2k1Qc6NoXrpg EqPA6l6cR8YRV0dWgHF5rj+MMCERuimy/aB6o0cQYci8quTC4R8V7k9H08DBzb1L1H u9hStzqqxXsBgHtxARcNF/Pj5JZlNSg3JADTND9FH7ZIEngw6ZogPmSxIMw/g5l9Ej Zw+S/JkVoXG9A== X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id wfuL8kiQWeNy; Fri, 3 Sep 2021 23:08:49 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 5EDAF3F307ED; Fri, 3 Sep 2021 23:08:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=keithp.com; s=mail; t=1630735728; bh=wHQHhe/z1t+7Muqi7BuBwKnQBrGZ5zjoyELUUVwVsjo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k2Hei008tYvX1SOt5xmCm9YVKNu+GQydA/eyi5/mF74I/UcOC4KPg0hkEvGmrJgsu AsuFyrBGQWY2owoid/+mCJKmtplYydpgTKYeO38coM3sQwCumuIK6pLC5EnlbyOVcZ 5yTP+SxsYnXaAm7wM92RxTvuMTu2SH5IsONzz+G5Dgd7ffPpgsRTGU/xhH2YxBJJPi m3HoRQrkv1YLHFJb0r4tH+8iJC9AXfto+69uC9ZwjJBS/U8UwQoy2O28UyM4LkIvBH IsTObt9EkSA44NVsxNh1TokCP7bAudDyEPMmUxw5X6qfI+BsY1P2Y8Nc028SGtejmc ytIEqZUrTJG7Q== Received: by keithp.com (Postfix, from userid 1000) id 7C9141E6013C; Fri, 3 Sep 2021 23:09:10 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexander Sverdlin , Andrew Morton , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Bjorn Andersson , Florian Fainelli , Geert Uytterhoeven , Hartley Sweeten , Jens Axboe , Jian Cai , Joe Perches , Kees Cook , Keith Packard , Krzysztof Kozlowski , Linus Walleij , linux-arm-kernel@lists.infradead.org, Manivannan Sadhasivam , Marc Zyngier , Masahiro Yamada , Miguel Ojeda , Mike Rapoport , Nathan Chancellor , Nick Desaulniers , Nicolas Pitre , Rob Herring , Russell King , Thomas Gleixner , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Valentin Schneider , Viresh Kumar , "Wolfram Sang (Renesas)" , YiFei Zhu , Keith Packard Subject: [PATCH 2/3] ARM: Move thread_info into task_struct (v7 only) Date: Fri, 3 Sep 2021 23:09:07 -0700 Message-Id: <20210904060908.1310204-3-keithp@keithp.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210904060908.1310204-1-keithp@keithp.com> References: <20210902155429.3987201-1-keithp@keithp.com> <20210904060908.1310204-1-keithp@keithp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This avoids many stack overflow attacks which modified the thread_info structure by moving that into the task_struct as is done is almost all other architectures. The task_struct is now referenced by a per-cpu variable, 'current_task', allowing the current one on each cpu to be located from both C and assembly. This also involved removing the 'cpu' member from the thread_info struct and using the one added to the task_struct instead by the THREAD_INFO_IN_TASK code. This code is currently enabled only for v7 hardware as other ARM architectures do not make the c13 register in the p15 co-processor available for general OS use, leaving identifying the current cpu to the 'cpu' field in the thread_info located off the stack pointer. Signed-off-by: Keith Packard --- arch/arm/Kconfig | 1 + arch/arm/Makefile | 8 ++++ arch/arm/include/asm/assembler.h | 66 ++++++++++++++++++++++++++---- arch/arm/include/asm/current.h | 41 +++++++++++++++++++ arch/arm/include/asm/smp.h | 18 ++++++++ arch/arm/include/asm/thread_info.h | 17 ++++++++ arch/arm/kernel/asm-offsets.c | 4 ++ arch/arm/kernel/entry-armv.S | 17 ++++---- arch/arm/kernel/entry-common.S | 6 +-- arch/arm/kernel/entry-v7m.S | 7 +++- arch/arm/kernel/iwmmxt.S | 2 +- arch/arm/kernel/smp.c | 12 ++++++ arch/arm/lib/copy_from_user.S | 2 +- arch/arm/lib/copy_to_user.S | 2 +- arch/arm/mach-ep93xx/crunch-bits.S | 2 +- arch/arm/mm/proc-macros.S | 2 +- arch/arm/vfp/entry.S | 4 ++ arch/arm/vfp/vfpmodule.c | 25 +++++++---- 18 files changed, 204 insertions(+), 32 deletions(-) create mode 100644 arch/arm/include/asm/current.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 24804f11302d..1c1ded500a2b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -128,6 +128,7 @@ config ARM select RTC_LIB select SET_FS select SYS_SUPPORTS_APM_EMULATION + select THREAD_INFO_IN_TASK if CPU_V7 # Above selects are sorted alphabetically; please add new ones # according to that. Thanks. help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 415c3514573a..71a2ba4549d3 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -284,6 +284,14 @@ stack_protector_prepare: prepare0 $(eval GCC_PLUGINS_CFLAGS += $(SSP_PLUGIN_CFLAGS)) endif +ifdef CONFIG_SMP +prepare: task_cpu_prepare + +PHONY += task_cpu_prepare +task_cpu_prepare: prepare0 + $(eval KBUILD_CFLAGS += -D_TSK_CPU=$(shell awk '{if ($$2 == "TSK_CPU") print $$3;}' include/generated/asm-offsets.h)) +endif + all: $(notdir $(KBUILD_IMAGE)) diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index e2b1fd558bf3..2ce7403f9298 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -199,16 +199,68 @@ .endm .endr +#ifdef CONFIG_THREAD_INFO_IN_TASK /* - * Get current thread_info. + * Get per-CPU offset + * rd: Destination register */ - .macro get_thread_info, rd - ARM( mov \rd, sp, lsr #THREAD_SIZE_ORDER + PAGE_SHIFT ) - THUMB( mov \rd, sp ) - THUMB( lsr \rd, \rd, #THREAD_SIZE_ORDER + PAGE_SHIFT ) - mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT + .macro this_cpu_offset rd:req + mrc p15, 0, \rd, c13, c0, 4 .endm +/* + * Load a per-cpu variable + * @dst: Destination register to receive value + * @sym: The name of the per-cpu variable + * @tmp: scratch register + */ + .macro ldr_this_cpu dst : req, sym : req, tmp : req + movw \dst, #:lower16:\sym + movt \dst, #:upper16:\sym + this_cpu_offset \tmp + ldr \dst, [\dst, \tmp] + .endm + +/* + * Store a value in a per-cpu variable + * @src: Source register with value + * @sym: The name of the per-cpu variable + * @t1: scratch register 1 + * @t2: scratch register 2 + */ + .macro str_this_cpu src : req, sym : req, t1 : req, t2 : req + movw \t1, #:lower16:\sym + movt \t1, #:upper16:\sym + this_cpu_offset \t2 + str \src, [\t1, \t2] + .endm +#endif + +/* + * Get current thread_info + * @dst: Destination register to receive current thread info + * @tmp: scratch register + */ + .macro get_current, dst : req, tmp : req +#ifdef CONFIG_THREAD_INFO_IN_TASK + ldr_this_cpu \dst, current_task, \tmp +#else + ARM( mov \dst, sp, lsr #THREAD_SIZE_ORDER + PAGE_SHIFT ) + THUMB( mov \dst, sp ) + THUMB( lsr \dst, \dst, #THREAD_SIZE_ORDER + PAGE_SHIFT ) + mov \dst, \dst, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT +#endif + .endm + +#ifdef CONFIG_THREAD_INFO_IN_TASK +/* + * Set current task info + */ + .macro set_current_task rs : req, t1 : req, t2 : req + str_this_cpu \rs, current_task, \t1, \t2 + .endm +#endif + /* * Increment/decrement the preempt count. */ @@ -226,7 +278,7 @@ .endm .macro dec_preempt_count_ti, ti, tmp - get_thread_info \ti + get_current \ti, \tmp dec_preempt_count \ti, \tmp .endm #else diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h new file mode 100644 index 000000000000..7160315eb569 --- /dev/null +++ b/arch/arm/include/asm/current.h @@ -0,0 +1,41 @@ +/* + * Copyright © 2021 Keith Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef _ASM_ARM_CURRENT_H +#define _ASM_ARM_CURRENT_H + +#include +#include +#include + +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_THREAD_INFO_IN_TASK +struct task_struct; + +DECLARE_PER_CPU(struct task_struct *, current_task); + +static __always_inline struct task_struct *get_current(void) +{ + return raw_cpu_read(current_task); +} + +#define current get_current() +#else +#include +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_ARM_CURRENT_H */ diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 86a7fd721556..1c38d1fde641 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -15,7 +15,25 @@ # error " included in non-SMP build" #endif +#ifdef CONFIG_THREAD_INFO_IN_TASK +/* + * This is particularly ugly: it appears we can't actually get the definition + * of task_struct here, but we need access to the CPU this task is running on. + * Instead of using task_struct we're using TSK_CPU which is extracted from + * asm-offsets.h by kbuild to get the current processor ID. + * + * This also needs to be safeguarded when building asm-offsets.s because at + * that time TSK_CPU is not defined yet. + */ +#ifndef _TSK_CPU +#define raw_smp_processor_id() (0) +#else +#define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TSK_CPU)) +#endif + +#else #define raw_smp_processor_id() (current_thread_info()->cpu) +#endif struct seq_file; diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h index 70d4cbc49ae1..cbcd476a095b 100644 --- a/arch/arm/include/asm/thread_info.h +++ b/arch/arm/include/asm/thread_info.h @@ -55,8 +55,10 @@ struct thread_info { unsigned long flags; /* low level flags */ int preempt_count; /* 0 => preemptable, <0 => bug */ mm_segment_t addr_limit; /* address limit */ +#ifndef CONFIG_THREAD_INFO_IN_TASK struct task_struct *task; /* main task structure */ __u32 cpu; /* cpu */ +#endif __u32 cpu_domain; /* cpu domain */ #ifdef CONFIG_STACKPROTECTOR_PER_TASK unsigned long stack_canary; @@ -75,6 +77,17 @@ struct thread_info { #endif }; +#ifdef CONFIG_THREAD_INFO_IN_TASK + +#define INIT_THREAD_INFO(tsk) \ +{ \ + .flags = 0, \ + .preempt_count = INIT_PREEMPT_COUNT, \ + .addr_limit = KERNEL_DS, \ +} + +#else + #define INIT_THREAD_INFO(tsk) \ { \ .task = &tsk, \ @@ -83,6 +96,9 @@ struct thread_info { .addr_limit = KERNEL_DS, \ } +#endif + +#ifndef CONFIG_THREAD_INFO_IN_TASK /* * how to get the thread information struct from C */ @@ -93,6 +109,7 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *) (current_stack_pointer & ~(THREAD_SIZE - 1)); } +#endif #define thread_saved_pc(tsk) \ ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 70993af22d80..c91dcfe34bdd 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -44,8 +44,12 @@ int main(void) DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); +#ifdef CONFIG_THREAD_INFO_IN_TASK + DEFINE(TSK_CPU, offsetof(struct task_struct, cpu)); +#else DEFINE(TI_TASK, offsetof(struct thread_info, task)); DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); +#endif DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain)); DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context)); DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 0ea8529a4872..a5d71b0d8897 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -179,7 +179,7 @@ ENDPROC(__und_invalid) @ stmia r7, {r2 - r6} - get_thread_info tsk + get_current tsk, r0 uaccess_entry tsk, r0, r1, r2, \uaccess .if \trace @@ -260,7 +260,7 @@ __und_svc: bl __und_fault __und_svc_finish: - get_thread_info tsk + get_current tsk, r5 ldr r5, [sp, #S_PSR] @ Get SVC cpsr svc_exit r5 @ return from exception UNWIND(.fnend ) @@ -428,7 +428,7 @@ __irq_usr: usr_entry kuser_cmpxchg_check irq_handler - get_thread_info tsk + get_current tsk, why mov why, #0 b ret_to_user_from_irq UNWIND(.fnend ) @@ -572,12 +572,12 @@ ENDPROC(__und_usr) @ Fall-through from Thumb-2 __und_usr @ #ifdef CONFIG_NEON - get_thread_info r10 @ get current thread + get_current r10, r6 @ get current thread adr r6, .LCneon_thumb_opcodes b 2f #endif call_fpe: - get_thread_info r10 @ get current thread + get_current r10, r6 @ get current thread #ifdef CONFIG_NEON adr r6, .LCneon_arm_opcodes 2: ldr r5, [r6], #4 @ mask value @@ -722,7 +722,7 @@ __pabt_usr: ENTRY(ret_from_exception) UNWIND(.fnstart ) UNWIND(.cantunwind ) - get_thread_info tsk + get_current tsk, why mov why, #0 b ret_to_user UNWIND(.fnend ) @@ -735,7 +735,7 @@ __fiq_usr: kuser_cmpxchg_check mov r0, sp @ struct pt_regs *regs bl handle_fiq_as_nmi - get_thread_info tsk + get_current tsk, r0 restore_user_regs fast = 0, offset = 0 UNWIND(.fnend ) ENDPROC(__fiq_usr) @@ -771,6 +771,9 @@ ENTRY(__switch_to) #endif #ifdef CONFIG_CPU_USE_DOMAINS mcr p15, 0, r6, c3, c0, 0 @ Set domain register +#endif +#ifdef CONFIG_THREAD_INFO_IN_TASK + set_current_task r2, r4, r5 #endif mov r5, r0 add r4, r2, #TI_CPU_SAVE diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 7f0b7aba1498..52580ee463fe 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -156,7 +156,7 @@ ENTRY(ret_from_fork) movne r0, r4 badrne lr, 1f retne r5 -1: get_thread_info tsk +1: get_current tsk, r1 b ret_slow_syscall ENDPROC(ret_from_fork) @@ -243,7 +243,7 @@ ENTRY(vector_swi) bic scno, scno, #0xff000000 @ mask off SWI op-code eor scno, scno, #__NR_SYSCALL_BASE @ check OS number #endif - get_thread_info tsk + get_current tsk, r10 /* * Reload the registers that may have been corrupted on entry to * the syscall assembly (by tracing or context tracking.) @@ -278,7 +278,7 @@ local_restart: 9001: sub lr, saved_pc, #4 str lr, [sp, #S_PC] - get_thread_info tsk + get_current tsk, r1 b ret_fast_syscall #endif ENDPROC(vector_swi) diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S index d0e898608d30..f36a7a876085 100644 --- a/arch/arm/kernel/entry-v7m.S +++ b/arch/arm/kernel/entry-v7m.S @@ -57,7 +57,7 @@ __irq_entry: tst r0, V7M_SCB_ICSR_RETTOBASE beq 2f - get_thread_info tsk + get_current tsk, r2 ldr r2, [tsk, #TI_FLAGS] movs r2, r2, lsl #16 beq 2f @ no work pending @@ -83,7 +83,7 @@ __pendsv_entry: str r0, [r1, V7M_SCB_ICSR] @ clear PendSV @ execute the pending work, including reschedule - get_thread_info tsk + get_current tsk, why mov why, #0 b ret_to_user_from_irq ENDPROC(__pendsv_entry) @@ -107,6 +107,9 @@ ENTRY(__switch_to) bl atomic_notifier_call_chain mov ip, r4 mov r0, r5 +#ifdef CONFIG_THREAD_INFO_IN_TASK + set_current_task r2, r4, r5 +#endif ldmia ip!, {r4 - r11} @ Load all regs saved previously ldr sp, [ip] ldr pc, [ip, #4]! diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index d2b4ac06e4ed..781f7c7fca90 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -96,7 +96,7 @@ ENTRY(iwmmxt_task_enable) bl concan_save #ifdef CONFIG_PREEMPT_COUNT - get_thread_info r10 + get_current r10, r3 #endif 4: dec_preempt_count r10, r3 ret r9 @ normal exit from exception diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 55cb1689a4b3..be0ede16dbb1 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -51,6 +51,13 @@ #define CREATE_TRACE_POINTS #include +#ifdef CONFIG_THREAD_INFO_IN_TASK +DEFINE_PER_CPU(struct task_struct *, current_task) ____cacheline_aligned = + &init_task; +EXPORT_PER_CPU_SYMBOL(current_task); + +#endif + /* * as from 2.5, kernels no longer have an init_tasks structure * so we need some other way of telling a new secondary core @@ -156,6 +163,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) secondary_data.cpu = cpu; sync_cache_w(&secondary_data); +#ifdef CONFIG_THREAD_INFO_IN_TASK + per_cpu(current_task, cpu) = idle; +#endif + /* * Now bring the CPU into our world. */ @@ -509,6 +520,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) */ if (max_cpus > ncores) max_cpus = ncores; + if (ncores > 1 && max_cpus) { /* * Initialise the present map, which describes the set of CPUs diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S index f8016e3db65d..5320950100a2 100644 --- a/arch/arm/lib/copy_from_user.S +++ b/arch/arm/lib/copy_from_user.S @@ -109,7 +109,7 @@ ENTRY(arm_copy_from_user) #ifdef CONFIG_CPU_SPECTRE - get_thread_info r3 + get_current r3, ip ldr r3, [r3, #TI_ADDR_LIMIT] uaccess_mask_range_ptr r1, r2, r3, ip #endif diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S index ebfe4cb3d912..e7e61c87893a 100644 --- a/arch/arm/lib/copy_to_user.S +++ b/arch/arm/lib/copy_to_user.S @@ -109,7 +109,7 @@ ENTRY(__copy_to_user_std) WEAK(arm_copy_to_user) #ifdef CONFIG_CPU_SPECTRE - get_thread_info r3 + get_current r3, ip ldr r3, [r3, #TI_ADDR_LIMIT] uaccess_mask_range_ptr r0, r2, r3, ip #endif diff --git a/arch/arm/mach-ep93xx/crunch-bits.S b/arch/arm/mach-ep93xx/crunch-bits.S index fb2dbf76f09e..d0bb34b3d973 100644 --- a/arch/arm/mach-ep93xx/crunch-bits.S +++ b/arch/arm/mach-ep93xx/crunch-bits.S @@ -192,7 +192,7 @@ crunch_load: 1: #ifdef CONFIG_PREEMPT_COUNT - get_thread_info r10 + get_current r10, r3 #endif 2: dec_preempt_count r10, r3 ret lr diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index e2c743aa2eb2..a782c025fdf3 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -30,7 +30,7 @@ * act_mm - get current->active_mm */ .macro act_mm, rd - get_thread_info \rd + get_current \rd, unused @ won't build if THREAD_INFO_IN_TASK ldr \rd, [\rd, #TI_TASK] .if (TSK_ACTIVE_MM > IMM12_MASK) add \rd, \rd, #TSK_ACTIVE_MM & ~IMM12_MASK diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 27b0a1f27fbd..48cb40a3b72d 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S @@ -24,7 +24,11 @@ ENTRY(do_vfp) inc_preempt_count r10, r4 ldr r4, .LCvfp +#ifdef CONFIG_THREAD_INFO_IN_TASK + ldr r11, [r10, #TSK_CPU] @ CPU number +#else ldr r11, [r10, #TI_CPU] @ CPU number +#endif add r10, r10, #TI_VFPSTATE @ r10 = workspace ldr pc, [r4] @ call VFP entry point ENDPROC(do_vfp) diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 2cb355c1b5b7..f929a26a05a5 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -143,22 +143,27 @@ static void vfp_thread_copy(struct thread_info *thread) * THREAD_NOFTIFY_SWTICH: * - the previously running thread will not be scheduled onto another CPU. * - the next thread to be run (v) will not be running on another CPU. - * - thread->cpu is the local CPU number + * - tsk->cpu is the local CPU number * - not preemptible as we're called in the middle of a thread switch * THREAD_NOTIFY_FLUSH: * - the thread (v) will be running on the local CPU, so - * v === current_thread_info() - * - thread->cpu is the local CPU number at the time it is accessed, + * v === current + * - tsk->cpu is the local CPU number at the time it is accessed, * but may change at any time. * - we could be preempted if tree preempt rcu is enabled, so - * it is unsafe to use thread->cpu. + * it is unsafe to use tsk->cpu. * THREAD_NOTIFY_EXIT * - we could be preempted if tree preempt rcu is enabled, so - * it is unsafe to use thread->cpu. + * it is unsafe to use tsk->cpu. */ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) { +#ifdef CONFIG_THREAD_INFO_IN_TASK + struct task_struct *tsk = v; + struct thread_info *thread = &tsk->thread_info; +#else struct thread_info *thread = v; +#endif u32 fpexc; #ifdef CONFIG_SMP unsigned int cpu; @@ -169,7 +174,11 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) fpexc = fmrx(FPEXC); #ifdef CONFIG_SMP +#ifdef CONFIG_THREAD_INFO_IN_TASK + cpu = tsk->cpu; +#else cpu = thread->cpu; +#endif /* * On SMP, if VFP is enabled, save the old state in @@ -458,16 +467,16 @@ static int vfp_pm_suspend(void) /* disable, just in case */ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); - } else if (vfp_current_hw_state[ti->cpu]) { + } else if (vfp_current_hw_state[smp_processor_id()]) { #ifndef CONFIG_SMP fmxr(FPEXC, fpexc | FPEXC_EN); - vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); + vfp_save_state(vfp_current_hw_state[smp_processor_id()], fpexc); fmxr(FPEXC, fpexc); #endif } /* clear any information we had about last context state */ - vfp_current_hw_state[ti->cpu] = NULL; + vfp_current_hw_state[smp_processor_id()] = NULL; return 0; } -- 2.33.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 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linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexander Sverdlin , Andrew Morton , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Bjorn Andersson , Florian Fainelli , Geert Uytterhoeven , Hartley Sweeten , Jens Axboe , Jian Cai , Joe Perches , Kees Cook , Keith Packard , Krzysztof Kozlowski , Linus Walleij , linux-arm-kernel@lists.infradead.org, Manivannan Sadhasivam , Marc Zyngier , Masahiro Yamada , Miguel Ojeda , Mike Rapoport , Nathan Chancellor , Nick Desaulniers , Nicolas Pitre , Rob Herring , Russell King , Thomas Gleixner , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Valentin Schneider , Viresh Kumar , "Wolfram Sang (Renesas)" , YiFei Zhu , Keith Packard Subject: [PATCH 2/3] ARM: Move thread_info into task_struct (v7 only) Date: Fri, 3 Sep 2021 23:09:07 -0700 Message-Id: <20210904060908.1310204-3-keithp@keithp.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210904060908.1310204-1-keithp@keithp.com> References: <20210902155429.3987201-1-keithp@keithp.com> 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ZWQKZnJvbSBib3RoIEMgYW5kIGFzc2VtYmx5LgoKVGhpcyBhbHNvIGludm9sdmVkIHJlbW92aW5n IHRoZSAnY3B1JyBtZW1iZXIgZnJvbSB0aGUgdGhyZWFkX2luZm8Kc3RydWN0IGFuZCB1c2luZyB0 aGUgb25lIGFkZGVkIHRvIHRoZSB0YXNrX3N0cnVjdCBpbnN0ZWFkIGJ5IHRoZQpUSFJFQURfSU5G T19JTl9UQVNLIGNvZGUuCgpUaGlzIGNvZGUgaXMgY3VycmVudGx5IGVuYWJsZWQgb25seSBmb3Ig djcgaGFyZHdhcmUgYXMgb3RoZXIgQVJNCmFyY2hpdGVjdHVyZXMgZG8gbm90IG1ha2UgdGhlIGMx MyByZWdpc3RlciBpbiB0aGUgcDE1IGNvLXByb2Nlc3NvcgphdmFpbGFibGUgZm9yIGdlbmVyYWwg T1MgdXNlLCBsZWF2aW5nIGlkZW50aWZ5aW5nIHRoZSBjdXJyZW50IGNwdSB0bwp0aGUgJ2NwdScg ZmllbGQgaW4gdGhlIHRocmVhZF9pbmZvIGxvY2F0ZWQgb2ZmIHRoZSBzdGFjayBwb2ludGVyLgoK U2lnbmVkLW9mZi1ieTogS2VpdGggUGFja2FyZCA8a2VpdGhwYWNAYW1hem9uLmNvbT4KLS0tCiBh cmNoL2FybS9LY29uZmlnICAgICAgICAgICAgICAgICAgIHwgIDEgKwogYXJjaC9hcm0vTWFrZWZp bGUgICAgICAgICAgICAgICAgICB8ICA4ICsrKysKIGFyY2gvYXJtL2luY2x1ZGUvYXNtL2Fzc2Vt Ymxlci5oICAgfCA2NiArKysrKysrKysrKysrKysrKysrKysrKysrKy0tLS0KIGFyY2gvYXJtL2lu Y2x1ZGUvYXNtL2N1cnJlbnQuaCAgICAgfCA0MSArKysrKysrKysrKysrKysrKysrCiBhcmNoL2Fy bS9pbmNsdWRlL2FzbS9zbXAuaCAgICAgICAgIHwgMTggKysrKysrKysKIGFyY2gvYXJtL2luY2x1 ZGUvYXNtL3RocmVhZF9pbmZvLmggfCAxNyArKysrKysrKwogYXJjaC9hcm0va2VybmVsL2FzbS1v ZmZzZXRzLmMgICAgICB8ICA0ICsrCiBhcmNoL2FybS9rZXJuZWwvZW50cnktYXJtdi5TICAgICAg IHwgMTcgKysrKy0tLS0KIGFyY2gvYXJtL2tlcm5lbC9lbnRyeS1jb21tb24uUyAgICAgfCAgNiAr LS0KIGFyY2gvYXJtL2tlcm5lbC9lbnRyeS12N20uUyAgICAgICAgfCAgNyArKystCiBhcmNoL2Fy bS9rZXJuZWwvaXdtbXh0LlMgICAgICAgICAgIHwgIDIgKy0KIGFyY2gvYXJtL2tlcm5lbC9zbXAu YyAgICAgICAgICAgICAgfCAxMiArKysrKysKIGFyY2gvYXJtL2xpYi9jb3B5X2Zyb21fdXNlci5T ICAgICAgfCAgMiArLQogYXJjaC9hcm0vbGliL2NvcHlfdG9fdXNlci5TICAgICAgICB8ICAyICst CiBhcmNoL2FybS9tYWNoLWVwOTN4eC9jcnVuY2gtYml0cy5TIHwgIDIgKy0KIGFyY2gvYXJtL21t L3Byb2MtbWFjcm9zLlMgICAgICAgICAgfCAgMiArLQogYXJjaC9hcm0vdmZwL2VudHJ5LlMgICAg ICAgICAgICAgICB8ICA0ICsrCiBhcmNoL2FybS92ZnAvdmZwbW9kdWxlLmMgICAgICAgICAgIHwg MjUgKysrKysrKy0tLS0KIDE4IGZpbGVzIGNoYW5nZWQsIDIwNCBpbnNlcnRpb25zKCspLCAzMiBk ZWxldGlvbnMoLSkKIGNyZWF0ZSBtb2RlIDEwMDY0NCBhcmNoL2FybS9pbmNsdWRlL2FzbS9jdXJy ZW50LmgKCmRpZmYgLS1naXQgYS9hcmNoL2FybS9LY29uZmlnIGIvYXJjaC9hcm0vS2NvbmZpZwpp bmRleCAyNDgwNGYxMTMwMmQuLjFjMWRlZDUwMGEyYiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vS2Nv bmZpZworKysgYi9hcmNoL2FybS9LY29uZmlnCkBAIC0xMjgsNiArMTI4LDcgQEAgY29uZmlnIEFS TQogCXNlbGVjdCBSVENfTElCCiAJc2VsZWN0IFNFVF9GUwogCXNlbGVjdCBTWVNfU1VQUE9SVFNf QVBNX0VNVUxBVElPTgorCXNlbGVjdCBUSFJFQURfSU5GT19JTl9UQVNLIGlmIENQVV9WNwogCSMg QWJvdmUgc2VsZWN0cyBhcmUgc29ydGVkIGFscGhhYmV0aWNhbGx5OyBwbGVhc2UgYWRkIG5ldyBv bmVzCiAJIyBhY2NvcmRpbmcgdG8gdGhhdC4gIFRoYW5rcy4KIAloZWxwCmRpZmYgLS1naXQgYS9h cmNoL2FybS9NYWtlZmlsZSBiL2FyY2gvYXJtL01ha2VmaWxlCmluZGV4IDQxNWMzNTE0NTczYS4u NzFhMmJhNDU0OWQzIDEwMDY0NAotLS0gYS9hcmNoL2FybS9NYWtlZmlsZQorKysgYi9hcmNoL2Fy bS9NYWtlZmlsZQpAQCAtMjg0LDYgKzI4NCwxNCBAQCBzdGFja19wcm90ZWN0b3JfcHJlcGFyZTog cHJlcGFyZTAKIAkkKGV2YWwgR0NDX1BMVUdJTlNfQ0ZMQUdTICs9ICQoU1NQX1BMVUdJTl9DRkxB R1MpKQogZW5kaWYKIAoraWZkZWYgQ09ORklHX1NNUAorcHJlcGFyZTogdGFza19jcHVfcHJlcGFy ZQorCitQSE9OWSArPSB0YXNrX2NwdV9wcmVwYXJlCit0YXNrX2NwdV9wcmVwYXJlOiBwcmVwYXJl MAorCSQoZXZhbCBLQlVJTERfQ0ZMQUdTICs9IC1EX1RTS19DUFU9JChzaGVsbCBhd2sgJ3tpZiAo JCQyID09ICJUU0tfQ1BVIikgcHJpbnQgJCQzO30nIGluY2x1ZGUvZ2VuZXJhdGVkL2FzbS1vZmZz ZXRzLmgpKQorZW5kaWYKKwogYWxsOgkkKG5vdGRpciAkKEtCVUlMRF9JTUFHRSkpCiAKIApkaWZm IC0tZ2l0IGEvYXJjaC9hcm0vaW5jbHVkZS9hc20vYXNzZW1ibGVyLmggYi9hcmNoL2FybS9pbmNs dWRlL2FzbS9hc3NlbWJsZXIuaAppbmRleCBlMmIxZmQ1NThiZjMuLjJjZTc0MDNmOTI5OCAxMDA2 NDQKLS0tIGEvYXJjaC9hcm0vaW5jbHVkZS9hc20vYXNzZW1ibGVyLmgKKysrIGIvYXJjaC9hcm0v aW5jbHVkZS9hc20vYXNzZW1ibGVyLmgKQEAgLTE5OSwxNiArMTk5LDY4IEBACiAJLmVuZG0KIAku ZW5kcgogCisjaWZkZWYgQ09ORklHX1RIUkVBRF9JTkZPX0lOX1RBU0sKIC8qCi0gKiBHZXQgY3Vy cmVudCB0aHJlYWRfaW5mby4KKyAqIEdldCBwZXItQ1BVIG9mZnNldAorICogcmQ6IERlc3RpbmF0 aW9uIHJlZ2lzdGVyCiAgKi8KLQkubWFjcm8JZ2V0X3RocmVhZF9pbmZvLCByZAotIEFSTSgJbW92 CVxyZCwgc3AsIGxzciAjVEhSRUFEX1NJWkVfT1JERVIgKyBQQUdFX1NISUZUCSkKLSBUSFVNQigJ bW92CVxyZCwgc3AJCQkpCi0gVEhVTUIoCWxzcglccmQsIFxyZCwgI1RIUkVBRF9TSVpFX09SREVS ICsgUEFHRV9TSElGVAkpCi0JbW92CVxyZCwgXHJkLCBsc2wgI1RIUkVBRF9TSVpFX09SREVSICsg UEFHRV9TSElGVAorCS5tYWNybyB0aGlzX2NwdV9vZmZzZXQgcmQ6cmVxCisJbXJjIHAxNSwgMCwg XHJkLCBjMTMsIGMwLCA0CiAJLmVuZG0KIAorLyoKKyAqIExvYWQgYSBwZXItY3B1IHZhcmlhYmxl CisgKiBAZHN0OiBEZXN0aW5hdGlvbiByZWdpc3RlciB0byByZWNlaXZlIHZhbHVlCisgKiBAc3lt OiBUaGUgbmFtZSBvZiB0aGUgcGVyLWNwdSB2YXJpYWJsZQorICogQHRtcDogc2NyYXRjaCByZWdp c3RlcgorICovCisJLm1hY3JvIGxkcl90aGlzX2NwdSBkc3QgOiByZXEsIHN5bSA6IHJlcSwgdG1w IDogcmVxCisJbW92dwlcZHN0LCAjOmxvd2VyMTY6XHN5bQorCW1vdnQJXGRzdCwgIzp1cHBlcjE2 OlxzeW0KKwl0aGlzX2NwdV9vZmZzZXQgXHRtcAorCWxkcglcZHN0LCBbXGRzdCwgXHRtcF0KKwku ZW5kbQorCisvKgorICogU3RvcmUgYSB2YWx1ZSBpbiBhIHBlci1jcHUgdmFyaWFibGUKKyAqIEBz cmM6IFNvdXJjZSByZWdpc3RlciB3aXRoIHZhbHVlCisgKiBAc3ltOiBUaGUgbmFtZSBvZiB0aGUg cGVyLWNwdSB2YXJpYWJsZQorICogQHQxOiBzY3JhdGNoIHJlZ2lzdGVyIDEKKyAqIEB0Mjogc2Ny YXRjaCByZWdpc3RlciAyCisgKi8KKwkubWFjcm8gc3RyX3RoaXNfY3B1IHNyYyA6IHJlcSwgc3lt IDogcmVxLCB0MSA6IHJlcSwgdDIgOiByZXEKKwltb3Z3CVx0MSwgIzpsb3dlcjE2OlxzeW0KKwlt b3Z0CVx0MSwgIzp1cHBlcjE2OlxzeW0KKwl0aGlzX2NwdV9vZmZzZXQgXHQyCisJc3RyCVxzcmMs IFtcdDEsIFx0Ml0KKwkuZW5kbQorI2VuZGlmCisKKy8qCisgKiBHZXQgY3VycmVudCB0aHJlYWRf aW5mbworICogQGRzdDogRGVzdGluYXRpb24gcmVnaXN0ZXIgdG8gcmVjZWl2ZSBjdXJyZW50IHRo cmVhZCBpbmZvCisgKiBAdG1wOiBzY3JhdGNoIHJlZ2lzdGVyCisgKi8KKwkubWFjcm8gZ2V0X2N1 cnJlbnQsIGRzdCA6IHJlcSwgdG1wIDogcmVxCisjaWZkZWYgQ09ORklHX1RIUkVBRF9JTkZPX0lO X1RBU0sKKwlsZHJfdGhpc19jcHUgXGRzdCwgY3VycmVudF90YXNrLCBcdG1wCisjZWxzZQorIEFS TSgJbW92CVxkc3QsIHNwLCBsc3IgI1RIUkVBRF9TSVpFX09SREVSICsgUEFHRV9TSElGVAkpCisg VEhVTUIoCW1vdglcZHN0LCBzcAkJCSkKKyBUSFVNQigJbHNyCVxkc3QsIFxkc3QsICNUSFJFQURf U0laRV9PUkRFUiArIFBBR0VfU0hJRlQJKQorCW1vdglcZHN0LCBcZHN0LCBsc2wgI1RIUkVBRF9T SVpFX09SREVSICsgUEFHRV9TSElGVAkKKyNlbmRpZgorCS5lbmRtCisKKyNpZmRlZiBDT05GSUdf VEhSRUFEX0lORk9fSU5fVEFTSworLyoKKyAqIFNldCBjdXJyZW50IHRhc2sgaW5mbworICovCisJ Lm1hY3JvCXNldF9jdXJyZW50X3Rhc2sgcnMgOiByZXEsIHQxIDogcmVxLCB0MiA6IHJlcQorCXN0 cl90aGlzX2NwdSBccnMsIGN1cnJlbnRfdGFzaywgXHQxLCBcdDIKKwkuZW5kbQorI2VuZGlmCisK IC8qCiAgKiBJbmNyZW1lbnQvZGVjcmVtZW50IHRoZSBwcmVlbXB0IGNvdW50LgogICovCkBAIC0y MjYsNyArMjc4LDcgQEAKIAkuZW5kbQogCiAJLm1hY3JvCWRlY19wcmVlbXB0X2NvdW50X3RpLCB0 aSwgdG1wCi0JZ2V0X3RocmVhZF9pbmZvIFx0aQorCWdldF9jdXJyZW50IFx0aSwgXHRtcAogCWRl Y19wcmVlbXB0X2NvdW50IFx0aSwgXHRtcAogCS5lbmRtCiAjZWxzZQpkaWZmIC0tZ2l0IGEvYXJj aC9hcm0vaW5jbHVkZS9hc20vY3VycmVudC5oIGIvYXJjaC9hcm0vaW5jbHVkZS9hc20vY3VycmVu dC5oCm5ldyBmaWxlIG1vZGUgMTAwNjQ0CmluZGV4IDAwMDAwMDAwMDAwMC4uNzE2MDMxNWViNTY5 Ci0tLSAvZGV2L251bGwKKysrIGIvYXJjaC9hcm0vaW5jbHVkZS9hc20vY3VycmVudC5oCkBAIC0w LDAgKzEsNDEgQEAKKy8qCisgKiBDb3B5cmlnaHQgwqkgMjAyMSBLZWl0aCBQYWNrYXJkIDxrZWl0 aHBAa2VpdGhwLmNvbT4KKyAqCisgKiBUaGlzIHByb2dyYW0gaXMgZnJlZSBzb2Z0d2FyZTsgeW91 IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yIG1vZGlmeQorICogaXQgdW5kZXIgdGhlIHRlcm1z IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSBhcyBwdWJsaXNoZWQgYnkKKyAqIHRo ZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb24sIGVpdGhlciB2ZXJzaW9uIDIgb2YgdGhlIExpY2Vu c2UsIG9yCisgKiAoYXQgeW91ciBvcHRpb24pIGFueSBsYXRlciB2ZXJzaW9uLgorICoKKyAqIFRo aXMgcHJvZ3JhbSBpcyBkaXN0cmlidXRlZCBpbiB0aGUgaG9wZSB0aGF0IGl0IHdpbGwgYmUgdXNl ZnVsLCBidXQKKyAqIFdJVEhPVVQgQU5ZIFdBUlJBTlRZOyB3aXRob3V0IGV2ZW4gdGhlIGltcGxp ZWQgd2FycmFudHkgb2YKKyAqIE1FUkNIQU5UQUJJTElUWSBvciBGSVRORVNTIEZPUiBBIFBBUlRJ Q1VMQVIgUFVSUE9TRS4gIFNlZSB0aGUgR05VCisgKiBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIGZv ciBtb3JlIGRldGFpbHMuCisgKi8KKworI2lmbmRlZiBfQVNNX0FSTV9DVVJSRU5UX0gKKyNkZWZp bmUgX0FTTV9BUk1fQ1VSUkVOVF9ICisKKyNpbmNsdWRlIDxsaW51eC9jb21waWxlci5oPgorI2lu Y2x1ZGUgPGxpbnV4L3RocmVhZF9pbmZvLmg+CisjaW5jbHVkZSA8YXNtL3BlcmNwdS5oPgorCisj aWZuZGVmIF9fQVNTRU1CTFlfXworCisjaWZkZWYgQ09ORklHX1RIUkVBRF9JTkZPX0lOX1RBU0sK K3N0cnVjdCB0YXNrX3N0cnVjdDsKKworREVDTEFSRV9QRVJfQ1BVKHN0cnVjdCB0YXNrX3N0cnVj dCAqLCBjdXJyZW50X3Rhc2spOworCitzdGF0aWMgX19hbHdheXNfaW5saW5lIHN0cnVjdCB0YXNr X3N0cnVjdCAqZ2V0X2N1cnJlbnQodm9pZCkKK3sKKwlyZXR1cm4gcmF3X2NwdV9yZWFkKGN1cnJl bnRfdGFzayk7Cit9CisKKyNkZWZpbmUgY3VycmVudCBnZXRfY3VycmVudCgpCisjZWxzZQorI2lu Y2x1ZGUgPGFzbS1nZW5lcmljL2N1cnJlbnQuaD4KKyNlbmRpZgorCisjZW5kaWYgLyogX19BU1NF TUJMWV9fICovCisKKyNlbmRpZiAvKiBfQVNNX0FSTV9DVVJSRU5UX0ggKi8KZGlmZiAtLWdpdCBh L2FyY2gvYXJtL2luY2x1ZGUvYXNtL3NtcC5oIGIvYXJjaC9hcm0vaW5jbHVkZS9hc20vc21wLmgK aW5kZXggODZhN2ZkNzIxNTU2Li4xYzM4ZDFmZGU2NDEgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL2lu Y2x1ZGUvYXNtL3NtcC5oCisrKyBiL2FyY2gvYXJtL2luY2x1ZGUvYXNtL3NtcC5oCkBAIC0xNSw3 ICsxNSwyNSBAQAogIyBlcnJvciAiPGFzbS9zbXAuaD4gaW5jbHVkZWQgaW4gbm9uLVNNUCBidWls ZCIKICNlbmRpZgogCisjaWZkZWYgQ09ORklHX1RIUkVBRF9JTkZPX0lOX1RBU0sKKy8qCisgKiBU aGlzIGlzIHBhcnRpY3VsYXJseSB1Z2x5OiBpdCBhcHBlYXJzIHdlIGNhbid0IGFjdHVhbGx5IGdl dCB0aGUgZGVmaW5pdGlvbgorICogb2YgdGFza19zdHJ1Y3QgaGVyZSwgYnV0IHdlIG5lZWQgYWNj ZXNzIHRvIHRoZSBDUFUgdGhpcyB0YXNrIGlzIHJ1bm5pbmcgb24uCisgKiBJbnN0ZWFkIG9mIHVz aW5nIHRhc2tfc3RydWN0IHdlJ3JlIHVzaW5nIFRTS19DUFUgd2hpY2ggaXMgZXh0cmFjdGVkIGZy b20KKyAqIGFzbS1vZmZzZXRzLmggYnkga2J1aWxkIHRvIGdldCB0aGUgY3VycmVudCBwcm9jZXNz b3IgSUQuCisgKgorICogVGhpcyBhbHNvIG5lZWRzIHRvIGJlIHNhZmVndWFyZGVkIHdoZW4gYnVp bGRpbmcgYXNtLW9mZnNldHMucyBiZWNhdXNlIGF0CisgKiB0aGF0IHRpbWUgVFNLX0NQVSBpcyBu b3QgZGVmaW5lZCB5ZXQuCisgKi8KKyNpZm5kZWYgX1RTS19DUFUKKyNkZWZpbmUgcmF3X3NtcF9w cm9jZXNzb3JfaWQoKQkJKDApCisjZWxzZQorI2RlZmluZSByYXdfc21wX3Byb2Nlc3Nvcl9pZCgp CQkoKih1bnNpZ25lZCBpbnQgKikoKHZvaWQgKiljdXJyZW50ICsgX1RTS19DUFUpKQorI2VuZGlm CisKKyNlbHNlCiAjZGVmaW5lIHJhd19zbXBfcHJvY2Vzc29yX2lkKCkgKGN1cnJlbnRfdGhyZWFk X2luZm8oKS0+Y3B1KQorI2VuZGlmCiAKIHN0cnVjdCBzZXFfZmlsZTsKIApkaWZmIC0tZ2l0IGEv YXJjaC9hcm0vaW5jbHVkZS9hc20vdGhyZWFkX2luZm8uaCBiL2FyY2gvYXJtL2luY2x1ZGUvYXNt L3RocmVhZF9pbmZvLmgKaW5kZXggNzBkNGNiYzQ5YWUxLi5jYmNkNDc2YTA5NWIgMTAwNjQ0Ci0t LSBhL2FyY2gvYXJtL2luY2x1ZGUvYXNtL3RocmVhZF9pbmZvLmgKKysrIGIvYXJjaC9hcm0vaW5j bHVkZS9hc20vdGhyZWFkX2luZm8uaApAQCAtNTUsOCArNTUsMTAgQEAgc3RydWN0IHRocmVhZF9p bmZvIHsKIAl1bnNpZ25lZCBsb25nCQlmbGFnczsJCS8qIGxvdyBsZXZlbCBmbGFncyAqLwogCWlu dAkJCXByZWVtcHRfY291bnQ7CS8qIDAgPT4gcHJlZW1wdGFibGUsIDwwID0+IGJ1ZyAqLwogCW1t X3NlZ21lbnRfdAkJYWRkcl9saW1pdDsJLyogYWRkcmVzcyBsaW1pdCAqLworI2lmbmRlZiBDT05G SUdfVEhSRUFEX0lORk9fSU5fVEFTSwogCXN0cnVjdCB0YXNrX3N0cnVjdAkqdGFzazsJCS8qIG1h aW4gdGFzayBzdHJ1Y3R1cmUgKi8KIAlfX3UzMgkJCWNwdTsJCS8qIGNwdSAqLworI2VuZGlmCiAJ X191MzIJCQljcHVfZG9tYWluOwkvKiBjcHUgZG9tYWluICovCiAjaWZkZWYgQ09ORklHX1NUQUNL UFJPVEVDVE9SX1BFUl9UQVNLCiAJdW5zaWduZWQgbG9uZwkJc3RhY2tfY2FuYXJ5OwpAQCAtNzUs NiArNzcsMTcgQEAgc3RydWN0IHRocmVhZF9pbmZvIHsKICNlbmRpZgogfTsKIAorI2lmZGVmIENP TkZJR19USFJFQURfSU5GT19JTl9UQVNLCisKKyNkZWZpbmUgSU5JVF9USFJFQURfSU5GTyh0c2sp CQkJCQkJXAorewkJCQkJCQkJCVwKKwkuZmxhZ3MJCT0gMCwJCQkJCQlcCisJLnByZWVtcHRfY291 bnQJPSBJTklUX1BSRUVNUFRfQ09VTlQsCQkJCVwKKwkuYWRkcl9saW1pdAk9IEtFUk5FTF9EUywJ CQkJCVwKK30KKworI2Vsc2UKKwogI2RlZmluZSBJTklUX1RIUkVBRF9JTkZPKHRzaykJCQkJCQlc CiB7CQkJCQkJCQkJXAogCS50YXNrCQk9ICZ0c2ssCQkJCQkJXApAQCAtODMsNiArOTYsOSBAQCBz dHJ1Y3QgdGhyZWFkX2luZm8gewogCS5hZGRyX2xpbWl0CT0gS0VSTkVMX0RTLAkJCQkJXAogfQog CisjZW5kaWYKKworI2lmbmRlZiBDT05GSUdfVEhSRUFEX0lORk9fSU5fVEFTSwogLyoKICAqIGhv dyB0byBnZXQgdGhlIHRocmVhZCBpbmZvcm1hdGlvbiBzdHJ1Y3QgZnJvbSBDCiAgKi8KQEAgLTkz LDYgKzEwOSw3IEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IHRocmVhZF9pbmZvICpjdXJyZW50X3Ro cmVhZF9pbmZvKHZvaWQpCiAJcmV0dXJuIChzdHJ1Y3QgdGhyZWFkX2luZm8gKikKIAkJKGN1cnJl bnRfc3RhY2tfcG9pbnRlciAmIH4oVEhSRUFEX1NJWkUgLSAxKSk7CiB9CisjZW5kaWYKIAogI2Rl ZmluZSB0aHJlYWRfc2F2ZWRfcGModHNrKQlcCiAJKCh1bnNpZ25lZCBsb25nKSh0YXNrX3RocmVh ZF9pbmZvKHRzayktPmNwdV9jb250ZXh0LnBjKSkKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL2tlcm5l bC9hc20tb2Zmc2V0cy5jIGIvYXJjaC9hcm0va2VybmVsL2FzbS1vZmZzZXRzLmMKaW5kZXggNzA5 OTNhZjIyZDgwLi5jOTFkY2ZlMzRiZGQgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL2tlcm5lbC9hc20t b2Zmc2V0cy5jCisrKyBiL2FyY2gvYXJtL2tlcm5lbC9hc20tb2Zmc2V0cy5jCkBAIC00NCw4ICs0 NCwxMiBAQCBpbnQgbWFpbih2b2lkKQogICBERUZJTkUoVElfRkxBR1MsCQlvZmZzZXRvZihzdHJ1 Y3QgdGhyZWFkX2luZm8sIGZsYWdzKSk7CiAgIERFRklORShUSV9QUkVFTVBULAkJb2Zmc2V0b2Yo c3RydWN0IHRocmVhZF9pbmZvLCBwcmVlbXB0X2NvdW50KSk7CiAgIERFRklORShUSV9BRERSX0xJ TUlULAkJb2Zmc2V0b2Yoc3RydWN0IHRocmVhZF9pbmZvLCBhZGRyX2xpbWl0KSk7CisjaWZkZWYg Q09ORklHX1RIUkVBRF9JTkZPX0lOX1RBU0sKKyAgREVGSU5FKFRTS19DUFUsCQlvZmZzZXRvZihz dHJ1Y3QgdGFza19zdHJ1Y3QsIGNwdSkpOworI2Vsc2UKICAgREVGSU5FKFRJX1RBU0ssCQlvZmZz ZXRvZihzdHJ1Y3QgdGhyZWFkX2luZm8sIHRhc2spKTsKICAgREVGSU5FKFRJX0NQVSwJCW9mZnNl dG9mKHN0cnVjdCB0aHJlYWRfaW5mbywgY3B1KSk7CisjZW5kaWYKICAgREVGSU5FKFRJX0NQVV9E T01BSU4sCQlvZmZzZXRvZihzdHJ1Y3QgdGhyZWFkX2luZm8sIGNwdV9kb21haW4pKTsKICAgREVG SU5FKFRJX0NQVV9TQVZFLAkJb2Zmc2V0b2Yoc3RydWN0IHRocmVhZF9pbmZvLCBjcHVfY29udGV4 dCkpOwogICBERUZJTkUoVElfVVNFRF9DUCwJCW9mZnNldG9mKHN0cnVjdCB0aHJlYWRfaW5mbywg dXNlZF9jcCkpOwpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0va2VybmVsL2VudHJ5LWFybXYuUyBiL2Fy Y2gvYXJtL2tlcm5lbC9lbnRyeS1hcm12LlMKaW5kZXggMGVhODUyOWE0ODcyLi5hNWQ3MWIwZDg4 OTcgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL2tlcm5lbC9lbnRyeS1hcm12LlMKKysrIGIvYXJjaC9h cm0va2VybmVsL2VudHJ5LWFybXYuUwpAQCAtMTc5LDcgKzE3OSw3IEBAIEVORFBST0MoX191bmRf aW52YWxpZCkKIAlACiAJc3RtaWEJcjcsIHtyMiAtIHI2fQogCi0JZ2V0X3RocmVhZF9pbmZvIHRz aworCWdldF9jdXJyZW50IHRzaywgcjAKIAl1YWNjZXNzX2VudHJ5IHRzaywgcjAsIHIxLCByMiwg XHVhY2Nlc3MKIAogCS5pZiBcdHJhY2UKQEAgLTI2MCw3ICsyNjAsNyBAQCBfX3VuZF9zdmM6CiAJ YmwJX191bmRfZmF1bHQKIAogX191bmRfc3ZjX2ZpbmlzaDoKLQlnZXRfdGhyZWFkX2luZm8gdHNr CisJZ2V0X2N1cnJlbnQgdHNrLCByNQogCWxkcglyNSwgW3NwLCAjU19QU1JdCQlAIEdldCBTVkMg Y3BzcgogCXN2Y19leGl0IHI1CQkJCUAgcmV0dXJuIGZyb20gZXhjZXB0aW9uCiAgVU5XSU5EKC5m bmVuZAkJKQpAQCAtNDI4LDcgKzQyOCw3IEBAIF9faXJxX3VzcjoKIAl1c3JfZW50cnkKIAlrdXNl cl9jbXB4Y2hnX2NoZWNrCiAJaXJxX2hhbmRsZXIKLQlnZXRfdGhyZWFkX2luZm8gdHNrCisJZ2V0 X2N1cnJlbnQgdHNrLCB3aHkKIAltb3YJd2h5LCAjMAogCWIJcmV0X3RvX3VzZXJfZnJvbV9pcnEK ICBVTldJTkQoLmZuZW5kCQkpCkBAIC01NzIsMTIgKzU3MiwxMiBAQCBFTkRQUk9DKF9fdW5kX3Vz cikKIAlAIEZhbGwtdGhyb3VnaCBmcm9tIFRodW1iLTIgX191bmRfdXNyCiAJQAogI2lmZGVmIENP TkZJR19ORU9OCi0JZ2V0X3RocmVhZF9pbmZvIHIxMAkJCUAgZ2V0IGN1cnJlbnQgdGhyZWFkCisJ Z2V0X2N1cnJlbnQgcjEwLCByNgkJCUAgZ2V0IGN1cnJlbnQgdGhyZWFkCiAJYWRyCXI2LCAuTENu ZW9uX3RodW1iX29wY29kZXMKIAliCTJmCiAjZW5kaWYKIGNhbGxfZnBlOgotCWdldF90aHJlYWRf aW5mbyByMTAJCQlAIGdldCBjdXJyZW50IHRocmVhZAorCWdldF9jdXJyZW50IHIxMCwgcjYJCQlA IGdldCBjdXJyZW50IHRocmVhZAogI2lmZGVmIENPTkZJR19ORU9OCiAJYWRyCXI2LCAuTENuZW9u X2FybV9vcGNvZGVzCiAyOglsZHIJcjUsIFtyNl0sICM0CQkJQCBtYXNrIHZhbHVlCkBAIC03MjIs NyArNzIyLDcgQEAgX19wYWJ0X3VzcjoKIEVOVFJZKHJldF9mcm9tX2V4Y2VwdGlvbikKICBVTldJ TkQoLmZuc3RhcnQJKQogIFVOV0lORCguY2FudHVud2luZAkpCi0JZ2V0X3RocmVhZF9pbmZvIHRz aworCWdldF9jdXJyZW50IHRzaywgd2h5CiAJbW92CXdoeSwgIzAKIAliCXJldF90b191c2VyCiAg VU5XSU5EKC5mbmVuZAkJKQpAQCAtNzM1LDcgKzczNSw3IEBAIF9fZmlxX3VzcjoKIAlrdXNlcl9j bXB4Y2hnX2NoZWNrCiAJbW92CXIwLCBzcAkJCQlAIHN0cnVjdCBwdF9yZWdzICpyZWdzCiAJYmwJ aGFuZGxlX2ZpcV9hc19ubWkKLQlnZXRfdGhyZWFkX2luZm8gdHNrCisJZ2V0X2N1cnJlbnQgdHNr LCByMAogCXJlc3RvcmVfdXNlcl9yZWdzIGZhc3QgPSAwLCBvZmZzZXQgPSAwCiAgVU5XSU5EKC5m bmVuZAkJKQogRU5EUFJPQyhfX2ZpcV91c3IpCkBAIC03NzEsNiArNzcxLDkgQEAgRU5UUlkoX19z d2l0Y2hfdG8pCiAjZW5kaWYKICNpZmRlZiBDT05GSUdfQ1BVX1VTRV9ET01BSU5TCiAJbWNyCXAx NSwgMCwgcjYsIGMzLCBjMCwgMAkJQCBTZXQgZG9tYWluIHJlZ2lzdGVyCisjZW5kaWYKKyNpZmRl ZiBDT05GSUdfVEhSRUFEX0lORk9fSU5fVEFTSworCXNldF9jdXJyZW50X3Rhc2sgcjIsIHI0LCBy NQogI2VuZGlmCiAJbW92CXI1LCByMAogCWFkZAlyNCwgcjIsICNUSV9DUFVfU0FWRQpkaWZmIC0t Z2l0IGEvYXJjaC9hcm0va2VybmVsL2VudHJ5LWNvbW1vbi5TIGIvYXJjaC9hcm0va2VybmVsL2Vu dHJ5LWNvbW1vbi5TCmluZGV4IDdmMGI3YWJhMTQ5OC4uNTI1ODBlZTQ2M2ZlIDEwMDY0NAotLS0g YS9hcmNoL2FybS9rZXJuZWwvZW50cnktY29tbW9uLlMKKysrIGIvYXJjaC9hcm0va2VybmVsL2Vu dHJ5LWNvbW1vbi5TCkBAIC0xNTYsNyArMTU2LDcgQEAgRU5UUlkocmV0X2Zyb21fZm9yaykKIAlt b3ZuZQlyMCwgcjQKIAliYWRybmUJbHIsIDFmCiAJcmV0bmUJcjUKLTE6CWdldF90aHJlYWRfaW5m byB0c2sKKzE6CWdldF9jdXJyZW50IHRzaywgcjEKIAliCXJldF9zbG93X3N5c2NhbGwKIEVORFBS T0MocmV0X2Zyb21fZm9yaykKIApAQCAtMjQzLDcgKzI0Myw3IEBAIEVOVFJZKHZlY3Rvcl9zd2kp CiAJYmljCXNjbm8sIHNjbm8sICMweGZmMDAwMDAwCQlAIG1hc2sgb2ZmIFNXSSBvcC1jb2RlCiAJ ZW9yCXNjbm8sIHNjbm8sICNfX05SX1NZU0NBTExfQkFTRQlAIGNoZWNrIE9TIG51bWJlcgogI2Vu ZGlmCi0JZ2V0X3RocmVhZF9pbmZvIHRzaworCWdldF9jdXJyZW50IHRzaywgcjEwCiAJLyoKIAkg KiBSZWxvYWQgdGhlIHJlZ2lzdGVycyB0aGF0IG1heSBoYXZlIGJlZW4gY29ycnVwdGVkIG9uIGVu dHJ5IHRvCiAJICogdGhlIHN5c2NhbGwgYXNzZW1ibHkgKGJ5IHRyYWNpbmcgb3IgY29udGV4dCB0 cmFja2luZy4pCkBAIC0yNzgsNyArMjc4LDcgQEAgbG9jYWxfcmVzdGFydDoKIDkwMDE6CiAJc3Vi CWxyLCBzYXZlZF9wYywgIzQKIAlzdHIJbHIsIFtzcCwgI1NfUENdCi0JZ2V0X3RocmVhZF9pbmZv IHRzaworCWdldF9jdXJyZW50IHRzaywgcjEKIAliCXJldF9mYXN0X3N5c2NhbGwKICNlbmRpZgog RU5EUFJPQyh2ZWN0b3Jfc3dpKQpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0va2VybmVsL2VudHJ5LXY3 bS5TIGIvYXJjaC9hcm0va2VybmVsL2VudHJ5LXY3bS5TCmluZGV4IGQwZTg5ODYwOGQzMC4uZjM2 YTdhODc2MDg1IDEwMDY0NAotLS0gYS9hcmNoL2FybS9rZXJuZWwvZW50cnktdjdtLlMKKysrIGIv YXJjaC9hcm0va2VybmVsL2VudHJ5LXY3bS5TCkBAIC01Nyw3ICs1Nyw3IEBAIF9faXJxX2VudHJ5 OgogCXRzdAlyMCwgVjdNX1NDQl9JQ1NSX1JFVFRPQkFTRQogCWJlcQkyZgogCi0JZ2V0X3RocmVh ZF9pbmZvIHRzaworCWdldF9jdXJyZW50IHRzaywgcjIKIAlsZHIJcjIsIFt0c2ssICNUSV9GTEFH U10KIAltb3ZzCXIyLCByMiwgbHNsICMxNgogCWJlcQkyZgkJCUAgbm8gd29yayBwZW5kaW5nCkBA IC04Myw3ICs4Myw3IEBAIF9fcGVuZHN2X2VudHJ5OgogCXN0cglyMCwgW3IxLCBWN01fU0NCX0lD U1JdCUAgY2xlYXIgUGVuZFNWCiAKIAlAIGV4ZWN1dGUgdGhlIHBlbmRpbmcgd29yaywgaW5jbHVk aW5nIHJlc2NoZWR1bGUKLQlnZXRfdGhyZWFkX2luZm8gdHNrCisJZ2V0X2N1cnJlbnQgdHNrLCB3 aHkKIAltb3YJd2h5LCAjMAogCWIJcmV0X3RvX3VzZXJfZnJvbV9pcnEKIEVORFBST0MoX19wZW5k c3ZfZW50cnkpCkBAIC0xMDcsNiArMTA3LDkgQEAgRU5UUlkoX19zd2l0Y2hfdG8pCiAJYmwJYXRv bWljX25vdGlmaWVyX2NhbGxfY2hhaW4KIAltb3YJaXAsIHI0CiAJbW92CXIwLCByNQorI2lmZGVm IENPTkZJR19USFJFQURfSU5GT19JTl9UQVNLCisJc2V0X2N1cnJlbnRfdGFzayByMiwgcjQsIHI1 CisjZW5kaWYKIAlsZG1pYQlpcCEsIHtyNCAtIHIxMX0JCUAgTG9hZCBhbGwgcmVncyBzYXZlZCBw cmV2aW91c2x5CiAJbGRyCXNwLCBbaXBdCiAJbGRyCXBjLCBbaXAsICM0XSEKZGlmZiAtLWdpdCBh L2FyY2gvYXJtL2tlcm5lbC9pd21teHQuUyBiL2FyY2gvYXJtL2tlcm5lbC9pd21teHQuUwppbmRl eCBkMmI0YWMwNmU0ZWQuLjc4MWY3YzdmY2E5MCAxMDA2NDQKLS0tIGEvYXJjaC9hcm0va2VybmVs L2l3bW14dC5TCisrKyBiL2FyY2gvYXJtL2tlcm5lbC9pd21teHQuUwpAQCAtOTYsNyArOTYsNyBA QCBFTlRSWShpd21teHRfdGFza19lbmFibGUpCiAJYmwJY29uY2FuX3NhdmUKIAogI2lmZGVmIENP TkZJR19QUkVFTVBUX0NPVU5UCi0JZ2V0X3RocmVhZF9pbmZvIHIxMAorCWdldF9jdXJyZW50IHIx MCwgcjMKICNlbmRpZgogNDoJZGVjX3ByZWVtcHRfY291bnQgcjEwLCByMwogCXJldAlyOQkJCQlA IG5vcm1hbCBleGl0IGZyb20gZXhjZXB0aW9uCmRpZmYgLS1naXQgYS9hcmNoL2FybS9rZXJuZWwv c21wLmMgYi9hcmNoL2FybS9rZXJuZWwvc21wLmMKaW5kZXggNTVjYjE2ODlhNGIzLi5iZTBlZGUx NmRiYjEgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL2tlcm5lbC9zbXAuYworKysgYi9hcmNoL2FybS9r ZXJuZWwvc21wLmMKQEAgLTUxLDYgKzUxLDEzIEBACiAjZGVmaW5lIENSRUFURV9UUkFDRV9QT0lO VFMKICNpbmNsdWRlIDx0cmFjZS9ldmVudHMvaXBpLmg+CiAKKyNpZmRlZiBDT05GSUdfVEhSRUFE X0lORk9fSU5fVEFTSworREVGSU5FX1BFUl9DUFUoc3RydWN0IHRhc2tfc3RydWN0ICosIGN1cnJl bnRfdGFzaykgX19fX2NhY2hlbGluZV9hbGlnbmVkID0KKwkmaW5pdF90YXNrOworRVhQT1JUX1BF Ul9DUFVfU1lNQk9MKGN1cnJlbnRfdGFzayk7CisKKyNlbmRpZgorCiAvKgogICogYXMgZnJvbSAy LjUsIGtlcm5lbHMgbm8gbG9uZ2VyIGhhdmUgYW4gaW5pdF90YXNrcyBzdHJ1Y3R1cmUKICAqIHNv IHdlIG5lZWQgc29tZSBvdGhlciB3YXkgb2YgdGVsbGluZyBhIG5ldyBzZWNvbmRhcnkgY29yZQpA QCAtMTU2LDYgKzE2MywxMCBAQCBpbnQgX19jcHVfdXAodW5zaWduZWQgaW50IGNwdSwgc3RydWN0 IHRhc2tfc3RydWN0ICppZGxlKQogCXNlY29uZGFyeV9kYXRhLmNwdSA9IGNwdTsKIAlzeW5jX2Nh Y2hlX3coJnNlY29uZGFyeV9kYXRhKTsKIAorI2lmZGVmIENPTkZJR19USFJFQURfSU5GT19JTl9U QVNLCisJcGVyX2NwdShjdXJyZW50X3Rhc2ssIGNwdSkgPSBpZGxlOworI2VuZGlmCisKIAkvKgog CSAqIE5vdyBicmluZyB0aGUgQ1BVIGludG8gb3VyIHdvcmxkLgogCSAqLwpAQCAtNTA5LDYgKzUy MCw3IEBAIHZvaWQgX19pbml0IHNtcF9wcmVwYXJlX2NwdXModW5zaWduZWQgaW50IG1heF9jcHVz KQogCSAqLwogCWlmIChtYXhfY3B1cyA+IG5jb3JlcykKIAkJbWF4X2NwdXMgPSBuY29yZXM7CisK IAlpZiAobmNvcmVzID4gMSAmJiBtYXhfY3B1cykgewogCQkvKgogCQkgKiBJbml0aWFsaXNlIHRo ZSBwcmVzZW50IG1hcCwgd2hpY2ggZGVzY3JpYmVzIHRoZSBzZXQgb2YgQ1BVcwpkaWZmIC0tZ2l0 IGEvYXJjaC9hcm0vbGliL2NvcHlfZnJvbV91c2VyLlMgYi9hcmNoL2FybS9saWIvY29weV9mcm9t X3VzZXIuUwppbmRleCBmODAxNmUzZGI2NWQuLjUzMjA5NTAxMDBhMiAxMDA2NDQKLS0tIGEvYXJj aC9hcm0vbGliL2NvcHlfZnJvbV91c2VyLlMKKysrIGIvYXJjaC9hcm0vbGliL2NvcHlfZnJvbV91 c2VyLlMKQEAgLTEwOSw3ICsxMDksNyBAQAogCiBFTlRSWShhcm1fY29weV9mcm9tX3VzZXIpCiAj aWZkZWYgQ09ORklHX0NQVV9TUEVDVFJFCi0JZ2V0X3RocmVhZF9pbmZvIHIzCisJZ2V0X2N1cnJl bnQgcjMsIGlwCiAJbGRyCXIzLCBbcjMsICNUSV9BRERSX0xJTUlUXQogCXVhY2Nlc3NfbWFza19y YW5nZV9wdHIgcjEsIHIyLCByMywgaXAKICNlbmRpZgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbGli L2NvcHlfdG9fdXNlci5TIGIvYXJjaC9hcm0vbGliL2NvcHlfdG9fdXNlci5TCmluZGV4IGViZmU0 Y2IzZDkxMi4uZTdlNjFjODc4OTNhIDEwMDY0NAotLS0gYS9hcmNoL2FybS9saWIvY29weV90b191 c2VyLlMKKysrIGIvYXJjaC9hcm0vbGliL2NvcHlfdG9fdXNlci5TCkBAIC0xMDksNyArMTA5LDcg QEAKIEVOVFJZKF9fY29weV90b191c2VyX3N0ZCkKIFdFQUsoYXJtX2NvcHlfdG9fdXNlcikKICNp ZmRlZiBDT05GSUdfQ1BVX1NQRUNUUkUKLQlnZXRfdGhyZWFkX2luZm8gcjMKKwlnZXRfY3VycmVu dCByMywgaXAKIAlsZHIJcjMsIFtyMywgI1RJX0FERFJfTElNSVRdCiAJdWFjY2Vzc19tYXNrX3Jh bmdlX3B0ciByMCwgcjIsIHIzLCBpcAogI2VuZGlmCmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNo LWVwOTN4eC9jcnVuY2gtYml0cy5TIGIvYXJjaC9hcm0vbWFjaC1lcDkzeHgvY3J1bmNoLWJpdHMu UwppbmRleCBmYjJkYmY3NmYwOWUuLmQwYmIzNGIzZDk3MyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0v bWFjaC1lcDkzeHgvY3J1bmNoLWJpdHMuUworKysgYi9hcmNoL2FybS9tYWNoLWVwOTN4eC9jcnVu Y2gtYml0cy5TCkBAIC0xOTIsNyArMTkyLDcgQEAgY3J1bmNoX2xvYWQ6CiAKIDE6CiAjaWZkZWYg Q09ORklHX1BSRUVNUFRfQ09VTlQKLQlnZXRfdGhyZWFkX2luZm8gcjEwCisJZ2V0X2N1cnJlbnQg cjEwLCByMwogI2VuZGlmCiAyOglkZWNfcHJlZW1wdF9jb3VudCByMTAsIHIzCiAJcmV0CWxyCmRp ZmYgLS1naXQgYS9hcmNoL2FybS9tbS9wcm9jLW1hY3Jvcy5TIGIvYXJjaC9hcm0vbW0vcHJvYy1t YWNyb3MuUwppbmRleCBlMmM3NDNhYTJlYjIuLmE3ODJjMDI1ZmRmMyAxMDA2NDQKLS0tIGEvYXJj aC9hcm0vbW0vcHJvYy1tYWNyb3MuUworKysgYi9hcmNoL2FybS9tbS9wcm9jLW1hY3Jvcy5TCkBA IC0zMCw3ICszMCw3IEBACiAgKiBhY3RfbW0gLSBnZXQgY3VycmVudC0+YWN0aXZlX21tCiAgKi8K IAkubWFjcm8JYWN0X21tLCByZAotCWdldF90aHJlYWRfaW5mbyBccmQKKwlnZXRfY3VycmVudCBc cmQsIHVudXNlZAkJCUAgd29uJ3QgYnVpbGQgaWYgVEhSRUFEX0lORk9fSU5fVEFTSwogCWxkcglc cmQsIFtccmQsICNUSV9UQVNLXQogCS5pZiAoVFNLX0FDVElWRV9NTSA+IElNTTEyX01BU0spCiAJ YWRkCVxyZCwgXHJkLCAjVFNLX0FDVElWRV9NTSAmIH5JTU0xMl9NQVNLCmRpZmYgLS1naXQgYS9h cmNoL2FybS92ZnAvZW50cnkuUyBiL2FyY2gvYXJtL3ZmcC9lbnRyeS5TCmluZGV4IDI3YjBhMWYy N2ZiZC4uNDhjYjQwYTNiNzJkIDEwMDY0NAotLS0gYS9hcmNoL2FybS92ZnAvZW50cnkuUworKysg Yi9hcmNoL2FybS92ZnAvZW50cnkuUwpAQCAtMjQsNyArMjQsMTEgQEAKIEVOVFJZKGRvX3ZmcCkK IAlpbmNfcHJlZW1wdF9jb3VudCByMTAsIHI0CiAgCWxkcglyNCwgLkxDdmZwCisjaWZkZWYgQ09O RklHX1RIUkVBRF9JTkZPX0lOX1RBU0sKKwlsZHIJcjExLCBbcjEwLCAjVFNLX0NQVV0JQCBDUFUg bnVtYmVyCisjZWxzZQogCWxkcglyMTEsIFtyMTAsICNUSV9DUFVdCUAgQ1BVIG51bWJlcgorI2Vu ZGlmCiAJYWRkCXIxMCwgcjEwLCAjVElfVkZQU1RBVEUJQCByMTAgPSB3b3Jrc3BhY2UKIAlsZHIJ cGMsIFtyNF0JCUAgY2FsbCBWRlAgZW50cnkgcG9pbnQKIEVORFBST0MoZG9fdmZwKQpkaWZmIC0t Z2l0IGEvYXJjaC9hcm0vdmZwL3ZmcG1vZHVsZS5jIGIvYXJjaC9hcm0vdmZwL3ZmcG1vZHVsZS5j CmluZGV4IDJjYjM1NWMxYjViNy4uZjkyOWEyNmEwNWE1IDEwMDY0NAotLS0gYS9hcmNoL2FybS92 ZnAvdmZwbW9kdWxlLmMKKysrIGIvYXJjaC9hcm0vdmZwL3ZmcG1vZHVsZS5jCkBAIC0xNDMsMjIg KzE0MywyNyBAQCBzdGF0aWMgdm9pZCB2ZnBfdGhyZWFkX2NvcHkoc3RydWN0IHRocmVhZF9pbmZv ICp0aHJlYWQpCiAgKiAgVEhSRUFEX05PRlRJRllfU1dUSUNIOgogICogICAtIHRoZSBwcmV2aW91 c2x5IHJ1bm5pbmcgdGhyZWFkIHdpbGwgbm90IGJlIHNjaGVkdWxlZCBvbnRvIGFub3RoZXIgQ1BV LgogICogICAtIHRoZSBuZXh0IHRocmVhZCB0byBiZSBydW4gKHYpIHdpbGwgbm90IGJlIHJ1bm5p bmcgb24gYW5vdGhlciBDUFUuCi0gKiAgIC0gdGhyZWFkLT5jcHUgaXMgdGhlIGxvY2FsIENQVSBu dW1iZXIKKyAqICAgLSB0c2stPmNwdSBpcyB0aGUgbG9jYWwgQ1BVIG51bWJlcgogICogICAtIG5v dCBwcmVlbXB0aWJsZSBhcyB3ZSdyZSBjYWxsZWQgaW4gdGhlIG1pZGRsZSBvZiBhIHRocmVhZCBz d2l0Y2gKICAqICBUSFJFQURfTk9USUZZX0ZMVVNIOgogICogICAtIHRoZSB0aHJlYWQgKHYpIHdp bGwgYmUgcnVubmluZyBvbiB0aGUgbG9jYWwgQ1BVLCBzbwotICoJdiA9PT0gY3VycmVudF90aHJl YWRfaW5mbygpCi0gKiAgIC0gdGhyZWFkLT5jcHUgaXMgdGhlIGxvY2FsIENQVSBudW1iZXIgYXQg dGhlIHRpbWUgaXQgaXMgYWNjZXNzZWQsCisgKgl2ID09PSBjdXJyZW50CisgKiAgIC0gdHNrLT5j cHUgaXMgdGhlIGxvY2FsIENQVSBudW1iZXIgYXQgdGhlIHRpbWUgaXQgaXMgYWNjZXNzZWQsCiAg KglidXQgbWF5IGNoYW5nZSBhdCBhbnkgdGltZS4KICAqICAgLSB3ZSBjb3VsZCBiZSBwcmVlbXB0 ZWQgaWYgdHJlZSBwcmVlbXB0IHJjdSBpcyBlbmFibGVkLCBzbwotICoJaXQgaXMgdW5zYWZlIHRv IHVzZSB0aHJlYWQtPmNwdS4KKyAqCWl0IGlzIHVuc2FmZSB0byB1c2UgdHNrLT5jcHUuCiAgKiAg VEhSRUFEX05PVElGWV9FWElUCiAgKiAgIC0gd2UgY291bGQgYmUgcHJlZW1wdGVkIGlmIHRyZWUg cHJlZW1wdCByY3UgaXMgZW5hYmxlZCwgc28KLSAqCWl0IGlzIHVuc2FmZSB0byB1c2UgdGhyZWFk LT5jcHUuCisgKglpdCBpcyB1bnNhZmUgdG8gdXNlIHRzay0+Y3B1LgogICovCiBzdGF0aWMgaW50 IHZmcF9ub3RpZmllcihzdHJ1Y3Qgbm90aWZpZXJfYmxvY2sgKnNlbGYsIHVuc2lnbmVkIGxvbmcg Y21kLCB2b2lkICp2KQogeworI2lmZGVmIENPTkZJR19USFJFQURfSU5GT19JTl9UQVNLCisJc3Ry dWN0IHRhc2tfc3RydWN0ICp0c2sgPSB2OworCXN0cnVjdCB0aHJlYWRfaW5mbyAqdGhyZWFkID0g JnRzay0+dGhyZWFkX2luZm87CisjZWxzZQogCXN0cnVjdCB0aHJlYWRfaW5mbyAqdGhyZWFkID0g djsKKyNlbmRpZgogCXUzMiBmcGV4YzsKICNpZmRlZiBDT05GSUdfU01QCiAJdW5zaWduZWQgaW50 IGNwdTsKQEAgLTE2OSw3ICsxNzQsMTEgQEAgc3RhdGljIGludCB2ZnBfbm90aWZpZXIoc3RydWN0 IG5vdGlmaWVyX2Jsb2NrICpzZWxmLCB1bnNpZ25lZCBsb25nIGNtZCwgdm9pZCAqdikKIAkJZnBl eGMgPSBmbXJ4KEZQRVhDKTsKIAogI2lmZGVmIENPTkZJR19TTVAKKyNpZmRlZiBDT05GSUdfVEhS RUFEX0lORk9fSU5fVEFTSworCQljcHUgPSB0c2stPmNwdTsKKyNlbHNlCiAJCWNwdSA9IHRocmVh ZC0+Y3B1OworI2VuZGlmCiAKIAkJLyoKIAkJICogT24gU01QLCBpZiBWRlAgaXMgZW5hYmxlZCwg c2F2ZSB0aGUgb2xkIHN0YXRlIGluCkBAIC00NTgsMTYgKzQ2NywxNiBAQCBzdGF0aWMgaW50IHZm cF9wbV9zdXNwZW5kKHZvaWQpCiAKIAkJLyogZGlzYWJsZSwganVzdCBpbiBjYXNlICovCiAJCWZt eHIoRlBFWEMsIGZtcngoRlBFWEMpICYgfkZQRVhDX0VOKTsKLQl9IGVsc2UgaWYgKHZmcF9jdXJy ZW50X2h3X3N0YXRlW3RpLT5jcHVdKSB7CisJfSBlbHNlIGlmICh2ZnBfY3VycmVudF9od19zdGF0 ZVtzbXBfcHJvY2Vzc29yX2lkKCldKSB7CiAjaWZuZGVmIENPTkZJR19TTVAKIAkJZm14cihGUEVY QywgZnBleGMgfCBGUEVYQ19FTik7Ci0JCXZmcF9zYXZlX3N0YXRlKHZmcF9jdXJyZW50X2h3X3N0 YXRlW3RpLT5jcHVdLCBmcGV4Yyk7CisJCXZmcF9zYXZlX3N0YXRlKHZmcF9jdXJyZW50X2h3X3N0 YXRlW3NtcF9wcm9jZXNzb3JfaWQoKV0sIGZwZXhjKTsKIAkJZm14cihGUEVYQywgZnBleGMpOwog I2VuZGlmCiAJfQogCiAJLyogY2xlYXIgYW55IGluZm9ybWF0aW9uIHdlIGhhZCBhYm91dCBsYXN0 IGNvbnRleHQgc3RhdGUgKi8KLQl2ZnBfY3VycmVudF9od19zdGF0ZVt0aS0+Y3B1XSA9IE5VTEw7 CisJdmZwX2N1cnJlbnRfaHdfc3RhdGVbc21wX3Byb2Nlc3Nvcl9pZCgpXSA9IE5VTEw7CiAKIAly ZXR1cm4gMDsKIH0KLS0gCjIuMzMuMAoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1r ZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWls bWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK