From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DAB2C433EF for ; Mon, 6 Sep 2021 23:47:03 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 342986108E for ; Mon, 6 Sep 2021 23:47:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 342986108E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 45C3E82F34; Tue, 7 Sep 2021 01:46:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 545818314A; Tue, 7 Sep 2021 01:46:57 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 0D0A682C88 for ; Tue, 7 Sep 2021 01:46:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 50F1C31B; Mon, 6 Sep 2021 16:46:53 -0700 (PDT) Received: from slackpad.fritz.box (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3F57F3F766; Mon, 6 Sep 2021 16:46:52 -0700 (PDT) Date: Tue, 7 Sep 2021 00:46:36 +0100 From: Andre Przywara To: Arnaud Ferraris Cc: u-boot@lists.denx.de, Jagan Teki , Samuel Holland , Maxime Ripard , Arnaud Ferraris Subject: Re: [PATCH 2/2] pinephone_defconfig: add support for early-boot status LED Message-ID: <20210907004636.014e2bcc@slackpad.fritz.box> In-Reply-To: <20210906205753.176175-3-arnaud.ferraris@collabora.com> References: <20210906205753.176175-1-arnaud.ferraris@collabora.com> <20210906205753.176175-3-arnaud.ferraris@collabora.com> Organization: Arm Ltd. X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean On Mon, 6 Sep 2021 22:57:53 +0200 Arnaud Ferraris wrote: > From: Arnaud Ferraris > > This commit enables the green status LED (PD18/GPIO 114) on boot in the > SPL, in order to provide visual feedback that the PinePhone is booting. Looks alright, and while I don't have a Pinephone to test this, I tried the similar setting on a Pine64-LTS. It should be noted that this increases the SPL by 364 bytes (in my setup), which kills the Pine H64, for instance. But it looks fine for A64 boards. > Signed-off-by: Arnaud Ferraris Reviewed-by: Andre Przywara Cheers, Andre > --- > configs/pinephone_defconfig | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig > index 64e13d3132..9d39204a43 100644 > --- a/configs/pinephone_defconfig > +++ b/configs/pinephone_defconfig > @@ -1,6 +1,7 @@ > CONFIG_ARM=y > CONFIG_ARCH_SUNXI=y > CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" > +CONFIG_SPL_DRIVERS_MISC=y > CONFIG_SPL=y > CONFIG_MACH_SUN50I=y > CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y > @@ -10,3 +11,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 > CONFIG_PINEPHONE_DT_SELECTION=y > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" > +CONFIG_LED_STATUS=y > +CONFIG_LED_STATUS_GPIO=y > +CONFIG_LED_STATUS0=y > +CONFIG_LED_STATUS_BIT=114 > +CONFIG_LED_STATUS_STATE=2