From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC3AEC433F5 for ; Fri, 10 Sep 2021 14:15:51 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2FEE561026 for ; Fri, 10 Sep 2021 14:15:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 2FEE561026 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=canonical.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C8FF583327; Fri, 10 Sep 2021 16:15:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=canonical.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.b="oXw8vsZk"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BA8E682DD7; Fri, 10 Sep 2021 16:15:45 +0200 (CEST) Received: from smtp-relay-canonical-1.canonical.com (smtp-relay-canonical-1.canonical.com [185.125.188.121]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E3EAE83327 for ; Fri, 10 Sep 2021 16:15:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=canonical.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=heinrich.schuchardt@canonical.com Received: from workstation5.fritz.box (ip-88-152-144-157.hsi03.unitymediagroup.de [88.152.144.157]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 451DF3F245; Fri, 10 Sep 2021 14:15:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1631283337; bh=BpRU1ni5Og1f50YLUCORRlSSceCdx0Vtb8yeu0G/eAA=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=oXw8vsZk/Yv/gt4IC7Pc3Ey76oz2BWdwACoxc2IxiRPtkEw7PvL/eMEi714CdvIai Qnx7QIXxR59OVuqGZ1bepYAuYhbOGV3EzT/c27o1iNxTtCZw31gD4LxNMpSGHjRMza TWfEcwF7K/gfC1wAezg+8rMvu2MTFgPYFrUVCeTEZ1HqU7//2qPvqcHAvS7huVKSBm CLILNexKFj8CecIRbcPj22PcD1v0kNwGgZpHNC8Klbap9ocgba12jHbMW1nPRfnoYY fo8Cms80shGVj+bOIsIEdcZD0ylmqmVDNHzUIJoFB9Gq0lemMki8KaVSuAL8Daz75k tRW/ESwjtEQwQ== From: Heinrich Schuchardt To: Rick Chen , Leo Cc: Bin Meng , Simon Glass , Sean Anderson , Green Wan , =?UTF-8?q?Marek=20Beh=C3=BAn?= , Chee Hong Ang , Ley Foon Tan , Priyanka Jain , Siew Chin Lim , Sebastian Reichel , u-boot@lists.denx.de, Heinrich Schuchardt Subject: [PATCH v5 0/4] riscv: enable SBI system reset Date: Fri, 10 Sep 2021 16:15:25 +0200 Message-Id: <20210910141529.69841-1-heinrich.schuchardt@canonical.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean With SBI v0.3 a system reset extension is available. This allows to implement reboot and poweroff in U-Boot in a system independent way. * Provide missing constants * Provide a system reset driver using the system reset extension. v5: * add a configuration actually using the driver * don't add __efi_runtime in arch/riscv/lib/sbi.c * use '=' not ':' in array initialization with enum indices v4: * remove the UEFI SystemReset() implementation * simplify the code using an array to translate reset types * remove a superfluos check to determine if the device was probed v3: add SBI_HSM_HART_STATUS_SUSPENDED, SBI_HSM_HART_STATUS_SUSPEND_PENDING, SBI_HSM_HART_STATUS_RESUME_PENDING v2: correct constants that were blindly copied from Linux Heinrich Schuchardt (4): riscv: add missing SBI extension definitions cmd/sbi: use constants instead of numerical values sysreset: provide SBI based sysreset driver configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfig MAINTAINERS | 1 + arch/riscv/cpu/cpu.c | 13 ++++++- arch/riscv/include/asm/sbi.h | 40 ++++++++++++++++++++-- arch/riscv/lib/sbi.c | 12 +++++++ cmd/riscv/sbi.c | 30 ++++++++-------- configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + drivers/sysreset/Kconfig | 12 +++++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_sbi.c | 51 ++++++++++++++++++++++++++++ 10 files changed, 144 insertions(+), 18 deletions(-) create mode 100644 drivers/sysreset/sysreset_sbi.c -- 2.30.2