[Intel-gfx] [PATCH 00/16] drm/i915: Fix bigjoiner state readout

[Intel-gfx] [PATCH 00/16] drm/i915: Fix bigjoiner state readout

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's try to finally fix up some of the bigjoiner shortcomings.
The focus here is getting rid of all the state readout hacks.
The actual modeset flow is still very fragile and hard to
follow, but fixing that isn't going to be simple so I'll
leave it alone for the moment.

Ville Syrjälä (16):
  Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
  drm/i915: Disable all planes before modesetting any pipes
  drm/i915: Extract intel_dp_use_bigjoiner()
  drm/i915: Flatten hsw_crtc_compute_clock()
  drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF
  drm/i915: Introduce with_intel_display_power_if_enabled()
  drm/i915: Adjust intel_dsc_power_domain() calling convention
  drm/i915: Extract hsw_panel_transcoders()
  drm/i915: Pimp HSW+ transcoder state readout
  drm/i915: Configure TRANSCONF just the once with bigjoiner
  drm/i915: Introduce intel_master_crtc()
  drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
  drm/i915: Split PPS write from DSC enable
  drm/i915: Perform correct cpu_transcoder readout for bigjoiner
  drm/i915: Reduce bigjoiner special casing
  drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE

 drivers/gpu/drm/i915/display/g4x_dp.c         |   4 +-
 drivers/gpu/drm/i915/display/icl_dsi.c        |   6 +-
 drivers/gpu/drm/i915/display/intel_crt.c      |   4 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  70 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 607 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_display.h  |  12 +-
 .../drm/i915/display/intel_display_power.h    |   4 +
 .../drm/i915/display/intel_display_types.h    |   5 -
 drivers/gpu/drm/i915/display/intel_dp.c       |  21 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  18 +-
 drivers/gpu/drm/i915/display/intel_dpll.c     |  32 +-
 drivers/gpu/drm/i915/display/intel_fdi.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_tv.c       |   2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c     | 112 ++--
 drivers/gpu/drm/i915/display/intel_vdsc.h     |  16 +-
 15 files changed, 470 insertions(+), 445 deletions(-)

-- 
2.32.0

[Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Disabling planes in the middle of the modeset seuqnece does not make
sense since userspace can anyway disable planes before the modeset
even starts. So when the modeset seuqence starts the set of enabled
planes is entirely arbitrary. Trying to sprinkle the plane disabling
into the modeset sequence just means more randomness and potential
for hard to reproduce bugs.

So it makes most sense to just disable all planes first so that the
rest of the modeset sequence remains identical regardless of which
planes happen to be enabled by userspace at the time.

This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 30 +++++++------------
 drivers/gpu/drm/i915/display/intel_display.c  | 24 ---------------
 .../drm/i915/display/intel_display_types.h    |  4 ---
 drivers/gpu/drm/i915/display/intel_dp_mst.c   | 14 ++-------
 4 files changed, 13 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 23ef291f7b30..c1fd7cbb40e1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3164,6 +3164,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
 
 	intel_dp->link_trained = false;
 
+	if (old_crtc_state->has_audio)
+		intel_audio_codec_disable(encoder,
+					  old_crtc_state, old_conn_state);
+
+	intel_drrs_disable(intel_dp, old_crtc_state);
+	intel_psr_disable(intel_dp, old_crtc_state);
 	intel_edp_backlight_off(old_conn_state);
 	/* Disable the decompression in DP Sink */
 	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
@@ -3181,6 +3187,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct drm_connector *connector = old_conn_state->connector;
 
+	if (old_crtc_state->has_audio)
+		intel_audio_codec_disable(encoder,
+					  old_crtc_state, old_conn_state);
+
 	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
 					       false, false))
 		drm_dbg_kms(&i915->drm,
@@ -3188,25 +3198,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
 			    connector->base.id, connector->name);
 }
 
-static void intel_pre_disable_ddi(struct intel_atomic_state *state,
-				  struct intel_encoder *encoder,
-				  const struct intel_crtc_state *old_crtc_state,
-				  const struct drm_connector_state *old_conn_state)
-{
-	struct intel_dp *intel_dp;
-
-	if (old_crtc_state->has_audio)
-		intel_audio_codec_disable(encoder, old_crtc_state,
-					  old_conn_state);
-
-	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
-		return;
-
-	intel_dp = enc_to_intel_dp(encoder);
-	intel_drrs_disable(intel_dp, old_crtc_state);
-	intel_psr_disable(intel_dp, old_crtc_state);
-}
-
 static void intel_disable_ddi(struct intel_atomic_state *state,
 			      struct intel_encoder *encoder,
 			      const struct intel_crtc_state *old_crtc_state,
@@ -4541,7 +4532,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	encoder->enable = intel_enable_ddi;
 	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
 	encoder->pre_enable = intel_ddi_pre_enable;
-	encoder->pre_disable = intel_pre_disable_ddi;
 	encoder->disable = intel_disable_ddi;
 	encoder->post_disable = intel_ddi_post_disable;
 	encoder->update_pipe = intel_ddi_update_pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a7ca38613f89..cd150512d275 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2723,28 +2723,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
 	}
 }
 
-static void intel_encoders_pre_disable(struct intel_atomic_state *state,
-				       struct intel_crtc *crtc)
-{
-	const struct intel_crtc_state *old_crtc_state =
-		intel_atomic_get_old_crtc_state(state, crtc);
-	const struct drm_connector_state *old_conn_state;
-	struct drm_connector *conn;
-	int i;
-
-	for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
-		struct intel_encoder *encoder =
-			to_intel_encoder(old_conn_state->best_encoder);
-
-		if (old_conn_state->crtc != &crtc->base)
-			continue;
-
-		if (encoder->pre_disable)
-			encoder->pre_disable(state, encoder, old_crtc_state,
-					     old_conn_state);
-	}
-}
-
 static void intel_encoders_disable(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc)
 {
@@ -9807,8 +9785,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 
 	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
 
-	intel_encoders_pre_disable(state, crtc);
-
 	intel_crtc_disable_planes(state, crtc);
 
 	/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e9e806d90eec..7d852affead1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -196,10 +196,6 @@ struct intel_encoder {
 	void (*update_complete)(struct intel_atomic_state *,
 				struct intel_encoder *,
 				struct intel_crtc *);
-	void (*pre_disable)(struct intel_atomic_state *,
-			    struct intel_encoder *,
-			    const struct intel_crtc_state *,
-			    const struct drm_connector_state *);
 	void (*disable)(struct intel_atomic_state *,
 			struct intel_encoder *,
 			const struct intel_crtc_state *,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index d104441344c0..914bea983a28 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
 	drm_dp_check_act_status(&intel_dp->mst_mgr);
 }
 
-static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
-				     struct intel_encoder *encoder,
-				     const struct intel_crtc_state *old_crtc_state,
-				     const struct drm_connector_state *old_conn_state)
-{
-	if (old_crtc_state->has_audio)
-		intel_audio_codec_disable(encoder, old_crtc_state,
-					  old_conn_state);
-}
-
 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 				 struct intel_encoder *encoder,
 				 const struct intel_crtc_state *old_crtc_state,
@@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
 	if (ret) {
 		drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 	}
+	if (old_crtc_state->has_audio)
+		intel_audio_codec_disable(encoder,
+					  old_crtc_state, old_conn_state);
 }
 
 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
@@ -905,7 +898,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
 
 	intel_encoder->compute_config = intel_dp_mst_compute_config;
 	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
-	intel_encoder->pre_disable = intel_mst_pre_disable_dp;
 	intel_encoder->disable = intel_mst_disable_dp;
 	intel_encoder->post_disable = intel_mst_post_disable_dp;
 	intel_encoder->update_pipe = intel_ddi_update_pipe;
-- 
2.32.0

[Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's disable planes on all pipes affected by the modeset before
we start doing the actual modeset. This means we have less
random planes enabled during the modeset, and it also mirrors
what we already do when enabling pipes on skl+ since we enable
planes on all pipes as the very last step. As a bonus we also
nuke a bunch og bigjoiner special casing.

I've occasionally pondered about going even furher here and
doing the pre_plane_update() stuff for all pipes first, then
actually disabling the planes, and finally running the rest
of the modeset sequence. This would potentially allow
parallelizing all the extra vblank waits across multiple pipes,
and would make the plane disable even more atomic. But let's
go one step a time here.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cd150512d275..afa26911c236 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9785,18 +9785,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 
 	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
 
-	intel_crtc_disable_planes(state, crtc);
-
 	/*
 	 * We still need special handling for disabling bigjoiner master
 	 * and slaves since for slave we do not have encoder or plls
 	 * so we dont need to disable those.
 	 */
-	if (old_crtc_state->bigjoiner) {
-		intel_crtc_disable_planes(state,
-					  old_crtc_state->bigjoiner_linked_crtc);
+	if (old_crtc_state->bigjoiner)
 		old_crtc_state->bigjoiner_linked_crtc->active = false;
-	}
 
 	/*
 	 * We need to disable pipe CRC before disabling the pipe,
@@ -9823,6 +9818,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 	u32 handled = 0;
 	int i;
 
+	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+					    new_crtc_state, i) {
+		if (!intel_crtc_needs_modeset(new_crtc_state))
+			continue;
+
+		if (!old_crtc_state->hw.active)
+			continue;
+
+		intel_pre_plane_update(state, crtc);
+		intel_crtc_disable_planes(state, crtc);
+	}
+
 	/* Only disable port sync and MST slaves */
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
 					    new_crtc_state, i) {
@@ -9841,7 +9848,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 		    !intel_dp_mst_is_slave_trans(old_crtc_state))
 			continue;
 
-		intel_pre_plane_update(state, crtc);
 		intel_old_crtc_state_disables(state, old_crtc_state,
 					      new_crtc_state, crtc);
 		handled |= BIT(crtc->pipe);
@@ -9855,14 +9861,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 		    old_crtc_state->bigjoiner_slave)
 			continue;
 
-		intel_pre_plane_update(state, crtc);
-		if (old_crtc_state->bigjoiner) {
-			struct intel_crtc *slave =
-				old_crtc_state->bigjoiner_linked_crtc;
-
-			intel_pre_plane_update(state, slave);
-		}
-
 		if (old_crtc_state->hw.active)
 			intel_old_crtc_state_disables(state, old_crtc_state,
 						      new_crtc_state, crtc);
-- 
2.32.0

[Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Suck the "do we need bigjoiner?" checks into a helper instead of
duplicating them in two differentt places.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 161c33b2c869..e898834cc5f9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -805,6 +805,17 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	return MODE_OK;
 }
 
+static bool intel_dp_use_bigjoiner(struct intel_dp *intel_dp,
+				   int hdisplay, int clock)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+	if (!intel_dp_can_bigjoiner(intel_dp))
+		return false;
+
+	return clock > i915->max_dotclk_freq || hdisplay > 5120;
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *connector,
 		    struct drm_display_mode *mode)
@@ -840,8 +851,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
 	if (mode->clock < 10000)
 		return MODE_CLOCK_LOW;
 
-	if ((target_clock > max_dotclk || mode->hdisplay > 5120) &&
-	    intel_dp_can_bigjoiner(intel_dp)) {
+	if (intel_dp_use_bigjoiner(intel_dp, mode->hdisplay, target_clock)) {
 		bigjoiner = true;
 		max_dotclk *= 2;
 	}
@@ -1457,9 +1467,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 		    limits.max_lane_count, limits.max_rate,
 		    limits.max_bpp, adjusted_mode->crtc_clock);
 
-	if ((adjusted_mode->crtc_clock > i915->max_dotclk_freq ||
-	     adjusted_mode->crtc_hdisplay > 5120) &&
-	    intel_dp_can_bigjoiner(intel_dp))
+	if (intel_dp_use_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
+				   adjusted_mode->crtc_clock))
 		pipe_config->bigjoiner = true;
 
 	/*
-- 
2.32.0

[Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

hsw_crtc_compute_clock() has become spaghetti. Flatten
it a bit to make it at least semi-legible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpll.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 210f91f4a576..ace9157a1c30 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -937,16 +937,18 @@ static int hsw_crtc_compute_clock(struct intel_crtc_state *crtc_state)
 	struct intel_encoder *encoder =
 		intel_get_crtc_new_encoder(state, crtc_state);
 
-	if (IS_DG2(dev_priv)) {
+	if (IS_DG2(dev_priv))
 		return intel_mpllb_calc_state(crtc_state, encoder);
-	} else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
-		   DISPLAY_VER(dev_priv) >= 11) {
-		if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
-			drm_dbg_kms(&dev_priv->drm,
-				    "failed to find PLL for pipe %c\n",
-				    pipe_name(crtc->pipe));
-			return -EINVAL;
-		}
+
+	if (DISPLAY_VER(dev_priv) < 11 &&
+	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
+		return 0;
+
+	if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "failed to find PLL for pipe %c\n",
+			    pipe_name(crtc->pipe));
+		return -EINVAL;
 	}
 
 	return 0;
-- 
2.32.0

[Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

PIPECONF becamse TRANSCONF when HSW introduced the EDP transcoder.
Bigjoiner is making life even more confusing by introducing
a N:1 relationship between pipes and transcoders. In that case
we only enable/configure the transcoder corresponding to the
master pipe. Let's do some renames to make it clear we're dealing
with the transcoder rather than pipe when it comes to
PIPECONF/TRANSCONF.

I decided to leave the _cpu_ part out from the function/macro
names since the PCH transcoder related stuff already has a
_pch_ in their name. So shouldn't be possible to confuse them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c        |  4 +--
 drivers/gpu/drm/i915/display/intel_crt.c     |  4 +--
 drivers/gpu/drm/i915/display/intel_ddi.c     |  4 +--
 drivers/gpu/drm/i915/display/intel_display.c | 28 ++++++++++----------
 drivers/gpu/drm/i915/display/intel_display.h | 12 ++++-----
 drivers/gpu/drm/i915/display/intel_dp_mst.c  |  4 +--
 drivers/gpu/drm/i915/display/intel_dpll.c    | 12 ++++-----
 drivers/gpu/drm/i915/display/intel_fdi.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_tv.c      |  2 +-
 9 files changed, 36 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 9577f6843f79..8e0620ae2ed1 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -211,7 +211,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
 	assert_dp_port_disabled(intel_dp);
 	assert_edp_pll_disabled(dev_priv);
 
@@ -251,7 +251,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
 	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
 	assert_dp_port_disabled(intel_dp);
 	assert_edp_pll_enabled(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 408f82b0dc7d..1c161eeed82f 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -251,7 +251,7 @@ static void hsw_post_disable_crt(struct intel_atomic_state *state,
 
 	intel_crtc_vblank_off(old_crtc_state);
 
-	intel_disable_pipe(old_crtc_state);
+	intel_disable_transcoder(old_crtc_state);
 
 	intel_ddi_disable_transcoder_func(old_crtc_state);
 
@@ -314,7 +314,7 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
 
 	intel_ddi_enable_transcoder_func(encoder, crtc_state);
 
-	intel_enable_pipe(crtc_state);
+	intel_enable_transcoder(crtc_state);
 
 	lpt_pch_enable(crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c1fd7cbb40e1..4f7420dda8b5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2867,7 +2867,7 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
 	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
 		intel_crtc_vblank_off(old_crtc_state);
 
-		intel_disable_pipe(old_crtc_state);
+		intel_disable_transcoder(old_crtc_state);
 
 		intel_vrr_disable(old_crtc_state);
 
@@ -3138,7 +3138,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
 
 	intel_vrr_enable(encoder, crtc_state);
 
-	intel_enable_pipe(crtc_state);
+	intel_enable_transcoder(crtc_state);
 
 	intel_crtc_vblank_on(crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index afa26911c236..1a0eac3da3f0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -120,7 +120,7 @@ static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_sta
 					 const struct intel_link_m_n *m2_n2);
 static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
 static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
 static void intel_modeset_setup_hw_state(struct drm_device *dev,
@@ -448,8 +448,8 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 	     pipe_name(pipe));
 }
 
-void assert_pipe(struct drm_i915_private *dev_priv,
-		 enum transcoder cpu_transcoder, bool state)
+void assert_transcoder(struct drm_i915_private *dev_priv,
+		       enum transcoder cpu_transcoder, bool state)
 {
 	bool cur_state;
 	enum intel_display_power_domain power_domain;
@@ -766,7 +766,7 @@ enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
 		return crtc->pipe;
 }
 
-void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
+void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -827,7 +827,7 @@ void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
 		intel_wait_for_pipe_scanline_moving(crtc);
 }
 
-void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
+void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2883,7 +2883,7 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
 
 	if (dev_priv->display.initial_watermarks)
 		dev_priv->display.initial_watermarks(state, crtc);
-	intel_enable_pipe(new_crtc_state);
+	intel_enable_transcoder(new_crtc_state);
 
 	if (new_crtc_state->has_pch_encoder)
 		ilk_pch_enable(state, new_crtc_state);
@@ -3062,7 +3062,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 	}
 
 	if (!transcoder_is_dsi(cpu_transcoder))
-		hsw_set_pipeconf(new_crtc_state);
+		hsw_set_transconf(new_crtc_state);
 
 	crtc->active = true;
 
@@ -3157,7 +3157,7 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 
 	intel_crtc_vblank_off(old_crtc_state);
 
-	intel_disable_pipe(old_crtc_state);
+	intel_disable_transcoder(old_crtc_state);
 
 	ilk_pfit_disable(old_crtc_state);
 
@@ -3219,7 +3219,7 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
 	 */
 	drm_WARN_ON(&dev_priv->drm,
 		    intel_de_read(dev_priv, PFIT_CONTROL) & PFIT_ENABLE);
-	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
 
 	intel_de_write(dev_priv, PFIT_PGM_RATIOS,
 		       crtc_state->gmch_pfit.pgm_ratios);
@@ -3511,7 +3511,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
 	intel_disable_primary_plane(new_crtc_state);
 
 	dev_priv->display.initial_watermarks(state, crtc);
-	intel_enable_pipe(new_crtc_state);
+	intel_enable_transcoder(new_crtc_state);
 
 	intel_crtc_vblank_on(new_crtc_state);
 
@@ -3557,7 +3557,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
 		dev_priv->display.initial_watermarks(state, crtc);
 	else
 		intel_update_watermarks(crtc);
-	intel_enable_pipe(new_crtc_state);
+	intel_enable_transcoder(new_crtc_state);
 
 	intel_crtc_vblank_on(new_crtc_state);
 
@@ -3576,7 +3576,7 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
 	if (!old_crtc_state->gmch_pfit.control)
 		return;
 
-	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
 
 	drm_dbg_kms(&dev_priv->drm, "disabling pfit, current: 0x%08x\n",
 		    intel_de_read(dev_priv, PFIT_CONTROL));
@@ -3602,7 +3602,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
 
 	intel_crtc_vblank_off(old_crtc_state);
 
-	intel_disable_pipe(old_crtc_state);
+	intel_disable_transcoder(old_crtc_state);
 
 	i9xx_pfit_disable(old_crtc_state);
 
@@ -5172,7 +5172,7 @@ static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
 	intel_de_posting_read(dev_priv, PIPECONF(pipe));
 }
 
-static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
+static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 4719ffc97fce..d425ee77aad7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -531,8 +531,8 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
 bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
 
 void intel_plane_destroy(struct drm_plane *plane);
-void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
-void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);
+void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state);
+void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
 void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
 void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
 enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
@@ -657,10 +657,10 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
 		       enum pipe pipe, bool state);
 #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
 #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
-void assert_pipe(struct drm_i915_private *dev_priv,
-		 enum transcoder cpu_transcoder, bool state);
-#define assert_pipe_enabled(d, t) assert_pipe(d, t, true)
-#define assert_pipe_disabled(d, t) assert_pipe(d, t, false)
+void assert_transcoder(struct drm_i915_private *dev_priv,
+		       enum transcoder cpu_transcoder, bool state);
+#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
+#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
 
 /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
  * WARN_ON()) for hw state sanity checks to check for unexpected conditions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 914bea983a28..9f1fc1a68ed2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -398,7 +398,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 
 	intel_crtc_vblank_off(old_crtc_state);
 
-	intel_disable_pipe(old_crtc_state);
+	intel_disable_transcoder(old_crtc_state);
 
 	drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 
@@ -559,7 +559,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
 		intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
 			     FECSTALL_DIS_DPTSTREAM_DPTTG);
 
-	intel_enable_pipe(pipe_config);
+	intel_enable_transcoder(pipe_config);
 
 	intel_crtc_vblank_on(pipe_config);
 
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index ace9157a1c30..487d8721ecf8 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1402,7 +1402,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)
 	enum pipe pipe = crtc->pipe;
 	int i;
 
-	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
 
 	/* PLL is protected by panel, make sure we can write it */
 	if (i9xx_has_pps(dev_priv))
@@ -1582,7 +1582,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 
-	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
 
 	/* PLL is protected by panel, make sure we can write it */
 	assert_panel_unlocked(dev_priv, pipe);
@@ -1734,7 +1734,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 
-	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
 
 	/* PLL is protected by panel, make sure we can write it */
 	assert_panel_unlocked(dev_priv, pipe);
@@ -1818,7 +1818,7 @@ void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
 	u32 val;
 
 	/* Make sure the pipe isn't still relying on us */
-	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
+	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
 
 	val = DPLL_INTEGRATED_REF_CLK_VLV |
 		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
@@ -1835,7 +1835,7 @@ void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
 	u32 val;
 
 	/* Make sure the pipe isn't still relying on us */
-	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
+	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
 
 	val = DPLL_SSC_REF_CLK_CHV |
 		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
@@ -1866,7 +1866,7 @@ void i9xx_disable_pll(const struct intel_crtc_state *crtc_state)
 		return;
 
 	/* Make sure the pipe isn't still relying on us */
-	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
 
 	intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS);
 	intel_de_posting_read(dev_priv, DPLL(pipe));
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index fc09b781f15f..96ff12ad0873 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -281,7 +281,7 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
 		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
 
 	/* FDI needs bits from pipe first */
-	assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
+	assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);
 
 	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
 	   for train result */
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index d02f09f7e750..88a398df9621 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1529,7 +1529,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
 		intel_de_write(dev_priv, TV_CLR_LEVEL,
 			       ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
 
-	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
+	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
 
 	/* Filter ctl must be set before TV_WIN_SIZE */
 	tv_filter_ctl = TV_AUTO_SCALE;
-- 
2.32.0

[Intel-gfx] [PATCH 06/16] drm/i915: Introduce with_intel_display_power_if_enabled()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add the _if_enabled() counterpart to with_intel_display_power().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 978531841fa3..0612e4b6e3c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -410,6 +410,10 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
 	for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
 	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
 
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
+
 void chv_phy_powergate_lanes(struct intel_encoder *encoder,
 			     bool override, unsigned int mask);
 bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
-- 
2.32.0

[Intel-gfx] [PATCH 07/16] drm/i915: Adjust intel_dsc_power_domain() calling convention

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pass the crtc+cpu_transcoder rather than the crtc state to
intel_dsc_power_domain(). This should allow us to reuse it
during readout as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  6 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c    | 79 ++++++++++----------
 drivers/gpu/drm/i915/display/intel_vdsc.h    |  6 +-
 3 files changed, 45 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1a0eac3da3f0..54107bab4ae6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3404,16 +3404,16 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	struct drm_encoder *encoder;
 	enum pipe pipe = crtc->pipe;
 	u64 mask;
-	enum transcoder transcoder = crtc_state->cpu_transcoder;
 
 	if (!crtc_state->hw.active)
 		return 0;
 
 	mask = BIT_ULL(POWER_DOMAIN_PIPE(pipe));
-	mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(transcoder));
+	mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(cpu_transcoder));
 	if (crtc_state->pch_pfit.enabled ||
 	    crtc_state->pch_pfit.force_thru)
 		mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe));
@@ -3432,7 +3432,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
 		mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
 
 	if (crtc_state->dsc.compression_enable)
-		mask |= BIT_ULL(intel_dsc_power_domain(crtc_state));
+		mask |= BIT_ULL(intel_dsc_power_domain(crtc, cpu_transcoder));
 
 	return mask;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index df3286aa6999..2275f99ce9d7 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -357,11 +357,9 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
 	return false;
 }
 
-static bool is_pipe_dsc(const struct intel_crtc_state *crtc_state)
+static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
-	const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	const struct drm_i915_private *i915 = to_i915(crtc->base.dev);
-	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 
 	if (DISPLAY_VER(i915) >= 12)
 		return true;
@@ -547,9 +545,8 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 }
 
 enum intel_display_power_domain
-intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
+intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 
@@ -566,7 +563,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
 	 */
 	if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A)
 		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
-	else if (is_pipe_dsc(crtc_state))
+	else if (is_pipe_dsc(crtc, cpu_transcoder))
 		return POWER_DOMAIN_PIPE(pipe);
 	else
 		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
@@ -577,6 +574,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	enum pipe pipe = crtc->pipe;
 	u32 pps_val = 0;
 	u32 rc_buf_thresh_dword[4];
@@ -601,7 +599,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	if (vdsc_cfg->vbr_enable)
 		pps_val |= DSC_VBR_ENABLE;
 	drm_info(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_0,
 			       pps_val);
 		/*
@@ -625,7 +623,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val = 0;
 	pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel);
 	drm_info(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_1,
 			       pps_val);
 		/*
@@ -650,7 +648,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
 		DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
 	drm_info(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_2,
 			       pps_val);
 		/*
@@ -675,7 +673,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |
 		DSC_SLICE_WIDTH(vdsc_cfg->slice_width);
 	drm_info(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_3,
 			       pps_val);
 		/*
@@ -700,7 +698,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |
 		DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay);
 	drm_info(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_4,
 			       pps_val);
 		/*
@@ -725,7 +723,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |
 		DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval);
 	drm_info(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_5,
 			       pps_val);
 		/*
@@ -752,7 +750,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 		DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) |
 		DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp);
 	drm_info(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_6,
 			       pps_val);
 		/*
@@ -777,7 +775,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |
 		DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset);
 	drm_info(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_7,
 			       pps_val);
 		/*
@@ -802,7 +800,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |
 		DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset);
 	drm_info(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_8,
 			       pps_val);
 		/*
@@ -827,7 +825,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	pps_val |= DSC_RC_MODEL_SIZE(vdsc_cfg->rc_model_size) |
 		DSC_RC_EDGE_FACTOR(DSC_RC_EDGE_FACTOR_CONST);
 	drm_info(&dev_priv->drm, "PPS9 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_9,
 			       pps_val);
 		/*
@@ -854,7 +852,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 		DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) |
 		DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CONST);
 	drm_info(&dev_priv->drm, "PPS10 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_10,
 			       pps_val);
 		/*
@@ -882,7 +880,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 		DSC_SLICE_ROW_PER_FRAME(vdsc_cfg->pic_height /
 					vdsc_cfg->slice_height);
 	drm_info(&dev_priv->drm, "PPS16 = 0x%08x\n", pps_val);
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_16,
 			       pps_val);
 		/*
@@ -911,7 +909,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 		drm_info(&dev_priv->drm, " RC_BUF_THRESH%d = 0x%08x\n", i,
 			 rc_buf_thresh_dword[i / 4]);
 	}
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0,
 			       rc_buf_thresh_dword[0]);
 		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0_UDW,
@@ -968,7 +966,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 		drm_info(&dev_priv->drm, " RC_RANGE_PARAM_%d = 0x%08x\n", i,
 			 rc_range_params_dword[i / 2]);
 	}
-	if (!is_pipe_dsc(crtc_state)) {
+	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
 		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0,
 			       rc_range_params_dword[0]);
 		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0_UDW,
@@ -1095,18 +1093,16 @@ static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
 				  sizeof(dp_dsc_pps_sdp));
 }
 
-static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state)
+static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
-	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
-
-	return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1;
+	return is_pipe_dsc(crtc, cpu_transcoder) ?
+		ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1;
 }
 
-static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state)
+static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
 {
-	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
-
-	return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2;
+	return is_pipe_dsc(crtc, cpu_transcoder) ?
+		ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2;
 }
 
 static struct intel_crtc *
@@ -1142,7 +1138,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
 		else
 			dss_ctl1_val |= UNCOMPRESSED_JOINER_MASTER;
 
-		intel_de_write(dev_priv, dss_ctl1_reg(crtc_state), dss_ctl1_val);
+		intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);
 	}
 }
 
@@ -1176,8 +1172,8 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 		if (!crtc_state->bigjoiner_slave)
 			dss_ctl1_val |= MASTER_BIG_JOINER_ENABLE;
 	}
-	intel_de_write(dev_priv, dss_ctl1_reg(crtc_state), dss_ctl1_val);
-	intel_de_write(dev_priv, dss_ctl2_reg(crtc_state), dss_ctl2_val);
+	intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);
+	intel_de_write(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val);
 }
 
 void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
@@ -1188,8 +1184,8 @@ void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
 	/* Disable only if either of them is enabled */
 	if (old_crtc_state->dsc.compression_enable ||
 	    old_crtc_state->bigjoiner) {
-		intel_de_write(dev_priv, dss_ctl1_reg(old_crtc_state), 0);
-		intel_de_write(dev_priv, dss_ctl2_reg(old_crtc_state), 0);
+		intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0);
+		intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0);
 	}
 }
 
@@ -1199,7 +1195,7 @@ void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state)
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	u32 dss_ctl1;
 
-	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
+	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder));
 	if (dss_ctl1 & UNCOMPRESSED_JOINER_MASTER) {
 		crtc_state->bigjoiner = true;
 		crtc_state->bigjoiner_linked_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
@@ -1214,9 +1210,10 @@ void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state)
 
 void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	enum pipe pipe = crtc->pipe;
 	enum intel_display_power_domain power_domain;
 	intel_wakeref_t wakeref;
@@ -1225,14 +1222,14 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
 	if (!intel_dsc_source_support(crtc_state))
 		return;
 
-	power_domain = intel_dsc_power_domain(crtc_state);
+	power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
 
 	wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
 	if (!wakeref)
 		return;
 
-	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
-	dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc_state));
+	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, cpu_transcoder));
+	dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, cpu_transcoder));
 
 	crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE;
 	if (!crtc_state->dsc.compression_enable)
@@ -1256,7 +1253,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
 	/* FIXME: add more state readout as needed */
 
 	/* PPS1 */
-	if (!is_pipe_dsc(crtc_state))
+	if (!is_pipe_dsc(crtc, cpu_transcoder))
 		val = intel_de_read(dev_priv, DSCA_PICTURE_PARAMETER_SET_1);
 	else
 		val = intel_de_read(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index dfb1fd38deb4..0c5d80a572da 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -8,8 +8,10 @@
 
 #include <linux/types.h>
 
-struct intel_encoder;
+enum transcoder;
+struct intel_crtc;
 struct intel_crtc_state;
+struct intel_encoder;
 
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
@@ -21,7 +23,7 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
 void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
 enum intel_display_power_domain
-intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
+intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
 struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
 
 #endif /* __INTEL_VDSC_H__ */
-- 
2.32.0

[Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the "panel transcoder" bitmask into a helper. We'll
have a couple of uses for this later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 54107bab4ae6..3848f7963cec 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5577,21 +5577,27 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
 	return ret;
 }
 
+static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
+{
+	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
+
+	if (DISPLAY_VER(i915) >= 11)
+		panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+
+	return panel_transcoder_mask;
+}
+
 static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 				     struct intel_crtc_state *pipe_config,
 				     struct intel_display_power_domain_set *power_domain_set)
 {
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
+	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
 	unsigned long enabled_panel_transcoders = 0;
 	enum transcoder panel_transcoder;
 	u32 tmp;
 
-	if (DISPLAY_VER(dev_priv) >= 11)
-		panel_transcoder_mask |=
-			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
-
 	/*
 	 * The pipe->transcoder mapping is fixed with the exception of the eDP
 	 * and DSI transcoders handled below.
-- 
2.32.0

[Intel-gfx] [PATCH 09/16] drm/i915: Pimp HSW+ transcoder state readout

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Adjust the HSW+ transcoder state readout to just read through
all the possible transcoders for the pipe, and stuff the results
in a bitmask.

We can conveniently cross check the bitmask for invalid
combinations of enabled transcoders, and later we can easily
extend the bitmask readout to handle the bigjoiner case.

One slight change in behaviour is that we no longer read out
the AONOFF->force_pfit.pfit bit for all the enabled "panel
transcoders". But having more than one enabled would anyway
be illegal so no big loss. Also the AONOFF selection should
only ever be used on HSW, which only has the EDP transcoder
an no DSI transcoders.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 130 ++++++++++++++-----
 1 file changed, 95 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3848f7963cec..2430142b0337 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5577,6 +5577,21 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
 	return ret;
 }
 
+static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
+					   enum transcoder cpu_transcoder)
+{
+	enum intel_display_power_domain power_domain;
+	intel_wakeref_t wakeref;
+	u32 tmp = 0;
+
+	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
+
+	with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+
+	return tmp & TRANS_DDI_FUNC_ENABLE;
+}
+
 static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 {
 	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
@@ -5587,55 +5602,39 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 	return panel_transcoder_mask;
 }
 
-static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
-				     struct intel_crtc_state *pipe_config,
-				     struct intel_display_power_domain_set *power_domain_set)
+static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 {
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
-	unsigned long enabled_panel_transcoders = 0;
-	enum transcoder panel_transcoder;
-	u32 tmp;
-
-	/*
-	 * The pipe->transcoder mapping is fixed with the exception of the eDP
-	 * and DSI transcoders handled below.
-	 */
-	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
+	enum transcoder cpu_transcoder;
+	u8 enabled_transcoders = 0;
 
 	/*
 	 * XXX: Do intel_display_power_get_if_enabled before reading this (for
 	 * consistency and less surprising code; it's in always on power).
 	 */
-	for_each_cpu_transcoder_masked(dev_priv, panel_transcoder,
+	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder,
 				       panel_transcoder_mask) {
-		bool force_thru = false;
+		enum intel_display_power_domain power_domain;
+		intel_wakeref_t wakeref;
 		enum pipe trans_pipe;
+		u32 tmp = 0;
+
+		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
+		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+			tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
 
-		tmp = intel_de_read(dev_priv,
-				    TRANS_DDI_FUNC_CTL(panel_transcoder));
 		if (!(tmp & TRANS_DDI_FUNC_ENABLE))
 			continue;
 
-		/*
-		 * Log all enabled ones, only use the first one.
-		 *
-		 * FIXME: This won't work for two separate DSI displays.
-		 */
-		enabled_panel_transcoders |= BIT(panel_transcoder);
-		if (enabled_panel_transcoders != BIT(panel_transcoder))
-			continue;
-
 		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
 		default:
 			drm_WARN(dev, 1,
 				 "unknown pipe linked to transcoder %s\n",
-				 transcoder_name(panel_transcoder));
+				 transcoder_name(cpu_transcoder));
 			fallthrough;
 		case TRANS_DDI_EDP_INPUT_A_ONOFF:
-			force_thru = true;
-			fallthrough;
 		case TRANS_DDI_EDP_INPUT_A_ON:
 			trans_pipe = PIPE_A;
 			break;
@@ -5650,22 +5649,83 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 			break;
 		}
 
-		if (trans_pipe == crtc->pipe) {
-			pipe_config->cpu_transcoder = panel_transcoder;
-			pipe_config->pch_pfit.force_thru = force_thru;
-		}
+		if (trans_pipe == crtc->pipe)
+			enabled_transcoders |= BIT(cpu_transcoder);
 	}
 
+	cpu_transcoder = (enum transcoder) crtc->pipe;
+	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
+		enabled_transcoders |= BIT(cpu_transcoder);
+
+	return enabled_transcoders;
+}
+
+static bool has_edp_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & BIT(TRANSCODER_EDP);
+}
+
+static bool has_dsi_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & (BIT(TRANSCODER_DSI_0) |
+				      BIT(TRANSCODER_DSI_1));
+}
+
+static bool has_pipe_transcoders(u8 enabled_transcoders)
+{
+	return enabled_transcoders & ~(BIT(TRANSCODER_EDP) |
+				       BIT(TRANSCODER_DSI_0) |
+				       BIT(TRANSCODER_DSI_1));
+}
+
+static void assert_enabled_transcoders(struct drm_i915_private *i915,
+				       u8 enabled_transcoders)
+{
+	/* Only one type of transcoder please */
+	drm_WARN_ON(&i915->drm,
+		    has_edp_transcoders(enabled_transcoders) +
+		    has_dsi_transcoders(enabled_transcoders) +
+		    has_pipe_transcoders(enabled_transcoders) > 1);
+
+	/* Only DSI transcoders can be ganged */
+	drm_WARN_ON(&i915->drm,
+		    !has_dsi_transcoders(enabled_transcoders) &&
+		    !is_power_of_2(enabled_transcoders));
+}
+
+static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
+				     struct intel_crtc_state *pipe_config,
+				     struct intel_display_power_domain_set *power_domain_set)
+{
+	struct drm_device *dev = crtc->base.dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	unsigned long enabled_transcoders;
+	u32 tmp;
+
+	enabled_transcoders = hsw_enabled_transcoders(crtc);
+	if (!enabled_transcoders)
+		return false;
+
+	assert_enabled_transcoders(dev_priv, enabled_transcoders);
+
 	/*
-	 * Valid combos: none, eDP, DSI0, DSI1, DSI0+DSI1
+	 * With the exception of DSI we should only ever have
+	 * a single enabled transcoder. With DSI let's just
+	 * pick the first one.
 	 */
-	drm_WARN_ON(dev, (enabled_panel_transcoders & BIT(TRANSCODER_EDP)) &&
-		    enabled_panel_transcoders != BIT(TRANSCODER_EDP));
+	pipe_config->cpu_transcoder = ffs(enabled_transcoders) - 1;
 
 	if (!intel_display_power_get_in_set_if_enabled(dev_priv, power_domain_set,
 						       POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
 		return false;
 
+	if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) {
+		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
+
+		if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == TRANS_DDI_EDP_INPUT_A_ONOFF)
+			pipe_config->pch_pfit.force_thru = true;
+	}
+
 	tmp = intel_de_read(dev_priv, PIPECONF(pipe_config->cpu_transcoder));
 
 	return tmp & PIPECONF_ENABLE;
-- 
2.32.0

[Intel-gfx] [PATCH 10/16] drm/i915: Configure TRANSCONF just the once with bigjoiner

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's not configure the single transcoder's TRANSCONF multiple
times with bigjoiner. No real harm I suppose but since we already
have the bigjoiner if statement directly above might as well suck
this in there and skip the redundant programming.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2430142b0337..24214e6249a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3059,10 +3059,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 						     &new_crtc_state->fdi_m_n, NULL);
 
 		hsw_set_frame_start_delay(new_crtc_state);
-	}
 
-	if (!transcoder_is_dsi(cpu_transcoder))
 		hsw_set_transconf(new_crtc_state);
+	}
 
 	crtc->active = true;
 
-- 
2.32.0

[Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add a helper to determine the master crtc for bigjoiner usage.
Also name the variables consistently.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     |  6 +--
 drivers/gpu/drm/i915/display/intel_display.c | 57 +++++++++++---------
 2 files changed, 33 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4f7420dda8b5..4fbffce501dc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2882,12 +2882,10 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
 	}
 
 	if (old_crtc_state->bigjoiner_linked_crtc) {
-		struct intel_atomic_state *state =
-			to_intel_atomic_state(old_crtc_state->uapi.state);
-		struct intel_crtc *slave =
+		struct intel_crtc *slave_crtc =
 			old_crtc_state->bigjoiner_linked_crtc;
 		const struct intel_crtc_state *old_slave_crtc_state =
-			intel_atomic_get_old_crtc_state(state, slave);
+			intel_atomic_get_old_crtc_state(state, slave_crtc);
 
 		intel_crtc_vblank_off(old_slave_crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 24214e6249a9..a5450ac9e2d0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -227,6 +227,14 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
 		is_trans_port_sync_slave(crtc_state);
 }
 
+static struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
+{
+	if (crtc_state->bigjoiner_slave)
+		return crtc_state->bigjoiner_linked_crtc;
+	else
+		return to_intel_crtc(crtc_state->uapi.crtc);
+}
+
 static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
 				    enum pipe pipe)
 {
@@ -2978,21 +2986,19 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
 static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
 					 const struct intel_crtc_state *crtc_state)
 {
-	struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
-	struct drm_i915_private *dev_priv = to_i915(master->base.dev);
+	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 	struct intel_crtc_state *master_crtc_state;
+	struct intel_crtc *master_crtc;
 	struct drm_connector_state *conn_state;
 	struct drm_connector *conn;
 	struct intel_encoder *encoder = NULL;
 	int i;
 
-	if (crtc_state->bigjoiner_slave)
-		master = crtc_state->bigjoiner_linked_crtc;
-
-	master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+	master_crtc = intel_master_crtc(crtc_state);
+	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
 
 	for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
-		if (conn_state->crtc != &master->base)
+		if (conn_state->crtc != &master_crtc->base)
 			continue;
 
 		encoder = to_intel_encoder(conn_state->best_encoder);
@@ -3006,10 +3012,10 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
 		/*
 		 * Enable sequence steps 1-7 on bigjoiner master
 		 */
-		intel_encoders_pre_pll_enable(state, master);
+		intel_encoders_pre_pll_enable(state, master_crtc);
 		if (master_crtc_state->shared_dpll)
 			intel_enable_shared_dpll(master_crtc_state);
-		intel_encoders_pre_enable(state, master);
+		intel_encoders_pre_enable(state, master_crtc);
 
 		/* and DSC on slave */
 		intel_dsc_enable(NULL, crtc_state);
@@ -8462,7 +8468,7 @@ verify_crtc_state(struct intel_crtc *crtc,
 	struct intel_encoder *encoder;
 	struct intel_crtc_state *pipe_config = old_crtc_state;
 	struct drm_atomic_state *state = old_crtc_state->uapi.state;
-	struct intel_crtc *master = crtc;
+	struct intel_crtc *master_crtc;
 
 	__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
 	intel_crtc_free_hw_state(old_crtc_state);
@@ -8490,10 +8496,9 @@ verify_crtc_state(struct intel_crtc *crtc,
 			"(expected %i, found %i)\n",
 			new_crtc_state->hw.active, crtc->active);
 
-	if (new_crtc_state->bigjoiner_slave)
-		master = new_crtc_state->bigjoiner_linked_crtc;
+	master_crtc = intel_master_crtc(new_crtc_state);
 
-	for_each_encoder_on_crtc(dev, &master->base, encoder) {
+	for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
 		enum pipe pipe;
 		bool active;
 
@@ -8503,7 +8508,7 @@ verify_crtc_state(struct intel_crtc *crtc,
 				encoder->base.base.id, active,
 				new_crtc_state->hw.active);
 
-		I915_STATE_WARN(active && master->pipe != pipe,
+		I915_STATE_WARN(active && master_crtc->pipe != pipe,
 				"Encoder connected to wrong pipe %c\n",
 				pipe_name(pipe));
 
@@ -9192,13 +9197,13 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
 					struct intel_crtc_state *new_crtc_state)
 {
 	struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
-	struct intel_crtc *slave, *master;
+	struct intel_crtc *slave_crtc, *master_crtc;
 
 	/* slave being enabled, is master is still claiming this crtc? */
 	if (old_crtc_state->bigjoiner_slave) {
-		slave = crtc;
-		master = old_crtc_state->bigjoiner_linked_crtc;
-		master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
+		slave_crtc = crtc;
+		master_crtc = old_crtc_state->bigjoiner_linked_crtc;
+		master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
 		if (!master_crtc_state || !intel_crtc_needs_modeset(master_crtc_state))
 			goto claimed;
 	}
@@ -9206,17 +9211,17 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
 	if (!new_crtc_state->bigjoiner)
 		return 0;
 
-	slave = intel_dsc_get_bigjoiner_secondary(crtc);
-	if (!slave) {
+	slave_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
+	if (!slave_crtc) {
 		DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
 			      "CRTC + 1 to be used, doesn't exist\n",
 			      crtc->base.base.id, crtc->base.name);
 		return -EINVAL;
 	}
 
-	new_crtc_state->bigjoiner_linked_crtc = slave;
-	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
-	master = crtc;
+	new_crtc_state->bigjoiner_linked_crtc = slave_crtc;
+	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave_crtc);
+	master_crtc = crtc;
 	if (IS_ERR(slave_crtc_state))
 		return PTR_ERR(slave_crtc_state);
 
@@ -9225,15 +9230,15 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
 		goto claimed;
 
 	DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
-		      slave->base.base.id, slave->base.name);
+		      slave_crtc->base.base.id, slave_crtc->base.name);
 
 	return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
 
 claimed:
 	DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
 		      "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
-		      slave->base.base.id, slave->base.name,
-		      master->base.base.id, master->base.name);
+		      slave_crtc->base.base.id, slave_crtc->base.name,
+		      master_crtc->base.base.id, master_crtc->base.name);
 	return -EINVAL;
 }
 
-- 
2.32.0

[Intel-gfx] [PATCH 12/16] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rewrite intel_crtc_copy_uapi_to_hw_state_nomodeset() in a
slightly more straightforward manner.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a5450ac9e2d0..5716085e15f5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7347,18 +7347,15 @@ static void
 intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
 					   struct intel_crtc_state *crtc_state)
 {
-	const struct intel_crtc_state *from_crtc_state = crtc_state;
+	const struct intel_crtc_state *master_crtc_state;
+	struct intel_crtc *master_crtc;
 
-	if (crtc_state->bigjoiner_slave) {
-		from_crtc_state = intel_atomic_get_new_crtc_state(state,
-								  crtc_state->bigjoiner_linked_crtc);
+	master_crtc = intel_master_crtc(crtc_state);
+	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
 
-		/* No need to copy state if the master state is unchanged */
-		if (!from_crtc_state)
-			return;
-	}
-
-	intel_crtc_copy_color_blobs(crtc_state, from_crtc_state);
+	/* No need to copy state if the master state is unchanged */
+	if (master_crtc_state)
+		intel_crtc_copy_color_blobs(crtc_state, master_crtc_state);
 }
 
 static void
-- 
2.32.0

[Intel-gfx] [PATCH 13/16] drm/i915: Split PPS write from DSC enable

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The PPS SDP is fed into the transcoder whereas the DSC
block is (or at least can be) per pipe. Let's split these
into two distinct operations in an effort to untagle the
bigjoiner mess where we have two pipes feeding a single
transcoder.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c       |  6 ++--
 drivers/gpu/drm/i915/display/intel_ddi.c     | 14 +++++++--
 drivers/gpu/drm/i915/display/intel_display.c |  5 ++-
 drivers/gpu/drm/i915/display/intel_dp.c      |  2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c    | 33 +++++++++-----------
 drivers/gpu/drm/i915/display/intel_vdsc.h    | 10 +++---
 6 files changed, 39 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 060bc8fb0d30..070ad144ef83 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1246,7 +1246,9 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
 	/* step5: program and powerup panel */
 	gen11_dsi_powerup_panel(encoder);
 
-	intel_dsc_enable(encoder, pipe_config);
+	intel_dsc_dsi_pps_write(encoder, pipe_config);
+
+	intel_dsc_enable(pipe_config);
 
 	/* step6c: configure transcoder timings */
 	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
@@ -1636,7 +1638,7 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
 	/* FIXME: initialize from VBT */
 	vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
 
-	ret = intel_dsc_compute_params(encoder, crtc_state);
+	ret = intel_dsc_compute_params(crtc_state);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4fbffce501dc..f51c5d732d41 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2434,7 +2434,10 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
 
 	/* 5.k Configure and enable FEC if needed */
 	intel_ddi_enable_fec(encoder, crtc_state);
-	intel_dsc_enable(encoder, crtc_state);
+
+	intel_dsc_dp_pps_write(encoder, crtc_state);
+
+	intel_dsc_enable(crtc_state);
 }
 
 static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2575,8 +2578,11 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 
 	/* 7.l Configure and enable FEC if needed */
 	intel_ddi_enable_fec(encoder, crtc_state);
+
+	intel_dsc_dp_pps_write(encoder, crtc_state);
+
 	if (!crtc_state->bigjoiner)
-		intel_dsc_enable(encoder, crtc_state);
+		intel_dsc_enable(crtc_state);
 }
 
 static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2641,8 +2647,10 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
 	if (!is_mst)
 		intel_ddi_enable_pipe_clock(encoder, crtc_state);
 
+	intel_dsc_dp_pps_write(encoder, crtc_state);
+
 	if (!crtc_state->bigjoiner)
-		intel_dsc_enable(encoder, crtc_state);
+		intel_dsc_enable(crtc_state);
 }
 
 static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5716085e15f5..4e659a103984 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3007,7 +3007,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
 
 	if (!crtc_state->bigjoiner_slave) {
 		/* need to enable VDSC, which we skipped in pre-enable */
-		intel_dsc_enable(encoder, crtc_state);
+		intel_dsc_enable(crtc_state);
 	} else {
 		/*
 		 * Enable sequence steps 1-7 on bigjoiner master
@@ -3017,8 +3017,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
 			intel_enable_shared_dpll(master_crtc_state);
 		intel_encoders_pre_enable(state, master_crtc);
 
-		/* and DSC on slave */
-		intel_dsc_enable(NULL, crtc_state);
+		intel_dsc_enable(crtc_state);
 	}
 
 	if (DISPLAY_VER(dev_priv) >= 13)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e898834cc5f9..68ddd9a490e2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1260,7 +1260,7 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
 	else
 		vdsc_cfg->slice_height = 2;
 
-	ret = intel_dsc_compute_params(encoder, crtc_state);
+	ret = intel_dsc_compute_params(crtc_state);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 2275f99ce9d7..fa84be609d5d 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -442,10 +442,10 @@ calculate_rc_params(struct rc_parameters *rc,
 	}
 }
 
-int intel_dsc_compute_params(struct intel_encoder *encoder,
-			     struct intel_crtc_state *pipe_config)
+int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
 {
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
 	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
 	const struct rc_parameters *rc_params;
@@ -1055,8 +1055,8 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
 	}
 }
 
-static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
-				    const struct intel_crtc_state *crtc_state)
+void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+			     const struct intel_crtc_state *crtc_state)
 {
 	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
@@ -1064,6 +1064,9 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
 	struct drm_dsc_picture_parameter_set pps;
 	enum port port;
 
+	if (!crtc_state->dsc.compression_enable)
+		return;
+
 	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);
 
 	for_each_dsi_port(port, intel_dsi->ports) {
@@ -1074,14 +1077,16 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
-				   const struct intel_crtc_state *crtc_state)
+void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+			    const struct intel_crtc_state *crtc_state)
 {
-	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
 	struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
 
+	if (!crtc_state->dsc.compression_enable)
+		return;
+
 	/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
 	drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp.pps_header);
 
@@ -1142,8 +1147,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
 	}
 }
 
-void intel_dsc_enable(struct intel_encoder *encoder,
-		      const struct intel_crtc_state *crtc_state)
+void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1155,13 +1159,6 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 
 	intel_dsc_pps_configure(crtc_state);
 
-	if (!crtc_state->bigjoiner_slave) {
-		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
-			intel_dsc_dsi_pps_write(encoder, crtc_state);
-		else
-			intel_dsc_dp_pps_write(encoder, crtc_state);
-	}
-
 	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
 	if (crtc_state->dsc.dsc_split) {
 		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 0c5d80a572da..4ec75f715986 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -15,15 +15,17 @@ struct intel_encoder;
 
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
-void intel_dsc_enable(struct intel_encoder *encoder,
-		      const struct intel_crtc_state *crtc_state);
+void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-int intel_dsc_compute_params(struct intel_encoder *encoder,
-			     struct intel_crtc_state *pipe_config);
+int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
 void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
 void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
 enum intel_display_power_domain
 intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
 struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
+void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+			     const struct intel_crtc_state *crtc_state);
+void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
+			    const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_VDSC_H__ */
-- 
2.32.0

[Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Read out cpu_transcoder correctly for the bigjoiner slave pipes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 66 ++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4e659a103984..25ae9e4f6b66 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5581,6 +5581,16 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
 	return ret;
 }
 
+static u8 bigjoiner_pipes(struct drm_i915_private *i915)
+{
+	if (DISPLAY_VER(i915) >= 12)
+		return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
+	else if (DISPLAY_VER(i915) >= 11)
+		return BIT(PIPE_B) | BIT(PIPE_C);
+	else
+		return 0;
+}
+
 static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
 					   enum transcoder cpu_transcoder)
 {
@@ -5596,6 +5606,54 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
 	return tmp & TRANS_DDI_FUNC_ENABLE;
 }
 
+static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
+{
+	u8 master_pipes = 0, slave_pipes = 0;
+	struct intel_crtc *crtc;
+
+	for_each_intel_crtc(&dev_priv->drm, crtc) {
+		enum intel_display_power_domain power_domain;
+		enum pipe pipe = crtc->pipe;
+		intel_wakeref_t wakeref;
+
+		if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
+			continue;
+
+		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
+		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
+			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
+
+			if (!(tmp & BIG_JOINER_ENABLE))
+				continue;
+
+			if (tmp & MASTER_BIG_JOINER_ENABLE)
+				master_pipes |= BIT(pipe);
+			else
+				slave_pipes |= BIT(pipe);
+		}
+
+		if (DISPLAY_VER(dev_priv) < 13)
+			continue;
+
+		power_domain = POWER_DOMAIN_PIPE(pipe);
+		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
+			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
+
+			if (tmp & UNCOMPRESSED_JOINER_MASTER)
+				master_pipes |= BIT(pipe);
+			if (tmp & UNCOMPRESSED_JOINER_SLAVE)
+				slave_pipes |= BIT(pipe);
+		}
+	}
+
+	/* Bigjoiner pipes should always be consecutive master and slave */
+	drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
+		 "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
+		 master_pipes, slave_pipes);
+
+	return slave_pipes;
+}
+
 static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
 {
 	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
@@ -5657,10 +5715,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 			enabled_transcoders |= BIT(cpu_transcoder);
 	}
 
+	/* single pipe or bigjoiner master */
 	cpu_transcoder = (enum transcoder) crtc->pipe;
 	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
 		enabled_transcoders |= BIT(cpu_transcoder);
 
+	/* bigjoiner slave -> consider the master pipe's transcoder as well */
+	if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
+		cpu_transcoder = (enum transcoder) crtc->pipe - 1;
+		if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
+			enabled_transcoders |= BIT(cpu_transcoder);
+	}
+
 	return enabled_transcoders;
 }
 
-- 
2.32.0

[Intel-gfx] [PATCH 15/16] drm/i915: Reduce bigjoiner special casing

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Try to make bigjoiner pipes less special.

The main things here are that each pipe now does full
clock computation/readout with its own shared_dpll reference.
Also every pipe's cpu_transcoder always points correctly
at the master transcoder.

Due to the above changes state readout is now complete
and all the related hacks can go away. The actual modeset
sequence code is still a mess, but I think in order to clean
that up properly we're probably going to have to redesign
the modeset logic to treat transcoders vs. pipes separately.
That is going to require significant amounts of work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     |  16 +--
 drivers/gpu/drm/i915/display/intel_display.c | 132 ++++++-------------
 2 files changed, 40 insertions(+), 108 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index f51c5d732d41..6a068a57f6d2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3615,18 +3615,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
 	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
 		return;
 
-	if (pipe_config->bigjoiner_slave) {
-		/* read out pipe settings from master */
-		enum transcoder save = pipe_config->cpu_transcoder;
-
-		/* Our own transcoder needs to be disabled when reading it in intel_ddi_read_func_ctl() */
-		WARN_ON(pipe_config->output_types);
-		pipe_config->cpu_transcoder = (enum transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
-		intel_ddi_read_func_ctl(encoder, pipe_config);
-		pipe_config->cpu_transcoder = save;
-	} else {
-		intel_ddi_read_func_ctl(encoder, pipe_config);
-	}
+	intel_ddi_read_func_ctl(encoder, pipe_config);
 
 	intel_ddi_mso_get_config(encoder, pipe_config);
 
@@ -3654,8 +3643,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
 	}
 
-	if (!pipe_config->bigjoiner_slave)
-		ddi_dotclock_get(pipe_config);
+	ddi_dotclock_get(pipe_config);
 
 	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
 		pipe_config->lane_lat_optim_mask =
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 25ae9e4f6b66..17d12d12bc0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2027,15 +2027,17 @@ struct intel_encoder *
 intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
 			   const struct intel_crtc_state *crtc_state)
 {
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	const struct drm_connector_state *connector_state;
 	const struct drm_connector *connector;
 	struct intel_encoder *encoder = NULL;
+	struct intel_crtc *master_crtc;
 	int num_encoders = 0;
 	int i;
 
+	master_crtc = intel_master_crtc(crtc_state);
+
 	for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
-		if (connector_state->crtc != &crtc->base)
+		if (connector_state->crtc != &master_crtc->base)
 			continue;
 
 		encoder = to_intel_encoder(connector_state->best_encoder);
@@ -2044,7 +2046,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
 
 	drm_WARN(encoder->base.dev, num_encoders != 1,
 		 "%d encoders for pipe %c\n",
-		 num_encoders, pipe_name(crtc->pipe));
+		 num_encoders, pipe_name(master_crtc->pipe));
 
 	return encoder;
 }
@@ -3005,20 +3007,20 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
 		break;
 	}
 
-	if (!crtc_state->bigjoiner_slave) {
-		/* need to enable VDSC, which we skipped in pre-enable */
-		intel_dsc_enable(crtc_state);
-	} else {
-		/*
-		 * Enable sequence steps 1-7 on bigjoiner master
-		 */
+	/*
+	 * Enable sequence steps 1-7 on bigjoiner master
+	 */
+	if (crtc_state->bigjoiner_slave)
 		intel_encoders_pre_pll_enable(state, master_crtc);
-		if (master_crtc_state->shared_dpll)
-			intel_enable_shared_dpll(master_crtc_state);
+
+	if (crtc_state->shared_dpll)
+		intel_enable_shared_dpll(crtc_state);
+
+	if (crtc_state->bigjoiner_slave)
 		intel_encoders_pre_enable(state, master_crtc);
 
-		intel_dsc_enable(crtc_state);
-	}
+	/* need to enable VDSC, which we skipped in pre-enable */
+	intel_dsc_enable(crtc_state);
 
 	if (DISPLAY_VER(dev_priv) >= 13)
 		intel_uncompressed_joiner_enable(crtc_state);
@@ -3201,12 +3203,17 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
 static void hsw_crtc_disable(struct intel_atomic_state *state,
 			     struct intel_crtc *crtc)
 {
+	const struct intel_crtc_state *old_crtc_state =
+		intel_atomic_get_old_crtc_state(state, crtc);
+
 	/*
 	 * FIXME collapse everything to one hook.
 	 * Need care with mst->ddi interactions.
 	 */
-	intel_encoders_disable(state, crtc);
-	intel_encoders_post_disable(state, crtc);
+	if (!old_crtc_state->bigjoiner_slave) {
+		intel_encoders_disable(state, crtc);
+		intel_encoders_post_disable(state, crtc);
+	}
 }
 
 static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -5912,17 +5919,10 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
 	if (DISPLAY_VER(dev_priv) >= 13 && !pipe_config->dsc.compression_enable)
 		intel_uncompressed_joiner_get_config(pipe_config);
 
-	if (!active) {
-		/* bigjoiner slave doesn't enable transcoder */
-		if (!pipe_config->bigjoiner_slave)
-			goto out;
+	if (!active)
+		goto out;
 
-		active = true;
-		pipe_config->pixel_multiplier = 1;
-
-		/* we cannot read out most state, so don't bother.. */
-		pipe_config->quirks |= PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE;
-	} else if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
+	if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
 	    DISPLAY_VER(dev_priv) >= 11) {
 		hsw_get_ddi_port_state(crtc, pipe_config);
 		intel_get_transcoder_timings(crtc, pipe_config);
@@ -5994,10 +5994,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
 		}
 	}
 
-	if (pipe_config->bigjoiner_slave) {
-		/* Cannot be read out as a slave, set to 0. */
-		pipe_config->pixel_multiplier = 0;
-	} else if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
+	if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
 	    !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
 		pipe_config->pixel_multiplier =
 			intel_de_read(dev_priv,
@@ -6845,7 +6842,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
 
 	if (mode_changed && crtc_state->hw.enable &&
 	    dev_priv->display.crtc_compute_clock &&
-	    !crtc_state->bigjoiner_slave &&
 	    !drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
 		ret = dev_priv->display.crtc_compute_clock(crtc_state);
 		if (ret)
@@ -7463,7 +7459,6 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
 			  const struct intel_crtc_state *from_crtc_state)
 {
 	struct intel_crtc_state *saved_state;
-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
 	saved_state = kmemdup(from_crtc_state, sizeof(*saved_state), GFP_KERNEL);
 	if (!saved_state)
@@ -7493,8 +7488,8 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
 	crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state->update_planes = 0;
 	crtc_state->bigjoiner_linked_crtc = to_intel_crtc(from_crtc_state->uapi.crtc);
 	crtc_state->bigjoiner_slave = true;
-	crtc_state->cpu_transcoder = (enum transcoder)crtc->pipe;
-	crtc_state->has_audio = false;
+	crtc_state->cpu_transcoder = from_crtc_state->cpu_transcoder;
+	crtc_state->has_audio = from_crtc_state->has_audio;
 
 	return 0;
 }
@@ -8581,10 +8576,6 @@ verify_crtc_state(struct intel_crtc *crtc,
 	if (!new_crtc_state->hw.active)
 		return;
 
-	if (new_crtc_state->bigjoiner_slave)
-		/* No PLLs set for slave */
-		pipe_config->shared_dpll = NULL;
-
 	intel_pipe_config_sanity_check(dev_priv, pipe_config);
 
 	if (!intel_pipe_config_compare(new_crtc_state,
@@ -8703,9 +8694,6 @@ verify_mpllb_state(struct intel_atomic_state *state,
 	if (!new_crtc_state->hw.active)
 		return;
 
-	if (new_crtc_state->bigjoiner_slave)
-		return;
-
 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
 	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
 
@@ -9915,16 +9903,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 {
 	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 
-	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
-
-	/*
-	 * We still need special handling for disabling bigjoiner master
-	 * and slaves since for slave we do not have encoder or plls
-	 * so we dont need to disable those.
-	 */
-	if (old_crtc_state->bigjoiner)
-		old_crtc_state->bigjoiner_linked_crtc->active = false;
-
 	/*
 	 * We need to disable pipe CRC before disabling the pipe,
 	 * or we race against vblank off.
@@ -9965,7 +9943,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 	/* Only disable port sync and MST slaves */
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
 					    new_crtc_state, i) {
-		if (!intel_crtc_needs_modeset(new_crtc_state) || old_crtc_state->bigjoiner)
+		if (!intel_crtc_needs_modeset(new_crtc_state))
 			continue;
 
 		if (!old_crtc_state->hw.active)
@@ -9977,7 +9955,8 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 		 * Slave vblanks are masked till Master Vblanks.
 		 */
 		if (!is_trans_port_sync_slave(old_crtc_state) &&
-		    !intel_dp_mst_is_slave_trans(old_crtc_state))
+		    !intel_dp_mst_is_slave_trans(old_crtc_state) &&
+		    !old_crtc_state->bigjoiner_slave)
 			continue;
 
 		intel_old_crtc_state_disables(state, old_crtc_state,
@@ -9989,13 +9968,14 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
 					    new_crtc_state, i) {
 		if (!intel_crtc_needs_modeset(new_crtc_state) ||
-		    (handled & BIT(crtc->pipe)) ||
-		    old_crtc_state->bigjoiner_slave)
+		    (handled & BIT(crtc->pipe)))
 			continue;
 
-		if (old_crtc_state->hw.active)
-			intel_old_crtc_state_disables(state, old_crtc_state,
-						      new_crtc_state, crtc);
+		if (!old_crtc_state->hw.active)
+			continue;
+
+		intel_old_crtc_state_disables(state, old_crtc_state,
+					      new_crtc_state, crtc);
 	}
 }
 
@@ -12373,9 +12353,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 		struct intel_plane *plane;
 		int min_cdclk = 0;
 
-		if (crtc_state->bigjoiner_slave)
-			continue;
-
 		if (crtc_state->hw.active) {
 			/*
 			 * The initial mode needs to be set in order to keep
@@ -12435,39 +12412,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 		intel_bw_crtc_update(bw_state, crtc_state);
 
 		intel_pipe_config_sanity_check(dev_priv, crtc_state);
-
-		/* discard our incomplete slave state, copy it from master */
-		if (crtc_state->bigjoiner && crtc_state->hw.active) {
-			struct intel_crtc *slave = crtc_state->bigjoiner_linked_crtc;
-			struct intel_crtc_state *slave_crtc_state =
-				to_intel_crtc_state(slave->base.state);
-
-			copy_bigjoiner_crtc_state(slave_crtc_state, crtc_state);
-			slave->base.mode = crtc->base.mode;
-
-			cdclk_state->min_cdclk[slave->pipe] = min_cdclk;
-			cdclk_state->min_voltage_level[slave->pipe] =
-				crtc_state->min_voltage_level;
-
-			for_each_intel_plane_on_crtc(&dev_priv->drm, slave, plane) {
-				const struct intel_plane_state *plane_state =
-					to_intel_plane_state(plane->base.state);
-
-				/*
-				 * FIXME don't have the fb yet, so can't
-				 * use intel_plane_data_rate() :(
-				 */
-				if (plane_state->uapi.visible)
-					crtc_state->data_rate[plane->id] =
-						4 * crtc_state->pixel_rate;
-				else
-					crtc_state->data_rate[plane->id] = 0;
-			}
-
-			intel_bw_crtc_update(bw_state, slave_crtc_state);
-			drm_calc_timestamping_constants(&slave->base,
-							&slave_crtc_state->hw.adjusted_mode);
-		}
 	}
 }
 
-- 
2.32.0

[Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Now that the bigjoiner state readout/computation has been
made to do the right thing nuke the related state checker
quirk.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c  | 105 ++++++++----------
 .../drm/i915/display/intel_display_types.h    |   1 -
 2 files changed, 47 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 17d12d12bc0a..a6d1d6fbaeef 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8087,51 +8087,48 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
 	PIPE_CONF_CHECK_X(output_types);
 
-	/* FIXME do the readout properly and get rid of this quirk */
-	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
 
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
-		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
+	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
 
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
 
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
-		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
+	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
 
-		PIPE_CONF_CHECK_I(pixel_multiplier);
+	PIPE_CONF_CHECK_I(pixel_multiplier);
 
-		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
-				      DRM_MODE_FLAG_INTERLACE);
+	PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+			      DRM_MODE_FLAG_INTERLACE);
 
-		if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
-			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
-					      DRM_MODE_FLAG_PHSYNC);
-			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
-					      DRM_MODE_FLAG_NHSYNC);
-			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
-					      DRM_MODE_FLAG_PVSYNC);
-			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
-					      DRM_MODE_FLAG_NVSYNC);
-		}
+	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
+		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+				      DRM_MODE_FLAG_PHSYNC);
+		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+				      DRM_MODE_FLAG_NHSYNC);
+		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+				      DRM_MODE_FLAG_PVSYNC);
+		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
+				      DRM_MODE_FLAG_NVSYNC);
 	}
 
 	PIPE_CONF_CHECK_I(output_format);
@@ -8143,9 +8140,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
 	PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
 	PIPE_CONF_CHECK_BOOL(has_infoframe);
-	/* FIXME do the readout properly and get rid of this quirk */
-	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
-		PIPE_CONF_CHECK_BOOL(fec_enable);
+	PIPE_CONF_CHECK_BOOL(fec_enable);
 
 	PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
 
@@ -8174,9 +8169,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 		}
 
 		PIPE_CONF_CHECK_I(scaler_state.scaler_id);
-		/* FIXME do the readout properly and get rid of this quirk */
-		if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
-			PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
+		PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
 
 		PIPE_CONF_CHECK_X(gamma_mode);
 		if (IS_CHERRYVIEW(dev_priv))
@@ -8201,11 +8194,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
 	PIPE_CONF_CHECK_BOOL(double_wide);
 
-	if (dev_priv->dpll.mgr)
+	if (dev_priv->dpll.mgr) {
 		PIPE_CONF_CHECK_P(shared_dpll);
 
-	/* FIXME do the readout properly and get rid of this quirk */
-	if (dev_priv->dpll.mgr && !PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
 		PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
 		PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
 		PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
@@ -8239,19 +8230,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 		PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
 	}
 
-	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
-		PIPE_CONF_CHECK_X(dsi_pll.ctrl);
-		PIPE_CONF_CHECK_X(dsi_pll.div);
+	PIPE_CONF_CHECK_X(dsi_pll.ctrl);
+	PIPE_CONF_CHECK_X(dsi_pll.div);
 
-		if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
-			PIPE_CONF_CHECK_I(pipe_bpp);
+	if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
+		PIPE_CONF_CHECK_I(pipe_bpp);
 
-		PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
-		PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
-		PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
+	PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
+	PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
+	PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
 
-		PIPE_CONF_CHECK_I(min_voltage_level);
-	}
+	PIPE_CONF_CHECK_I(min_voltage_level);
 
 	if (fastset && (current_config->has_psr || pipe_config->has_psr))
 		PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 7d852affead1..ee45fc3b1672 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -938,7 +938,6 @@ struct intel_crtc_state {
 	 * accordingly.
 	 */
 #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS	(1<<0) /* unreliable sync mode.flags */
-#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE      (1<<1) /* bigjoiner slave, partial readout */
 	unsigned long quirks;
 
 	unsigned fb_bits; /* framebuffers to flip */
-- 
2.32.0

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix bigjoiner state readout

[Patchwork]

== Series Details ==

Series: drm/i915: Fix bigjoiner state readout
URL   : https://patchwork.freedesktop.org/series/94609/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
c2571575849c Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"
36568f62f4b3 drm/i915: Disable all planes before modesetting any pipes
9be6c55e57d1 drm/i915: Extract intel_dp_use_bigjoiner()
a3fc21d5d6df drm/i915: Flatten hsw_crtc_compute_clock()
9f3183ee9429 drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF
6e8de16f0343 drm/i915: Introduce with_intel_display_power_if_enabled()
-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:413:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:413:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

-:21: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#21: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:413:
+#define with_intel_display_power_if_enabled(i915, domain, wf) \
+	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
+	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)

total: 0 errors, 0 warnings, 3 checks, 10 lines checked
5adf1c1b4f21 drm/i915: Adjust intel_dsc_power_domain() calling convention
-:249: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#249: FILE: drivers/gpu/drm/i915/display/intel_vdsc.c:1141:
+		intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);

total: 0 errors, 1 warnings, 0 checks, 291 lines checked
d395994fdc73 drm/i915: Extract hsw_panel_transcoders()
f72fb22ecd92 drm/i915: Pimp HSW+ transcoder state readout
-:132: CHECK:SPACING: No space is necessary after a cast
#132: FILE: drivers/gpu/drm/i915/display/intel_display.c:5656:
+	cpu_transcoder = (enum transcoder) crtc->pipe;

total: 0 errors, 0 warnings, 1 checks, 178 lines checked
228d612ee392 drm/i915: Configure TRANSCONF just the once with bigjoiner
414928c8adbe drm/i915: Introduce intel_master_crtc()
4ac52967591b drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
c2e6e3a6e446 drm/i915: Split PPS write from DSC enable
d1e188d0f92d drm/i915: Perform correct cpu_transcoder readout for bigjoiner
-:52: CHECK:SPACING: No space is necessary after a cast
#52: FILE: drivers/gpu/drm/i915/display/intel_display.c:5622:
+		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);

-:101: CHECK:SPACING: No space is necessary after a cast
#101: FILE: drivers/gpu/drm/i915/display/intel_display.c:5725:
+		cpu_transcoder = (enum transcoder) crtc->pipe - 1;

total: 0 errors, 0 warnings, 2 checks, 88 lines checked
18329b38477a drm/i915: Reduce bigjoiner special casing
87e0b2b138a2 drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Souza, Jose]

On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Disabling planes in the middle of the modeset seuqnece does not make
> sense since userspace can anyway disable planes before the modeset
> even starts. So when the modeset seuqence starts the set of enabled
> planes is entirely arbitrary. Trying to sprinkle the plane disabling
> into the modeset sequence just means more randomness and potential
> for hard to reproduce bugs.

The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
I have other pending patch handling cases were userspace still has pipe enabled but no planes enabled.

> 
> So it makes most sense to just disable all planes first so that the
> rest of the modeset sequence remains identical regardless of which
> planes happen to be enabled by userspace at the time.

This is not what specification ask us to do and for Alderlake-P not following it causes underruns.

BSpec: 49190

> 
> This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 30 +++++++------------
>  drivers/gpu/drm/i915/display/intel_display.c  | 24 ---------------
>  .../drm/i915/display/intel_display_types.h    |  4 ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   | 14 ++-------
>  4 files changed, 13 insertions(+), 59 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 23ef291f7b30..c1fd7cbb40e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3164,6 +3164,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
>  
>  	intel_dp->link_trained = false;
>  
> +	if (old_crtc_state->has_audio)
> +		intel_audio_codec_disable(encoder,
> +					  old_crtc_state, old_conn_state);
> +
> +	intel_drrs_disable(intel_dp, old_crtc_state);
> +	intel_psr_disable(intel_dp, old_crtc_state);
>  	intel_edp_backlight_off(old_conn_state);
>  	/* Disable the decompression in DP Sink */
>  	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> @@ -3181,6 +3187,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>  	struct drm_connector *connector = old_conn_state->connector;
>  
> +	if (old_crtc_state->has_audio)
> +		intel_audio_codec_disable(encoder,
> +					  old_crtc_state, old_conn_state);
> +
>  	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
>  					       false, false))
>  		drm_dbg_kms(&i915->drm,
> @@ -3188,25 +3198,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
>  			    connector->base.id, connector->name);
>  }
>  
> -static void intel_pre_disable_ddi(struct intel_atomic_state *state,
> -				  struct intel_encoder *encoder,
> -				  const struct intel_crtc_state *old_crtc_state,
> -				  const struct drm_connector_state *old_conn_state)
> -{
> -	struct intel_dp *intel_dp;
> -
> -	if (old_crtc_state->has_audio)
> -		intel_audio_codec_disable(encoder, old_crtc_state,
> -					  old_conn_state);
> -
> -	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> -		return;
> -
> -	intel_dp = enc_to_intel_dp(encoder);
> -	intel_drrs_disable(intel_dp, old_crtc_state);
> -	intel_psr_disable(intel_dp, old_crtc_state);
> -}
> -
>  static void intel_disable_ddi(struct intel_atomic_state *state,
>  			      struct intel_encoder *encoder,
>  			      const struct intel_crtc_state *old_crtc_state,
> @@ -4541,7 +4532,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	encoder->enable = intel_enable_ddi;
>  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
>  	encoder->pre_enable = intel_ddi_pre_enable;
> -	encoder->pre_disable = intel_pre_disable_ddi;
>  	encoder->disable = intel_disable_ddi;
>  	encoder->post_disable = intel_ddi_post_disable;
>  	encoder->update_pipe = intel_ddi_update_pipe;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a7ca38613f89..cd150512d275 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2723,28 +2723,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
>  	}
>  }
>  
> -static void intel_encoders_pre_disable(struct intel_atomic_state *state,
> -				       struct intel_crtc *crtc)
> -{
> -	const struct intel_crtc_state *old_crtc_state =
> -		intel_atomic_get_old_crtc_state(state, crtc);
> -	const struct drm_connector_state *old_conn_state;
> -	struct drm_connector *conn;
> -	int i;
> -
> -	for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
> -		struct intel_encoder *encoder =
> -			to_intel_encoder(old_conn_state->best_encoder);
> -
> -		if (old_conn_state->crtc != &crtc->base)
> -			continue;
> -
> -		if (encoder->pre_disable)
> -			encoder->pre_disable(state, encoder, old_crtc_state,
> -					     old_conn_state);
> -	}
> -}
> -
>  static void intel_encoders_disable(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc)
>  {
> @@ -9807,8 +9785,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>  
>  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
>  
> -	intel_encoders_pre_disable(state, crtc);
> -
>  	intel_crtc_disable_planes(state, crtc);
>  
>  	/*
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e9e806d90eec..7d852affead1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -196,10 +196,6 @@ struct intel_encoder {
>  	void (*update_complete)(struct intel_atomic_state *,
>  				struct intel_encoder *,
>  				struct intel_crtc *);
> -	void (*pre_disable)(struct intel_atomic_state *,
> -			    struct intel_encoder *,
> -			    const struct intel_crtc_state *,
> -			    const struct drm_connector_state *);
>  	void (*disable)(struct intel_atomic_state *,
>  			struct intel_encoder *,
>  			const struct intel_crtc_state *,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index d104441344c0..914bea983a28 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
>  	drm_dp_check_act_status(&intel_dp->mst_mgr);
>  }
>  
> -static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
> -				     struct intel_encoder *encoder,
> -				     const struct intel_crtc_state *old_crtc_state,
> -				     const struct drm_connector_state *old_conn_state)
> -{
> -	if (old_crtc_state->has_audio)
> -		intel_audio_codec_disable(encoder, old_crtc_state,
> -					  old_conn_state);
> -}
> -
>  static void intel_mst_disable_dp(struct intel_atomic_state *state,
>  				 struct intel_encoder *encoder,
>  				 const struct intel_crtc_state *old_crtc_state,
> @@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
>  	if (ret) {
>  		drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
>  	}
> +	if (old_crtc_state->has_audio)
> +		intel_audio_codec_disable(encoder,
> +					  old_crtc_state, old_conn_state);
>  }
>  
>  static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> @@ -905,7 +898,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
>  
>  	intel_encoder->compute_config = intel_dp_mst_compute_config;
>  	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
> -	intel_encoder->pre_disable = intel_mst_pre_disable_dp;
>  	intel_encoder->disable = intel_mst_disable_dp;
>  	intel_encoder->post_disable = intel_mst_post_disable_dp;
>  	intel_encoder->update_pipe = intel_ddi_update_pipe;

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix bigjoiner state readout

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4414 bytes --]

== Series Details ==

Series: drm/i915: Fix bigjoiner state readout
URL   : https://patchwork.freedesktop.org/series/94609/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10574 -> Patchwork_21023
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/index.html

Known issues
------------

  Here are the changes found in Patchwork_21023 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +10 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [PASS][2] -> [INCOMPLETE][3] ([i915#3921])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload:
    - fi-tgl-y:           [DMESG-WARN][4] ([i915#1982]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/fi-tgl-y/igt@i915_module_load@reload.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/fi-tgl-y/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@hangcheck:
    - {fi-hsw-gt1}:       [DMESG-WARN][6] ([i915#3303]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-rkl-guc:         [FAIL][8] ([i915#3983]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/fi-rkl-guc/igt@kms_force_connector_basic@force-connector-state.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/fi-rkl-guc/igt@kms_force_connector_basic@force-connector-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#3983]: https://gitlab.freedesktop.org/drm/intel/issues/3983


Participating hosts (44 -> 38)
------------------------------

  Missing    (6): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-4 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10574 -> Patchwork_21023

  CI-20190529: 20190529
  CI_DRM_10574: 3ad0415f7f7a68058d5ff02d8a7ac51d8b542cf9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6204: 1084c5eb74fd0daf8c9b8e83e85f5208c396579b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21023: 87e0b2b138a24fe72223a9be289195193f7be5cb @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

87e0b2b138a2 drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE
18329b38477a drm/i915: Reduce bigjoiner special casing
d1e188d0f92d drm/i915: Perform correct cpu_transcoder readout for bigjoiner
c2e6e3a6e446 drm/i915: Split PPS write from DSC enable
4ac52967591b drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()
414928c8adbe drm/i915: Introduce intel_master_crtc()
228d612ee392 drm/i915: Configure TRANSCONF just the once with bigjoiner
f72fb22ecd92 drm/i915: Pimp HSW+ transcoder state readout
d395994fdc73 drm/i915: Extract hsw_panel_transcoders()
5adf1c1b4f21 drm/i915: Adjust intel_dsc_power_domain() calling convention
6e8de16f0343 drm/i915: Introduce with_intel_display_power_if_enabled()
9f3183ee9429 drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF
a3fc21d5d6df drm/i915: Flatten hsw_crtc_compute_clock()
9be6c55e57d1 drm/i915: Extract intel_dp_use_bigjoiner()
36568f62f4b3 drm/i915: Disable all planes before modesetting any pipes
c2571575849c Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/index.html

[-- Attachment #2: Type: text/html, Size: 5235 bytes --]

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix bigjoiner state readout

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30260 bytes --]

== Series Details ==

Series: drm/i915: Fix bigjoiner state readout
URL   : https://patchwork.freedesktop.org/series/94609/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10574_full -> Patchwork_21023_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21023_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21023_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21023_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-iclb:         [PASS][1] -> [SKIP][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-iclb1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
    - {shard-rkl}:        ([FAIL][3], [FAIL][4], [FAIL][5]) ([i915#2029] / [i915#3002] / [i915#3810]) -> ([FAIL][6], [FAIL][7], [FAIL][8]) ([i915#3002])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-1/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-1/igt@runner@aborted.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-2/igt@runner@aborted.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_21023_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@chamelium:
    - shard-iclb:         NOTRUN -> [SKIP][9] ([fdo#111827])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb6/igt@feature_discovery@chamelium.html

  * igt@gem_ctx_persistence@legacy-engines-mixed:
    - shard-snb:          NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099]) +8 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-snb5/igt@gem_ctx_persistence@legacy-engines-mixed.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-apl:          NOTRUN -> [FAIL][11] ([i915#2846])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][14] ([i915#2842])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk8/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-apl:          [PASS][15] -> [SKIP][16] ([fdo#109271])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-apl7/igt@gem_exec_fair@basic-none-share@rcs0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-apl:          NOTRUN -> [FAIL][17] ([i915#2842])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_mmap_gtt@coherency:
    - shard-tglb:         NOTRUN -> [SKIP][18] ([fdo#111656])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@gem_mmap_gtt@coherency.html

  * igt@gem_softpin@evict-snoop:
    - shard-tglb:         NOTRUN -> [SKIP][19] ([fdo#109312])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@input-checking:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][20] ([i915#3002])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@gem_userptr_blits@input-checking.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][21] ([i915#180])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl7/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_pm_backlight@bad-brightness:
    - shard-glk:          NOTRUN -> [SKIP][22] ([fdo#109271]) +37 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk8/igt@i915_pm_backlight@bad-brightness.html

  * igt@i915_pm_backlight@fade_with_suspend:
    - shard-skl:          [PASS][23] -> [INCOMPLETE][24] ([i915#198])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl5/igt@i915_pm_backlight@fade_with_suspend.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@i915_pm_backlight@fade_with_suspend.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-kbl:          NOTRUN -> [FAIL][25] ([i915#454])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@i915_pm_dc@dc6-dpms.html
    - shard-skl:          NOTRUN -> [FAIL][26] ([i915#454])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
    - shard-kbl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#1937])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl7/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
    - shard-apl:          NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#1937])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl1/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-tglb:         NOTRUN -> [SKIP][29] ([i915#1902])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@i915_pm_lpsp@screens-disabled.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][30] ([fdo#109271]) +249 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl1/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#3777]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-tglb:         NOTRUN -> [SKIP][32] ([fdo#111615])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([i915#2705])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3886]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk8/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
    - shard-iclb:         NOTRUN -> [SKIP][35] ([fdo#109278] / [i915#3886]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3886]) +9 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl1/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][37] ([i915#3689]) +2 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_ccs@pipe-b-crc-primary-basic-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl2/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][40] ([i915#3689] / [i915#3886])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-crc-multiple:
    - shard-skl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_chamelium@dp-crc-multiple.html

  * igt@kms_chamelium@hdmi-aspect-ratio:
    - shard-kbl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [fdo#111827]) +10 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@kms_chamelium@hdmi-aspect-ratio.html

  * igt@kms_chamelium@hdmi-crc-single:
    - shard-glk:          NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk8/igt@kms_chamelium@hdmi-crc-single.html

  * igt@kms_chamelium@vga-hpd-without-ddc:
    - shard-snb:          NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +28 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-snb6/igt@kms_chamelium@vga-hpd-without-ddc.html

  * igt@kms_color@pipe-b-ctm-0-25:
    - shard-skl:          [PASS][45] -> [DMESG-WARN][46] ([i915#1982]) +2 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl9/igt@kms_color@pipe-b-ctm-0-25.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl7/igt@kms_color@pipe-b-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +20 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-d-ctm-blue-to-red:
    - shard-iclb:         NOTRUN -> [SKIP][49] ([fdo#109278] / [fdo#109284] / [fdo#111827])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb6/igt@kms_color_chamelium@pipe-d-ctm-blue-to-red.html

  * igt@kms_content_protection@legacy:
    - shard-apl:          NOTRUN -> [TIMEOUT][50] ([i915#1319])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x10-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([i915#3359]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_cursor_crc@pipe-a-cursor-32x10-rapid-movement.html

  * igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen:
    - shard-skl:          NOTRUN -> [SKIP][52] ([fdo#109271]) +39 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x512-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([fdo#109279] / [i915#3359])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-512x512-onscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x10-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109278]) +2 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@kms_cursor_crc@pipe-c-cursor-32x10-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][55] ([i915#3319])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-tglb:         [PASS][56] -> [INCOMPLETE][57] ([i915#2411])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([fdo#111825] / [i915#3966])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-dp1:
    - shard-apl:          NOTRUN -> [DMESG-WARN][59] ([i915#180])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-kbl:          [PASS][60] -> [DMESG-WARN][61] ([i915#180]) +2 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-kbl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate@c-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#2122]) +2 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl9/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt:
    - shard-snb:          NOTRUN -> [SKIP][64] ([fdo#109271]) +522 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-pwrite:
    - shard-iclb:         NOTRUN -> [SKIP][65] ([fdo#109280])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([fdo#111825]) +3 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-d:
    - shard-kbl:          NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#533])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl2/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
    - shard-glk:          NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#533])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk8/igt@kms_pipe_crc_basic@read-crc-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#533]) +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-skl:          NOTRUN -> [FAIL][70] ([fdo#108145] / [i915#265])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
    - shard-kbl:          NOTRUN -> [FAIL][71] ([fdo#108145] / [i915#265])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][72] ([fdo#108145] / [i915#265])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html

  * igt@kms_plane_lowres@pipe-c-tiling-none:
    - shard-tglb:         NOTRUN -> [SKIP][73] ([i915#3536])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@kms_plane_lowres@pipe-c-tiling-none.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-apl:          NOTRUN -> [SKIP][74] ([fdo#109271] / [i915#2733])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
    - shard-apl:          NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#658]) +4 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
    - shard-skl:          NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#658]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
    - shard-kbl:          NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658]) +3 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html

  * igt@kms_psr@psr2_basic:
    - shard-tglb:         NOTRUN -> [FAIL][78] ([i915#132] / [i915#3467])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@kms_psr@psr2_basic.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([fdo#109441])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_psr@psr2_primary_mmap_gtt:
    - shard-iclb:         [PASS][80] -> [SKIP][81] ([fdo#109441])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb1/igt@kms_psr@psr2_primary_mmap_gtt.html

  * igt@kms_vblank@pipe-c-ts-continuation-modeset-hang:
    - shard-glk:          [PASS][82] -> [DMESG-WARN][83] ([i915#118] / [i915#95])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-glk8/igt@kms_vblank@pipe-c-ts-continuation-modeset-hang.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk9/igt@kms_vblank@pipe-c-ts-continuation-modeset-hang.html

  * igt@kms_writeback@writeback-check-output:
    - shard-skl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2437])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-kbl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437]) +1 similar issue
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl4/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@polling-small-buf:
    - shard-skl:          [PASS][86] -> [FAIL][87] ([i915#1722])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl7/igt@perf@polling-small-buf.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl9/igt@perf@polling-small-buf.html

  * igt@prime_nv_pcopy@test2:
    - shard-kbl:          NOTRUN -> [SKIP][88] ([fdo#109271]) +153 similar issues
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl4/igt@prime_nv_pcopy@test2.html

  * igt@prime_nv_test@i915_nv_sharing:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([fdo#109291])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@prime_nv_test@i915_nv_sharing.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109295])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@prime_vgem@fence-flip-hang.html

  * igt@sysfs_clients@fair-7:
    - shard-apl:          NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994]) +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl3/igt@sysfs_clients@fair-7.html
    - shard-tglb:         NOTRUN -> [SKIP][92] ([i915#2994])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb5/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@sema-10:
    - shard-skl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@sysfs_clients@sema-10.html
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-kbl3/igt@sysfs_clients@sema-10.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-iclb:         NOTRUN -> [SKIP][95] ([fdo#109307])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb6/igt@tools_test@sysfs_l3_parity.html

  
#### Possible fixes ####

  * igt@fbdev@unaligned-write:
    - {shard-rkl}:        [SKIP][96] ([i915#2582]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@fbdev@unaligned-write.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@fbdev@unaligned-write.html

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][98] ([i915#658]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-iclb7/igt@feature_discovery@psr2.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb2/igt@feature_discovery@psr2.html
    - {shard-rkl}:        [SKIP][100] ([i915#658]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@feature_discovery@psr2.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@feature_discovery@psr2.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][102] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-tglb3/igt@gem_eio@unwedge-stress.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [FAIL][104] ([i915#2842]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-tglb3/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - {shard-rkl}:        [FAIL][106] ([i915#2842]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-5/igt@gem_exec_fair@basic-throttle@rcs0.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-5/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_whisper@basic-forked:
    - shard-glk:          [DMESG-WARN][108] ([i915#118] / [i915#95]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-glk4/igt@gem_exec_whisper@basic-forked.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-glk2/igt@gem_exec_whisper@basic-forked.html

  * igt@gem_exec_whisper@basic-queues-forked:
    - shard-iclb:         [INCOMPLETE][110] ([i915#1895]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-iclb5/igt@gem_exec_whisper@basic-queues-forked.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-iclb8/igt@gem_exec_whisper@basic-queues-forked.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-skl:          [DMESG-WARN][112] ([i915#1436] / [i915#716]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl9/igt@gen9_exec_parse@allowed-single.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl2/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_backlight@fade_with_suspend:
    - {shard-rkl}:        [SKIP][114] ([i915#3012]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@i915_pm_backlight@fade_with_suspend.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@i915_pm_backlight@fade_with_suspend.html

  * igt@i915_pm_dc@dc9-dpms:
    - {shard-rkl}:        [FAIL][116] ([i915#3343]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_rpm@dpms-mode-unset-lpsp:
    - {shard-rkl}:        [SKIP][118] ([i915#1397]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - {shard-rkl}:        [SKIP][120] ([i915#3638]) -> [PASS][121] +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-1/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - {shard-rkl}:        [SKIP][122] ([i915#3721]) -> [PASS][123] +3 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_color@pipe-a-ctm-max:
    - {shard-rkl}:        [SKIP][124] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][125] +1 similar issue
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@kms_color@pipe-a-ctm-max.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_color@pipe-a-ctm-max.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement:
    - {shard-rkl}:        [SKIP][126] ([fdo#112022] / [i915#4070]) -> [PASS][127] +6 similar issues
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-256x256-rapid-movement.html

  * igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge:
    - {shard-rkl}:        [SKIP][128] ([i915#1849] / [i915#4070]) -> [PASS][129] +2 similar issues
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
    - {shard-rkl}:        [SKIP][130] ([fdo#111825] / [i915#4070]) -> [PASS][131] +1 similar issue
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipa-toggle.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipa-toggle.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
    - {shard-rkl}:        [SKIP][132] ([fdo#111314]) -> [PASS][133] +5 similar issues
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-rkl-1/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [INCOMPLETE][134] ([i915#180] / [i915#1982]) -> [PASS][135]
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-skl:          [FAIL][136] ([i915#79]) -> [PASS][137]
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [INCOMPLETE][138] ([i915#155]) -> [PASS][139]
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10574/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [139]:

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21023/index.html

[-- Attachment #2: Type: text/html, Size: 33593 bytes --]

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Ville Syrjälä]

On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Disabling planes in the middle of the modeset seuqnece does not make
> > sense since userspace can anyway disable planes before the modeset
> > even starts. So when the modeset seuqence starts the set of enabled
> > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > into the modeset sequence just means more randomness and potential
> > for hard to reproduce bugs.
> 
> The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.

The commit message only talks about planes. Also we already disable
the pipe in the post_disable hook, so PSR/audio was always disabled
before the pipe IIRC.

> I have other pending patch handling cases were userspace still has pipe enabled but no planes enabled.

So we need that I guess rather than hacking around it in the modeset
sequence.

> 
> > 
> > So it makes most sense to just disable all planes first so that the
> > rest of the modeset sequence remains identical regardless of which
> > planes happen to be enabled by userspace at the time.
> 
> This is not what specification ask us to do

The text has always been the same. It just marks the last point at which
the planes must be disabled.

> and for Alderlake-P not following it causes underruns.

Sounds like we have some other bug somewhere then, becaue supposedly you
get the same underrun if you disable all the planes from userspace
before the modeset then?

> 
> BSpec: 49190
> 
> > 
> > This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
> > 
> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c      | 30 +++++++------------
> >  drivers/gpu/drm/i915/display/intel_display.c  | 24 ---------------
> >  .../drm/i915/display/intel_display_types.h    |  4 ---
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c   | 14 ++-------
> >  4 files changed, 13 insertions(+), 59 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 23ef291f7b30..c1fd7cbb40e1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3164,6 +3164,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> >  
> >  	intel_dp->link_trained = false;
> >  
> > +	if (old_crtc_state->has_audio)
> > +		intel_audio_codec_disable(encoder,
> > +					  old_crtc_state, old_conn_state);
> > +
> > +	intel_drrs_disable(intel_dp, old_crtc_state);
> > +	intel_psr_disable(intel_dp, old_crtc_state);
> >  	intel_edp_backlight_off(old_conn_state);
> >  	/* Disable the decompression in DP Sink */
> >  	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> > @@ -3181,6 +3187,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> >  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> >  	struct drm_connector *connector = old_conn_state->connector;
> >  
> > +	if (old_crtc_state->has_audio)
> > +		intel_audio_codec_disable(encoder,
> > +					  old_crtc_state, old_conn_state);
> > +
> >  	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> >  					       false, false))
> >  		drm_dbg_kms(&i915->drm,
> > @@ -3188,25 +3198,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> >  			    connector->base.id, connector->name);
> >  }
> >  
> > -static void intel_pre_disable_ddi(struct intel_atomic_state *state,
> > -				  struct intel_encoder *encoder,
> > -				  const struct intel_crtc_state *old_crtc_state,
> > -				  const struct drm_connector_state *old_conn_state)
> > -{
> > -	struct intel_dp *intel_dp;
> > -
> > -	if (old_crtc_state->has_audio)
> > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > -					  old_conn_state);
> > -
> > -	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> > -		return;
> > -
> > -	intel_dp = enc_to_intel_dp(encoder);
> > -	intel_drrs_disable(intel_dp, old_crtc_state);
> > -	intel_psr_disable(intel_dp, old_crtc_state);
> > -}
> > -
> >  static void intel_disable_ddi(struct intel_atomic_state *state,
> >  			      struct intel_encoder *encoder,
> >  			      const struct intel_crtc_state *old_crtc_state,
> > @@ -4541,7 +4532,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  	encoder->enable = intel_enable_ddi;
> >  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> >  	encoder->pre_enable = intel_ddi_pre_enable;
> > -	encoder->pre_disable = intel_pre_disable_ddi;
> >  	encoder->disable = intel_disable_ddi;
> >  	encoder->post_disable = intel_ddi_post_disable;
> >  	encoder->update_pipe = intel_ddi_update_pipe;
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index a7ca38613f89..cd150512d275 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2723,28 +2723,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
> >  	}
> >  }
> >  
> > -static void intel_encoders_pre_disable(struct intel_atomic_state *state,
> > -				       struct intel_crtc *crtc)
> > -{
> > -	const struct intel_crtc_state *old_crtc_state =
> > -		intel_atomic_get_old_crtc_state(state, crtc);
> > -	const struct drm_connector_state *old_conn_state;
> > -	struct drm_connector *conn;
> > -	int i;
> > -
> > -	for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
> > -		struct intel_encoder *encoder =
> > -			to_intel_encoder(old_conn_state->best_encoder);
> > -
> > -		if (old_conn_state->crtc != &crtc->base)
> > -			continue;
> > -
> > -		if (encoder->pre_disable)
> > -			encoder->pre_disable(state, encoder, old_crtc_state,
> > -					     old_conn_state);
> > -	}
> > -}
> > -
> >  static void intel_encoders_disable(struct intel_atomic_state *state,
> >  				   struct intel_crtc *crtc)
> >  {
> > @@ -9807,8 +9785,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> >  
> >  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> >  
> > -	intel_encoders_pre_disable(state, crtc);
> > -
> >  	intel_crtc_disable_planes(state, crtc);
> >  
> >  	/*
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e9e806d90eec..7d852affead1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -196,10 +196,6 @@ struct intel_encoder {
> >  	void (*update_complete)(struct intel_atomic_state *,
> >  				struct intel_encoder *,
> >  				struct intel_crtc *);
> > -	void (*pre_disable)(struct intel_atomic_state *,
> > -			    struct intel_encoder *,
> > -			    const struct intel_crtc_state *,
> > -			    const struct drm_connector_state *);
> >  	void (*disable)(struct intel_atomic_state *,
> >  			struct intel_encoder *,
> >  			const struct intel_crtc_state *,
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index d104441344c0..914bea983a28 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
> >  	drm_dp_check_act_status(&intel_dp->mst_mgr);
> >  }
> >  
> > -static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
> > -				     struct intel_encoder *encoder,
> > -				     const struct intel_crtc_state *old_crtc_state,
> > -				     const struct drm_connector_state *old_conn_state)
> > -{
> > -	if (old_crtc_state->has_audio)
> > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > -					  old_conn_state);
> > -}
> > -
> >  static void intel_mst_disable_dp(struct intel_atomic_state *state,
> >  				 struct intel_encoder *encoder,
> >  				 const struct intel_crtc_state *old_crtc_state,
> > @@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
> >  	if (ret) {
> >  		drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
> >  	}
> > +	if (old_crtc_state->has_audio)
> > +		intel_audio_codec_disable(encoder,
> > +					  old_crtc_state, old_conn_state);
> >  }
> >  
> >  static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> > @@ -905,7 +898,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
> >  
> >  	intel_encoder->compute_config = intel_dp_mst_compute_config;
> >  	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
> > -	intel_encoder->pre_disable = intel_mst_pre_disable_dp;
> >  	intel_encoder->disable = intel_mst_disable_dp;
> >  	intel_encoder->post_disable = intel_mst_post_disable_dp;
> >  	intel_encoder->update_pipe = intel_ddi_update_pipe;
> 

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Souza, Jose]

On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Disabling planes in the middle of the modeset seuqnece does not make
> > > sense since userspace can anyway disable planes before the modeset
> > > even starts. So when the modeset seuqence starts the set of enabled
> > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > into the modeset sequence just means more randomness and potential
> > > for hard to reproduce bugs.
> > 
> > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> 
> The commit message only talks about planes. Also we already disable
> the pipe in the post_disable hook, so PSR/audio was always disabled
> before the pipe IIRC.

That is true, my bad.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > I have other pending patch handling cases were userspace still has pipe enabled but no planes enabled.
> 
> So we need that I guess rather than hacking around it in the modeset
> sequence.
> 
> > 
> > > 
> > > So it makes most sense to just disable all planes first so that the
> > > rest of the modeset sequence remains identical regardless of which
> > > planes happen to be enabled by userspace at the time.
> > 
> > This is not what specification ask us to do
> 
> The text has always been the same. It just marks the last point at which
> the planes must be disabled.
> 
> > and for Alderlake-P not following it causes underruns.
> 
> Sounds like we have some other bug somewhere then, becaue supposedly you
> get the same underrun if you disable all the planes from userspace
> before the modeset then?

Will check this case with this patch reverted on top of the pending PSR2 alderlake-P patches.

thanks

> 
> > 
> > BSpec: 49190
> > 
> > > 
> > > This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
> > > 
> > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_ddi.c      | 30 +++++++------------
> > >  drivers/gpu/drm/i915/display/intel_display.c  | 24 ---------------
> > >  .../drm/i915/display/intel_display_types.h    |  4 ---
> > >  drivers/gpu/drm/i915/display/intel_dp_mst.c   | 14 ++-------
> > >  4 files changed, 13 insertions(+), 59 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 23ef291f7b30..c1fd7cbb40e1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -3164,6 +3164,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> > >  
> > >  	intel_dp->link_trained = false;
> > >  
> > > +	if (old_crtc_state->has_audio)
> > > +		intel_audio_codec_disable(encoder,
> > > +					  old_crtc_state, old_conn_state);
> > > +
> > > +	intel_drrs_disable(intel_dp, old_crtc_state);
> > > +	intel_psr_disable(intel_dp, old_crtc_state);
> > >  	intel_edp_backlight_off(old_conn_state);
> > >  	/* Disable the decompression in DP Sink */
> > >  	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> > > @@ -3181,6 +3187,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> > >  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> > >  	struct drm_connector *connector = old_conn_state->connector;
> > >  
> > > +	if (old_crtc_state->has_audio)
> > > +		intel_audio_codec_disable(encoder,
> > > +					  old_crtc_state, old_conn_state);
> > > +
> > >  	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> > >  					       false, false))
> > >  		drm_dbg_kms(&i915->drm,
> > > @@ -3188,25 +3198,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> > >  			    connector->base.id, connector->name);
> > >  }
> > >  
> > > -static void intel_pre_disable_ddi(struct intel_atomic_state *state,
> > > -				  struct intel_encoder *encoder,
> > > -				  const struct intel_crtc_state *old_crtc_state,
> > > -				  const struct drm_connector_state *old_conn_state)
> > > -{
> > > -	struct intel_dp *intel_dp;
> > > -
> > > -	if (old_crtc_state->has_audio)
> > > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > > -					  old_conn_state);
> > > -
> > > -	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> > > -		return;
> > > -
> > > -	intel_dp = enc_to_intel_dp(encoder);
> > > -	intel_drrs_disable(intel_dp, old_crtc_state);
> > > -	intel_psr_disable(intel_dp, old_crtc_state);
> > > -}
> > > -
> > >  static void intel_disable_ddi(struct intel_atomic_state *state,
> > >  			      struct intel_encoder *encoder,
> > >  			      const struct intel_crtc_state *old_crtc_state,
> > > @@ -4541,7 +4532,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> > >  	encoder->enable = intel_enable_ddi;
> > >  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > >  	encoder->pre_enable = intel_ddi_pre_enable;
> > > -	encoder->pre_disable = intel_pre_disable_ddi;
> > >  	encoder->disable = intel_disable_ddi;
> > >  	encoder->post_disable = intel_ddi_post_disable;
> > >  	encoder->update_pipe = intel_ddi_update_pipe;
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index a7ca38613f89..cd150512d275 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -2723,28 +2723,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
> > >  	}
> > >  }
> > >  
> > > -static void intel_encoders_pre_disable(struct intel_atomic_state *state,
> > > -				       struct intel_crtc *crtc)
> > > -{
> > > -	const struct intel_crtc_state *old_crtc_state =
> > > -		intel_atomic_get_old_crtc_state(state, crtc);
> > > -	const struct drm_connector_state *old_conn_state;
> > > -	struct drm_connector *conn;
> > > -	int i;
> > > -
> > > -	for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
> > > -		struct intel_encoder *encoder =
> > > -			to_intel_encoder(old_conn_state->best_encoder);
> > > -
> > > -		if (old_conn_state->crtc != &crtc->base)
> > > -			continue;
> > > -
> > > -		if (encoder->pre_disable)
> > > -			encoder->pre_disable(state, encoder, old_crtc_state,
> > > -					     old_conn_state);
> > > -	}
> > > -}
> > > -
> > >  static void intel_encoders_disable(struct intel_atomic_state *state,
> > >  				   struct intel_crtc *crtc)
> > >  {
> > > @@ -9807,8 +9785,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> > >  
> > >  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> > >  
> > > -	intel_encoders_pre_disable(state, crtc);
> > > -
> > >  	intel_crtc_disable_planes(state, crtc);
> > >  
> > >  	/*
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index e9e806d90eec..7d852affead1 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -196,10 +196,6 @@ struct intel_encoder {
> > >  	void (*update_complete)(struct intel_atomic_state *,
> > >  				struct intel_encoder *,
> > >  				struct intel_crtc *);
> > > -	void (*pre_disable)(struct intel_atomic_state *,
> > > -			    struct intel_encoder *,
> > > -			    const struct intel_crtc_state *,
> > > -			    const struct drm_connector_state *);
> > >  	void (*disable)(struct intel_atomic_state *,
> > >  			struct intel_encoder *,
> > >  			const struct intel_crtc_state *,
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > index d104441344c0..914bea983a28 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > @@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
> > >  	drm_dp_check_act_status(&intel_dp->mst_mgr);
> > >  }
> > >  
> > > -static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
> > > -				     struct intel_encoder *encoder,
> > > -				     const struct intel_crtc_state *old_crtc_state,
> > > -				     const struct drm_connector_state *old_conn_state)
> > > -{
> > > -	if (old_crtc_state->has_audio)
> > > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > > -					  old_conn_state);
> > > -}
> > > -
> > >  static void intel_mst_disable_dp(struct intel_atomic_state *state,
> > >  				 struct intel_encoder *encoder,
> > >  				 const struct intel_crtc_state *old_crtc_state,
> > > @@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
> > >  	if (ret) {
> > >  		drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
> > >  	}
> > > +	if (old_crtc_state->has_audio)
> > > +		intel_audio_codec_disable(encoder,
> > > +					  old_crtc_state, old_conn_state);
> > >  }
> > >  
> > >  static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> > > @@ -905,7 +898,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
> > >  
> > >  	intel_encoder->compute_config = intel_dp_mst_compute_config;
> > >  	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
> > > -	intel_encoder->pre_disable = intel_mst_pre_disable_dp;
> > >  	intel_encoder->disable = intel_mst_disable_dp;
> > >  	intel_encoder->post_disable = intel_mst_post_disable_dp;
> > >  	intel_encoder->update_pipe = intel_ddi_update_pipe;
> > 
> 

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Souza, Jose]

On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > 
> > > > Disabling planes in the middle of the modeset seuqnece does not make
> > > > sense since userspace can anyway disable planes before the modeset
> > > > even starts. So when the modeset seuqence starts the set of enabled
> > > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > > into the modeset sequence just means more randomness and potential
> > > > for hard to reproduce bugs.
> > > 
> > > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> > 
> > The commit message only talks about planes. Also we already disable
> > the pipe in the post_disable hook, so PSR/audio was always disabled
> > before the pipe IIRC.
> 
> That is true, my bad.
> 
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

Sorry I missed the intel_crtc_disable_planes() call, so here is the problem:


intel_commit_modeset_disables()
	intel_old_crtc_state_disables()
		intel_crtc_disable_planes()
			intel_disable_plane()
		dev_priv->display.crtc_disable(state, crtc)/hsw_crtc_disable()
			intel_encoders_disable()
				encoder->disable()/intel_disable_ddi()
					intel_psr_disable()
			intel_encoders_post_disable()
				post_disable/intel_ddi_post_disable()
					intel_disable_pipe()

So all the planes are disabled while PSR is still on, that is why this patch fixed the underrun.

We need to call the pre_disable() before intel_crtc_disable_planes() and for the case where pipe is not disabled but all of its planes are requires
the pending patch that I have.

Or do you have other suggestion?

> 
> > 
> > > I have other pending patch handling cases were userspace still has pipe enabled but no planes enabled.
> > 
> > So we need that I guess rather than hacking around it in the modeset
> > sequence.
> > 
> > > 
> > > > 
> > > > So it makes most sense to just disable all planes first so that the
> > > > rest of the modeset sequence remains identical regardless of which
> > > > planes happen to be enabled by userspace at the time.
> > > 
> > > This is not what specification ask us to do
> > 
> > The text has always been the same. It just marks the last point at which
> > the planes must be disabled.
> > 
> > > and for Alderlake-P not following it causes underruns.
> > 
> > Sounds like we have some other bug somewhere then, becaue supposedly you
> > get the same underrun if you disable all the planes from userspace
> > before the modeset then?
> 
> Will check this case with this patch reverted on top of the pending PSR2 alderlake-P patches.
> 
> thanks
> 
> > 
> > > 
> > > BSpec: 49190
> > > 
> > > > 
> > > > This reverts commit 84030adb9e27d202a66022488bf0349a8bd45213.
> > > > 
> > > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_ddi.c      | 30 +++++++------------
> > > >  drivers/gpu/drm/i915/display/intel_display.c  | 24 ---------------
> > > >  .../drm/i915/display/intel_display_types.h    |  4 ---
> > > >  drivers/gpu/drm/i915/display/intel_dp_mst.c   | 14 ++-------
> > > >  4 files changed, 13 insertions(+), 59 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > index 23ef291f7b30..c1fd7cbb40e1 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > @@ -3164,6 +3164,12 @@ static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> > > >  
> > > >  	intel_dp->link_trained = false;
> > > >  
> > > > +	if (old_crtc_state->has_audio)
> > > > +		intel_audio_codec_disable(encoder,
> > > > +					  old_crtc_state, old_conn_state);
> > > > +
> > > > +	intel_drrs_disable(intel_dp, old_crtc_state);
> > > > +	intel_psr_disable(intel_dp, old_crtc_state);
> > > >  	intel_edp_backlight_off(old_conn_state);
> > > >  	/* Disable the decompression in DP Sink */
> > > >  	intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state,
> > > > @@ -3181,6 +3187,10 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> > > >  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> > > >  	struct drm_connector *connector = old_conn_state->connector;
> > > >  
> > > > +	if (old_crtc_state->has_audio)
> > > > +		intel_audio_codec_disable(encoder,
> > > > +					  old_crtc_state, old_conn_state);
> > > > +
> > > >  	if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
> > > >  					       false, false))
> > > >  		drm_dbg_kms(&i915->drm,
> > > > @@ -3188,25 +3198,6 @@ static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> > > >  			    connector->base.id, connector->name);
> > > >  }
> > > >  
> > > > -static void intel_pre_disable_ddi(struct intel_atomic_state *state,
> > > > -				  struct intel_encoder *encoder,
> > > > -				  const struct intel_crtc_state *old_crtc_state,
> > > > -				  const struct drm_connector_state *old_conn_state)
> > > > -{
> > > > -	struct intel_dp *intel_dp;
> > > > -
> > > > -	if (old_crtc_state->has_audio)
> > > > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > > > -					  old_conn_state);
> > > > -
> > > > -	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> > > > -		return;
> > > > -
> > > > -	intel_dp = enc_to_intel_dp(encoder);
> > > > -	intel_drrs_disable(intel_dp, old_crtc_state);
> > > > -	intel_psr_disable(intel_dp, old_crtc_state);
> > > > -}
> > > > -
> > > >  static void intel_disable_ddi(struct intel_atomic_state *state,
> > > >  			      struct intel_encoder *encoder,
> > > >  			      const struct intel_crtc_state *old_crtc_state,
> > > > @@ -4541,7 +4532,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> > > >  	encoder->enable = intel_enable_ddi;
> > > >  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> > > >  	encoder->pre_enable = intel_ddi_pre_enable;
> > > > -	encoder->pre_disable = intel_pre_disable_ddi;
> > > >  	encoder->disable = intel_disable_ddi;
> > > >  	encoder->post_disable = intel_ddi_post_disable;
> > > >  	encoder->update_pipe = intel_ddi_update_pipe;
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > > index a7ca38613f89..cd150512d275 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > > @@ -2723,28 +2723,6 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
> > > >  	}
> > > >  }
> > > >  
> > > > -static void intel_encoders_pre_disable(struct intel_atomic_state *state,
> > > > -				       struct intel_crtc *crtc)
> > > > -{
> > > > -	const struct intel_crtc_state *old_crtc_state =
> > > > -		intel_atomic_get_old_crtc_state(state, crtc);
> > > > -	const struct drm_connector_state *old_conn_state;
> > > > -	struct drm_connector *conn;
> > > > -	int i;
> > > > -
> > > > -	for_each_old_connector_in_state(&state->base, conn, old_conn_state, i) {
> > > > -		struct intel_encoder *encoder =
> > > > -			to_intel_encoder(old_conn_state->best_encoder);
> > > > -
> > > > -		if (old_conn_state->crtc != &crtc->base)
> > > > -			continue;
> > > > -
> > > > -		if (encoder->pre_disable)
> > > > -			encoder->pre_disable(state, encoder, old_crtc_state,
> > > > -					     old_conn_state);
> > > > -	}
> > > > -}
> > > > -
> > > >  static void intel_encoders_disable(struct intel_atomic_state *state,
> > > >  				   struct intel_crtc *crtc)
> > > >  {
> > > > @@ -9807,8 +9785,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> > > >  
> > > >  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> > > >  
> > > > -	intel_encoders_pre_disable(state, crtc);
> > > > -
> > > >  	intel_crtc_disable_planes(state, crtc);
> > > >  
> > > >  	/*
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > index e9e806d90eec..7d852affead1 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > @@ -196,10 +196,6 @@ struct intel_encoder {
> > > >  	void (*update_complete)(struct intel_atomic_state *,
> > > >  				struct intel_encoder *,
> > > >  				struct intel_crtc *);
> > > > -	void (*pre_disable)(struct intel_atomic_state *,
> > > > -			    struct intel_encoder *,
> > > > -			    const struct intel_crtc_state *,
> > > > -			    const struct drm_connector_state *);
> > > >  	void (*disable)(struct intel_atomic_state *,
> > > >  			struct intel_encoder *,
> > > >  			const struct intel_crtc_state *,
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > index d104441344c0..914bea983a28 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > @@ -348,16 +348,6 @@ static void wait_for_act_sent(struct intel_encoder *encoder,
> > > >  	drm_dp_check_act_status(&intel_dp->mst_mgr);
> > > >  }
> > > >  
> > > > -static void intel_mst_pre_disable_dp(struct intel_atomic_state *state,
> > > > -				     struct intel_encoder *encoder,
> > > > -				     const struct intel_crtc_state *old_crtc_state,
> > > > -				     const struct drm_connector_state *old_conn_state)
> > > > -{
> > > > -	if (old_crtc_state->has_audio)
> > > > -		intel_audio_codec_disable(encoder, old_crtc_state,
> > > > -					  old_conn_state);
> > > > -}
> > > > -
> > > >  static void intel_mst_disable_dp(struct intel_atomic_state *state,
> > > >  				 struct intel_encoder *encoder,
> > > >  				 const struct intel_crtc_state *old_crtc_state,
> > > > @@ -382,6 +372,9 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
> > > >  	if (ret) {
> > > >  		drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
> > > >  	}
> > > > +	if (old_crtc_state->has_audio)
> > > > +		intel_audio_codec_disable(encoder,
> > > > +					  old_crtc_state, old_conn_state);
> > > >  }
> > > >  
> > > >  static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> > > > @@ -905,7 +898,6 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe
> > > >  
> > > >  	intel_encoder->compute_config = intel_dp_mst_compute_config;
> > > >  	intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
> > > > -	intel_encoder->pre_disable = intel_mst_pre_disable_dp;
> > > >  	intel_encoder->disable = intel_mst_disable_dp;
> > > >  	intel_encoder->post_disable = intel_mst_post_disable_dp;
> > > >  	intel_encoder->update_pipe = intel_ddi_update_pipe;
> > > 
> > 
> 

Re: [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner()

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Suck the "do we need bigjoiner?" checks into a helper instead of
> duplicating them in two differentt places.

Could've called it intel_dp_need_bigjoiner() but meh.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++++++++-----
>  1 file changed, 14 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 161c33b2c869..e898834cc5f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -805,6 +805,17 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> +static bool intel_dp_use_bigjoiner(struct intel_dp *intel_dp,
> +				   int hdisplay, int clock)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +
> +	if (!intel_dp_can_bigjoiner(intel_dp))
> +		return false;
> +
> +	return clock > i915->max_dotclk_freq || hdisplay > 5120;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mode_valid(struct drm_connector *connector,
>  		    struct drm_display_mode *mode)
> @@ -840,8 +851,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode->clock < 10000)
>  		return MODE_CLOCK_LOW;
>  
> -	if ((target_clock > max_dotclk || mode->hdisplay > 5120) &&
> -	    intel_dp_can_bigjoiner(intel_dp)) {
> +	if (intel_dp_use_bigjoiner(intel_dp, mode->hdisplay, target_clock)) {
>  		bigjoiner = true;
>  		max_dotclk *= 2;
>  	}
> @@ -1457,9 +1467,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  		    limits.max_lane_count, limits.max_rate,
>  		    limits.max_bpp, adjusted_mode->crtc_clock);
>  
> -	if ((adjusted_mode->crtc_clock > i915->max_dotclk_freq ||
> -	     adjusted_mode->crtc_hdisplay > 5120) &&
> -	    intel_dp_can_bigjoiner(intel_dp))
> +	if (intel_dp_use_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
> +				   adjusted_mode->crtc_clock))
>  		pipe_config->bigjoiner = true;
>  
>  	/*

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 04/16] drm/i915: Flatten hsw_crtc_compute_clock()

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> hsw_crtc_compute_clock() has become spaghetti. Flatten
> it a bit to make it at least semi-legible.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dpll.c | 20 +++++++++++---------
>  1 file changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 210f91f4a576..ace9157a1c30 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -937,16 +937,18 @@ static int hsw_crtc_compute_clock(struct intel_crtc_state *crtc_state)
>  	struct intel_encoder *encoder =
>  		intel_get_crtc_new_encoder(state, crtc_state);
>  
> -	if (IS_DG2(dev_priv)) {
> +	if (IS_DG2(dev_priv))
>  		return intel_mpllb_calc_state(crtc_state, encoder);
> -	} else if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
> -		   DISPLAY_VER(dev_priv) >= 11) {
> -		if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
> -			drm_dbg_kms(&dev_priv->drm,
> -				    "failed to find PLL for pipe %c\n",
> -				    pipe_name(crtc->pipe));
> -			return -EINVAL;
> -		}
> +
> +	if (DISPLAY_VER(dev_priv) < 11 &&
> +	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> +		return 0;
> +
> +	if (!intel_reserve_shared_dplls(state, crtc, encoder)) {
> +		drm_dbg_kms(&dev_priv->drm,
> +			    "failed to find PLL for pipe %c\n",
> +			    pipe_name(crtc->pipe));
> +		return -EINVAL;
>  	}
>  
>  	return 0;

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> PIPECONF becamse TRANSCONF when HSW introduced the EDP transcoder.
> Bigjoiner is making life even more confusing by introducing
> a N:1 relationship between pipes and transcoders. In that case
> we only enable/configure the transcoder corresponding to the
> master pipe. Let's do some renames to make it clear we're dealing
> with the transcoder rather than pipe when it comes to
> PIPECONF/TRANSCONF.
>
> I decided to leave the _cpu_ part out from the function/macro
> names since the PCH transcoder related stuff already has a
> _pch_ in their name. So shouldn't be possible to confuse them.

Wondering about flipping the names to intel_transcoder_enable and
intel_transcoder_disable, with a potential move to a separate file.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c        |  4 +--
>  drivers/gpu/drm/i915/display/intel_crt.c     |  4 +--
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  4 +--
>  drivers/gpu/drm/i915/display/intel_display.c | 28 ++++++++++----------
>  drivers/gpu/drm/i915/display/intel_display.h | 12 ++++-----
>  drivers/gpu/drm/i915/display/intel_dp_mst.c  |  4 +--
>  drivers/gpu/drm/i915/display/intel_dpll.c    | 12 ++++-----
>  drivers/gpu/drm/i915/display/intel_fdi.c     |  2 +-
>  drivers/gpu/drm/i915/display/intel_tv.c      |  2 +-
>  9 files changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 9577f6843f79..8e0620ae2ed1 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -211,7 +211,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
>  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
> -	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
>  	assert_dp_port_disabled(intel_dp);
>  	assert_edp_pll_disabled(dev_priv);
>  
> @@ -251,7 +251,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
>  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
> -	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
>  	assert_dp_port_disabled(intel_dp);
>  	assert_edp_pll_enabled(dev_priv);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 408f82b0dc7d..1c161eeed82f 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -251,7 +251,7 @@ static void hsw_post_disable_crt(struct intel_atomic_state *state,
>  
>  	intel_crtc_vblank_off(old_crtc_state);
>  
> -	intel_disable_pipe(old_crtc_state);
> +	intel_disable_transcoder(old_crtc_state);
>  
>  	intel_ddi_disable_transcoder_func(old_crtc_state);
>  
> @@ -314,7 +314,7 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
>  
>  	intel_ddi_enable_transcoder_func(encoder, crtc_state);
>  
> -	intel_enable_pipe(crtc_state);
> +	intel_enable_transcoder(crtc_state);
>  
>  	lpt_pch_enable(crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c1fd7cbb40e1..4f7420dda8b5 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2867,7 +2867,7 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
>  	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
>  		intel_crtc_vblank_off(old_crtc_state);
>  
> -		intel_disable_pipe(old_crtc_state);
> +		intel_disable_transcoder(old_crtc_state);
>  
>  		intel_vrr_disable(old_crtc_state);
>  
> @@ -3138,7 +3138,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
>  
>  	intel_vrr_enable(encoder, crtc_state);
>  
> -	intel_enable_pipe(crtc_state);
> +	intel_enable_transcoder(crtc_state);
>  
>  	intel_crtc_vblank_on(crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index afa26911c236..1a0eac3da3f0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -120,7 +120,7 @@ static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_sta
>  					 const struct intel_link_m_n *m2_n2);
>  static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
>  static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
> -static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
> +static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
>  static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
>  static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
>  static void intel_modeset_setup_hw_state(struct drm_device *dev,
> @@ -448,8 +448,8 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	     pipe_name(pipe));
>  }
>  
> -void assert_pipe(struct drm_i915_private *dev_priv,
> -		 enum transcoder cpu_transcoder, bool state)
> +void assert_transcoder(struct drm_i915_private *dev_priv,
> +		       enum transcoder cpu_transcoder, bool state)
>  {
>  	bool cur_state;
>  	enum intel_display_power_domain power_domain;
> @@ -766,7 +766,7 @@ enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
>  		return crtc->pipe;
>  }
>  
> -void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
> +void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -827,7 +827,7 @@ void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
>  		intel_wait_for_pipe_scanline_moving(crtc);
>  }
>  
> -void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
> +void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -2883,7 +2883,7 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
>  
>  	if (dev_priv->display.initial_watermarks)
>  		dev_priv->display.initial_watermarks(state, crtc);
> -	intel_enable_pipe(new_crtc_state);
> +	intel_enable_transcoder(new_crtc_state);
>  
>  	if (new_crtc_state->has_pch_encoder)
>  		ilk_pch_enable(state, new_crtc_state);
> @@ -3062,7 +3062,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>  	}
>  
>  	if (!transcoder_is_dsi(cpu_transcoder))
> -		hsw_set_pipeconf(new_crtc_state);
> +		hsw_set_transconf(new_crtc_state);
>  
>  	crtc->active = true;
>  
> @@ -3157,7 +3157,7 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
>  
>  	intel_crtc_vblank_off(old_crtc_state);
>  
> -	intel_disable_pipe(old_crtc_state);
> +	intel_disable_transcoder(old_crtc_state);
>  
>  	ilk_pfit_disable(old_crtc_state);
>  
> @@ -3219,7 +3219,7 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
>  	 */
>  	drm_WARN_ON(&dev_priv->drm,
>  		    intel_de_read(dev_priv, PFIT_CONTROL) & PFIT_ENABLE);
> -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	intel_de_write(dev_priv, PFIT_PGM_RATIOS,
>  		       crtc_state->gmch_pfit.pgm_ratios);
> @@ -3511,7 +3511,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
>  	intel_disable_primary_plane(new_crtc_state);
>  
>  	dev_priv->display.initial_watermarks(state, crtc);
> -	intel_enable_pipe(new_crtc_state);
> +	intel_enable_transcoder(new_crtc_state);
>  
>  	intel_crtc_vblank_on(new_crtc_state);
>  
> @@ -3557,7 +3557,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
>  		dev_priv->display.initial_watermarks(state, crtc);
>  	else
>  		intel_update_watermarks(crtc);
> -	intel_enable_pipe(new_crtc_state);
> +	intel_enable_transcoder(new_crtc_state);
>  
>  	intel_crtc_vblank_on(new_crtc_state);
>  
> @@ -3576,7 +3576,7 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
>  	if (!old_crtc_state->gmch_pfit.control)
>  		return;
>  
> -	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
>  
>  	drm_dbg_kms(&dev_priv->drm, "disabling pfit, current: 0x%08x\n",
>  		    intel_de_read(dev_priv, PFIT_CONTROL));
> @@ -3602,7 +3602,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
>  
>  	intel_crtc_vblank_off(old_crtc_state);
>  
> -	intel_disable_pipe(old_crtc_state);
> +	intel_disable_transcoder(old_crtc_state);
>  
>  	i9xx_pfit_disable(old_crtc_state);
>  
> @@ -5172,7 +5172,7 @@ static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
>  	intel_de_posting_read(dev_priv, PIPECONF(pipe));
>  }
>  
> -static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
> +static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 4719ffc97fce..d425ee77aad7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -531,8 +531,8 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
>  bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
>  
>  void intel_plane_destroy(struct drm_plane *plane);
> -void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
> -void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);
> +void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state);
> +void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
>  void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
>  void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
>  enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
> @@ -657,10 +657,10 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
>  		       enum pipe pipe, bool state);
>  #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
>  #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
> -void assert_pipe(struct drm_i915_private *dev_priv,
> -		 enum transcoder cpu_transcoder, bool state);
> -#define assert_pipe_enabled(d, t) assert_pipe(d, t, true)
> -#define assert_pipe_disabled(d, t) assert_pipe(d, t, false)
> +void assert_transcoder(struct drm_i915_private *dev_priv,
> +		       enum transcoder cpu_transcoder, bool state);
> +#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
> +#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
>  
>  /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
>   * WARN_ON()) for hw state sanity checks to check for unexpected conditions
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 914bea983a28..9f1fc1a68ed2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -398,7 +398,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
>  
>  	intel_crtc_vblank_off(old_crtc_state);
>  
> -	intel_disable_pipe(old_crtc_state);
> +	intel_disable_transcoder(old_crtc_state);
>  
>  	drm_dp_update_payload_part2(&intel_dp->mst_mgr);
>  
> @@ -559,7 +559,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
>  		intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
>  			     FECSTALL_DIS_DPTSTREAM_DPTTG);
>  
> -	intel_enable_pipe(pipe_config);
> +	intel_enable_transcoder(pipe_config);
>  
>  	intel_crtc_vblank_on(pipe_config);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index ace9157a1c30..487d8721ecf8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1402,7 +1402,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)
>  	enum pipe pipe = crtc->pipe;
>  	int i;
>  
> -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	/* PLL is protected by panel, make sure we can write it */
>  	if (i9xx_has_pps(dev_priv))
> @@ -1582,7 +1582,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  
> -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	/* PLL is protected by panel, make sure we can write it */
>  	assert_panel_unlocked(dev_priv, pipe);
> @@ -1734,7 +1734,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  
> -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	/* PLL is protected by panel, make sure we can write it */
>  	assert_panel_unlocked(dev_priv, pipe);
> @@ -1818,7 +1818,7 @@ void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	u32 val;
>  
>  	/* Make sure the pipe isn't still relying on us */
> -	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
> +	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
>  
>  	val = DPLL_INTEGRATED_REF_CLK_VLV |
>  		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> @@ -1835,7 +1835,7 @@ void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	u32 val;
>  
>  	/* Make sure the pipe isn't still relying on us */
> -	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
> +	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
>  
>  	val = DPLL_SSC_REF_CLK_CHV |
>  		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> @@ -1866,7 +1866,7 @@ void i9xx_disable_pll(const struct intel_crtc_state *crtc_state)
>  		return;
>  
>  	/* Make sure the pipe isn't still relying on us */
> -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS);
>  	intel_de_posting_read(dev_priv, DPLL(pipe));
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index fc09b781f15f..96ff12ad0873 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -281,7 +281,7 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
>  		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
>  
>  	/* FDI needs bits from pipe first */
> -	assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
> +	assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);
>  
>  	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
>  	   for train result */
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
> index d02f09f7e750..88a398df9621 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -1529,7 +1529,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
>  		intel_de_write(dev_priv, TV_CLR_LEVEL,
>  			       ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
>  
> -	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
> +	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
>  
>  	/* Filter ctl must be set before TV_WIN_SIZE */
>  	tv_filter_ctl = TV_AUTO_SCALE;

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 07/16] drm/i915: Adjust intel_dsc_power_domain() calling convention

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the crtc+cpu_transcoder rather than the crtc state to
> intel_dsc_power_domain(). This should allow us to reuse it
> during readout as well.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  6 +-
>  drivers/gpu/drm/i915/display/intel_vdsc.c    | 79 ++++++++++----------
>  drivers/gpu/drm/i915/display/intel_vdsc.h    |  6 +-
>  3 files changed, 45 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1a0eac3da3f0..54107bab4ae6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3404,16 +3404,16 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	struct drm_encoder *encoder;
>  	enum pipe pipe = crtc->pipe;
>  	u64 mask;
> -	enum transcoder transcoder = crtc_state->cpu_transcoder;
>  
>  	if (!crtc_state->hw.active)
>  		return 0;
>  
>  	mask = BIT_ULL(POWER_DOMAIN_PIPE(pipe));
> -	mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(transcoder));
> +	mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(cpu_transcoder));
>  	if (crtc_state->pch_pfit.enabled ||
>  	    crtc_state->pch_pfit.force_thru)
>  		mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe));
> @@ -3432,7 +3432,7 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
>  		mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
>  
>  	if (crtc_state->dsc.compression_enable)
> -		mask |= BIT_ULL(intel_dsc_power_domain(crtc_state));
> +		mask |= BIT_ULL(intel_dsc_power_domain(crtc, cpu_transcoder));
>  
>  	return mask;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index df3286aa6999..2275f99ce9d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -357,11 +357,9 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
>  	return false;
>  }
>  
> -static bool is_pipe_dsc(const struct intel_crtc_state *crtc_state)
> +static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
>  {
> -	const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	const struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> -	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>  
>  	if (DISPLAY_VER(i915) >= 12)
>  		return true;
> @@ -547,9 +545,8 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
>  }
>  
>  enum intel_display_power_domain
> -intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
> +intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
>  {
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  
> @@ -566,7 +563,7 @@ intel_dsc_power_domain(const struct intel_crtc_state *crtc_state)
>  	 */
>  	if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A)
>  		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
> -	else if (is_pipe_dsc(crtc_state))
> +	else if (is_pipe_dsc(crtc, cpu_transcoder))
>  		return POWER_DOMAIN_PIPE(pipe);
>  	else
>  		return POWER_DOMAIN_TRANSCODER_VDSC_PW2;
> @@ -577,6 +574,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
>  	u32 pps_val = 0;
>  	u32 rc_buf_thresh_dword[4];
> @@ -601,7 +599,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	if (vdsc_cfg->vbr_enable)
>  		pps_val |= DSC_VBR_ENABLE;
>  	drm_info(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_0,
>  			       pps_val);
>  		/*
> @@ -625,7 +623,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val = 0;
>  	pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel);
>  	drm_info(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_1,
>  			       pps_val);
>  		/*
> @@ -650,7 +648,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |
>  		DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances);
>  	drm_info(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_2,
>  			       pps_val);
>  		/*
> @@ -675,7 +673,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |
>  		DSC_SLICE_WIDTH(vdsc_cfg->slice_width);
>  	drm_info(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_3,
>  			       pps_val);
>  		/*
> @@ -700,7 +698,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |
>  		DSC_INITIAL_DEC_DELAY(vdsc_cfg->initial_dec_delay);
>  	drm_info(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_4,
>  			       pps_val);
>  		/*
> @@ -725,7 +723,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |
>  		DSC_SCALE_DEC_INT(vdsc_cfg->scale_decrement_interval);
>  	drm_info(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_5,
>  			       pps_val);
>  		/*
> @@ -752,7 +750,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  		DSC_FLATNESS_MIN_QP(vdsc_cfg->flatness_min_qp) |
>  		DSC_FLATNESS_MAX_QP(vdsc_cfg->flatness_max_qp);
>  	drm_info(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_6,
>  			       pps_val);
>  		/*
> @@ -777,7 +775,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |
>  		DSC_NFL_BPG_OFFSET(vdsc_cfg->nfl_bpg_offset);
>  	drm_info(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_7,
>  			       pps_val);
>  		/*
> @@ -802,7 +800,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |
>  		DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset);
>  	drm_info(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_8,
>  			       pps_val);
>  		/*
> @@ -827,7 +825,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	pps_val |= DSC_RC_MODEL_SIZE(vdsc_cfg->rc_model_size) |
>  		DSC_RC_EDGE_FACTOR(DSC_RC_EDGE_FACTOR_CONST);
>  	drm_info(&dev_priv->drm, "PPS9 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_9,
>  			       pps_val);
>  		/*
> @@ -854,7 +852,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  		DSC_RC_TARGET_OFF_HIGH(DSC_RC_TGT_OFFSET_HI_CONST) |
>  		DSC_RC_TARGET_OFF_LOW(DSC_RC_TGT_OFFSET_LO_CONST);
>  	drm_info(&dev_priv->drm, "PPS10 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_10,
>  			       pps_val);
>  		/*
> @@ -882,7 +880,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  		DSC_SLICE_ROW_PER_FRAME(vdsc_cfg->pic_height /
>  					vdsc_cfg->slice_height);
>  	drm_info(&dev_priv->drm, "PPS16 = 0x%08x\n", pps_val);
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_16,
>  			       pps_val);
>  		/*
> @@ -911,7 +909,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  		drm_info(&dev_priv->drm, " RC_BUF_THRESH%d = 0x%08x\n", i,
>  			 rc_buf_thresh_dword[i / 4]);
>  	}
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0,
>  			       rc_buf_thresh_dword[0]);
>  		intel_de_write(dev_priv, DSCA_RC_BUF_THRESH_0_UDW,
> @@ -968,7 +966,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  		drm_info(&dev_priv->drm, " RC_RANGE_PARAM_%d = 0x%08x\n", i,
>  			 rc_range_params_dword[i / 2]);
>  	}
> -	if (!is_pipe_dsc(crtc_state)) {
> +	if (!is_pipe_dsc(crtc, cpu_transcoder)) {
>  		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0,
>  			       rc_range_params_dword[0]);
>  		intel_de_write(dev_priv, DSCA_RC_RANGE_PARAMETERS_0_UDW,
> @@ -1095,18 +1093,16 @@ static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
>  				  sizeof(dp_dsc_pps_sdp));
>  }
>  
> -static i915_reg_t dss_ctl1_reg(const struct intel_crtc_state *crtc_state)
> +static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
>  {
> -	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
> -
> -	return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL1(pipe) : DSS_CTL1;
> +	return is_pipe_dsc(crtc, cpu_transcoder) ?
> +		ICL_PIPE_DSS_CTL1(crtc->pipe) : DSS_CTL1;
>  }
>  
> -static i915_reg_t dss_ctl2_reg(const struct intel_crtc_state *crtc_state)
> +static i915_reg_t dss_ctl2_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
>  {
> -	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
> -
> -	return is_pipe_dsc(crtc_state) ? ICL_PIPE_DSS_CTL2(pipe) : DSS_CTL2;
> +	return is_pipe_dsc(crtc, cpu_transcoder) ?
> +		ICL_PIPE_DSS_CTL2(crtc->pipe) : DSS_CTL2;
>  }
>  
>  static struct intel_crtc *
> @@ -1142,7 +1138,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
>  		else
>  			dss_ctl1_val |= UNCOMPRESSED_JOINER_MASTER;
>  
> -		intel_de_write(dev_priv, dss_ctl1_reg(crtc_state), dss_ctl1_val);
> +		intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);
>  	}
>  }
>  
> @@ -1176,8 +1172,8 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  		if (!crtc_state->bigjoiner_slave)
>  			dss_ctl1_val |= MASTER_BIG_JOINER_ENABLE;
>  	}
> -	intel_de_write(dev_priv, dss_ctl1_reg(crtc_state), dss_ctl1_val);
> -	intel_de_write(dev_priv, dss_ctl2_reg(crtc_state), dss_ctl2_val);
> +	intel_de_write(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder), dss_ctl1_val);
> +	intel_de_write(dev_priv, dss_ctl2_reg(crtc, crtc_state->cpu_transcoder), dss_ctl2_val);
>  }
>  
>  void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
> @@ -1188,8 +1184,8 @@ void intel_dsc_disable(const struct intel_crtc_state *old_crtc_state)
>  	/* Disable only if either of them is enabled */
>  	if (old_crtc_state->dsc.compression_enable ||
>  	    old_crtc_state->bigjoiner) {
> -		intel_de_write(dev_priv, dss_ctl1_reg(old_crtc_state), 0);
> -		intel_de_write(dev_priv, dss_ctl2_reg(old_crtc_state), 0);
> +		intel_de_write(dev_priv, dss_ctl1_reg(crtc, old_crtc_state->cpu_transcoder), 0);
> +		intel_de_write(dev_priv, dss_ctl2_reg(crtc, old_crtc_state->cpu_transcoder), 0);
>  	}
>  }
>  
> @@ -1199,7 +1195,7 @@ void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	u32 dss_ctl1;
>  
> -	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
> +	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, crtc_state->cpu_transcoder));
>  	if (dss_ctl1 & UNCOMPRESSED_JOINER_MASTER) {
>  		crtc_state->bigjoiner = true;
>  		crtc_state->bigjoiner_linked_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
> @@ -1214,9 +1210,10 @@ void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state)
>  
>  void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
>  {
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>  	enum pipe pipe = crtc->pipe;
>  	enum intel_display_power_domain power_domain;
>  	intel_wakeref_t wakeref;
> @@ -1225,14 +1222,14 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
>  	if (!intel_dsc_source_support(crtc_state))
>  		return;
>  
> -	power_domain = intel_dsc_power_domain(crtc_state);
> +	power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
>  
>  	wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
>  	if (!wakeref)
>  		return;
>  
> -	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc_state));
> -	dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc_state));
> +	dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, cpu_transcoder));
> +	dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, cpu_transcoder));
>  
>  	crtc_state->dsc.compression_enable = dss_ctl2 & LEFT_BRANCH_VDSC_ENABLE;
>  	if (!crtc_state->dsc.compression_enable)
> @@ -1256,7 +1253,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
>  	/* FIXME: add more state readout as needed */
>  
>  	/* PPS1 */
> -	if (!is_pipe_dsc(crtc_state))
> +	if (!is_pipe_dsc(crtc, cpu_transcoder))
>  		val = intel_de_read(dev_priv, DSCA_PICTURE_PARAMETER_SET_1);
>  	else
>  		val = intel_de_read(dev_priv,
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index dfb1fd38deb4..0c5d80a572da 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -8,8 +8,10 @@
>  
>  #include <linux/types.h>
>  
> -struct intel_encoder;
> +enum transcoder;
> +struct intel_crtc;
>  struct intel_crtc_state;
> +struct intel_encoder;
>  
>  bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
>  void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
> @@ -21,7 +23,7 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
>  void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
>  void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
>  enum intel_display_power_domain
> -intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
> +intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
>  struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
>  
>  #endif /* __INTEL_VDSC_H__ */

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders()

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract the "panel transcoder" bitmask into a helper. We'll
> have a couple of uses for this later.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++-----
>  1 file changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 54107bab4ae6..3848f7963cec 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5577,21 +5577,27 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>  	return ret;
>  }
>  
> +static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
> +{
> +	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> +
> +	if (DISPLAY_VER(i915) >= 11)
> +		panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
> +
> +	return panel_transcoder_mask;
> +}
> +
>  static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
>  				     struct intel_crtc_state *pipe_config,
>  				     struct intel_display_power_domain_set *power_domain_set)
>  {
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
> +	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
>  	unsigned long enabled_panel_transcoders = 0;
>  	enum transcoder panel_transcoder;
>  	u32 tmp;
>  
> -	if (DISPLAY_VER(dev_priv) >= 11)
> -		panel_transcoder_mask |=
> -			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
> -
>  	/*
>  	 * The pipe->transcoder mapping is fixed with the exception of the eDP
>  	 * and DSI transcoders handled below.

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc()

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a helper to determine the master crtc for bigjoiner usage.
> Also name the variables consistently.

I think this would be a good time to to rename bigjoiner {master, slave}
to {primary, secondary}. The change is coming to bspec too though it's
not there yet.

BR,
Jani.

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  6 +--
>  drivers/gpu/drm/i915/display/intel_display.c | 57 +++++++++++---------
>  2 files changed, 33 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4f7420dda8b5..4fbffce501dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2882,12 +2882,10 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
>  	}
>  
>  	if (old_crtc_state->bigjoiner_linked_crtc) {
> -		struct intel_atomic_state *state =
> -			to_intel_atomic_state(old_crtc_state->uapi.state);
> -		struct intel_crtc *slave =
> +		struct intel_crtc *slave_crtc =
>  			old_crtc_state->bigjoiner_linked_crtc;
>  		const struct intel_crtc_state *old_slave_crtc_state =
> -			intel_atomic_get_old_crtc_state(state, slave);
> +			intel_atomic_get_old_crtc_state(state, slave_crtc);
>  
>  		intel_crtc_vblank_off(old_slave_crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 24214e6249a9..a5450ac9e2d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -227,6 +227,14 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
>  		is_trans_port_sync_slave(crtc_state);
>  }
>  
> +static struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
> +{
> +	if (crtc_state->bigjoiner_slave)
> +		return crtc_state->bigjoiner_linked_crtc;
> +	else
> +		return to_intel_crtc(crtc_state->uapi.crtc);
> +}
> +
>  static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
>  				    enum pipe pipe)
>  {
> @@ -2978,21 +2986,19 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>  static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  					 const struct intel_crtc_state *crtc_state)
>  {
> -	struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(master->base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  	struct intel_crtc_state *master_crtc_state;
> +	struct intel_crtc *master_crtc;
>  	struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	struct intel_encoder *encoder = NULL;
>  	int i;
>  
> -	if (crtc_state->bigjoiner_slave)
> -		master = crtc_state->bigjoiner_linked_crtc;
> -
> -	master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> +	master_crtc = intel_master_crtc(crtc_state);
> +	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
>  
>  	for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
> -		if (conn_state->crtc != &master->base)
> +		if (conn_state->crtc != &master_crtc->base)
>  			continue;
>  
>  		encoder = to_intel_encoder(conn_state->best_encoder);
> @@ -3006,10 +3012,10 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  		/*
>  		 * Enable sequence steps 1-7 on bigjoiner master
>  		 */
> -		intel_encoders_pre_pll_enable(state, master);
> +		intel_encoders_pre_pll_enable(state, master_crtc);
>  		if (master_crtc_state->shared_dpll)
>  			intel_enable_shared_dpll(master_crtc_state);
> -		intel_encoders_pre_enable(state, master);
> +		intel_encoders_pre_enable(state, master_crtc);
>  
>  		/* and DSC on slave */
>  		intel_dsc_enable(NULL, crtc_state);
> @@ -8462,7 +8468,7 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	struct intel_encoder *encoder;
>  	struct intel_crtc_state *pipe_config = old_crtc_state;
>  	struct drm_atomic_state *state = old_crtc_state->uapi.state;
> -	struct intel_crtc *master = crtc;
> +	struct intel_crtc *master_crtc;
>  
>  	__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
>  	intel_crtc_free_hw_state(old_crtc_state);
> @@ -8490,10 +8496,9 @@ verify_crtc_state(struct intel_crtc *crtc,
>  			"(expected %i, found %i)\n",
>  			new_crtc_state->hw.active, crtc->active);
>  
> -	if (new_crtc_state->bigjoiner_slave)
> -		master = new_crtc_state->bigjoiner_linked_crtc;
> +	master_crtc = intel_master_crtc(new_crtc_state);
>  
> -	for_each_encoder_on_crtc(dev, &master->base, encoder) {
> +	for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
>  		enum pipe pipe;
>  		bool active;
>  
> @@ -8503,7 +8508,7 @@ verify_crtc_state(struct intel_crtc *crtc,
>  				encoder->base.base.id, active,
>  				new_crtc_state->hw.active);
>  
> -		I915_STATE_WARN(active && master->pipe != pipe,
> +		I915_STATE_WARN(active && master_crtc->pipe != pipe,
>  				"Encoder connected to wrong pipe %c\n",
>  				pipe_name(pipe));
>  
> @@ -9192,13 +9197,13 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  					struct intel_crtc_state *new_crtc_state)
>  {
>  	struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
> -	struct intel_crtc *slave, *master;
> +	struct intel_crtc *slave_crtc, *master_crtc;
>  
>  	/* slave being enabled, is master is still claiming this crtc? */
>  	if (old_crtc_state->bigjoiner_slave) {
> -		slave = crtc;
> -		master = old_crtc_state->bigjoiner_linked_crtc;
> -		master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> +		slave_crtc = crtc;
> +		master_crtc = old_crtc_state->bigjoiner_linked_crtc;
> +		master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
>  		if (!master_crtc_state || !intel_crtc_needs_modeset(master_crtc_state))
>  			goto claimed;
>  	}
> @@ -9206,17 +9211,17 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  	if (!new_crtc_state->bigjoiner)
>  		return 0;
>  
> -	slave = intel_dsc_get_bigjoiner_secondary(crtc);
> -	if (!slave) {
> +	slave_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
> +	if (!slave_crtc) {
>  		DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
>  			      "CRTC + 1 to be used, doesn't exist\n",
>  			      crtc->base.base.id, crtc->base.name);
>  		return -EINVAL;
>  	}
>  
> -	new_crtc_state->bigjoiner_linked_crtc = slave;
> -	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
> -	master = crtc;
> +	new_crtc_state->bigjoiner_linked_crtc = slave_crtc;
> +	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave_crtc);
> +	master_crtc = crtc;
>  	if (IS_ERR(slave_crtc_state))
>  		return PTR_ERR(slave_crtc_state);
>  
> @@ -9225,15 +9230,15 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  		goto claimed;
>  
>  	DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
> -		      slave->base.base.id, slave->base.name);
> +		      slave_crtc->base.base.id, slave_crtc->base.name);
>  
>  	return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
>  
>  claimed:
>  	DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
>  		      "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
> -		      slave->base.base.id, slave->base.name,
> -		      master->base.base.id, master->base.name);
> +		      slave_crtc->base.base.id, slave_crtc->base.name,
> +		      master_crtc->base.base.id, master_crtc->base.name);
>  	return -EINVAL;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc()

[Ville Syrjälä]

On Wed, Sep 15, 2021 at 01:24:32PM +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a helper to determine the master crtc for bigjoiner usage.
> > Also name the variables consistently.
> 
> I think this would be a good time to to rename bigjoiner {master, slave}
> to {primary, secondary}. The change is coming to bspec too though it's
> not there yet.

Argh. "Primary" is really an overloaded terms so not a fan of that
rename. Anyway, I'll wait until the spec catches up because
otherewise I'll have to remap in my brain which is just pointless
cognitive load.

> 
> BR,
> Jani.
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c     |  6 +--
> >  drivers/gpu/drm/i915/display/intel_display.c | 57 +++++++++++---------
> >  2 files changed, 33 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 4f7420dda8b5..4fbffce501dc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -2882,12 +2882,10 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
> >  	}
> >  
> >  	if (old_crtc_state->bigjoiner_linked_crtc) {
> > -		struct intel_atomic_state *state =
> > -			to_intel_atomic_state(old_crtc_state->uapi.state);
> > -		struct intel_crtc *slave =
> > +		struct intel_crtc *slave_crtc =
> >  			old_crtc_state->bigjoiner_linked_crtc;
> >  		const struct intel_crtc_state *old_slave_crtc_state =
> > -			intel_atomic_get_old_crtc_state(state, slave);
> > +			intel_atomic_get_old_crtc_state(state, slave_crtc);
> >  
> >  		intel_crtc_vblank_off(old_slave_crtc_state);
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 24214e6249a9..a5450ac9e2d0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -227,6 +227,14 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
> >  		is_trans_port_sync_slave(crtc_state);
> >  }
> >  
> > +static struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
> > +{
> > +	if (crtc_state->bigjoiner_slave)
> > +		return crtc_state->bigjoiner_linked_crtc;
> > +	else
> > +		return to_intel_crtc(crtc_state->uapi.crtc);
> > +}
> > +
> >  static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
> >  				    enum pipe pipe)
> >  {
> > @@ -2978,21 +2986,19 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
> >  static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
> >  					 const struct intel_crtc_state *crtc_state)
> >  {
> > -	struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
> > -	struct drm_i915_private *dev_priv = to_i915(master->base.dev);
> > +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> >  	struct intel_crtc_state *master_crtc_state;
> > +	struct intel_crtc *master_crtc;
> >  	struct drm_connector_state *conn_state;
> >  	struct drm_connector *conn;
> >  	struct intel_encoder *encoder = NULL;
> >  	int i;
> >  
> > -	if (crtc_state->bigjoiner_slave)
> > -		master = crtc_state->bigjoiner_linked_crtc;
> > -
> > -	master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> > +	master_crtc = intel_master_crtc(crtc_state);
> > +	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
> >  
> >  	for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
> > -		if (conn_state->crtc != &master->base)
> > +		if (conn_state->crtc != &master_crtc->base)
> >  			continue;
> >  
> >  		encoder = to_intel_encoder(conn_state->best_encoder);
> > @@ -3006,10 +3012,10 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
> >  		/*
> >  		 * Enable sequence steps 1-7 on bigjoiner master
> >  		 */
> > -		intel_encoders_pre_pll_enable(state, master);
> > +		intel_encoders_pre_pll_enable(state, master_crtc);
> >  		if (master_crtc_state->shared_dpll)
> >  			intel_enable_shared_dpll(master_crtc_state);
> > -		intel_encoders_pre_enable(state, master);
> > +		intel_encoders_pre_enable(state, master_crtc);
> >  
> >  		/* and DSC on slave */
> >  		intel_dsc_enable(NULL, crtc_state);
> > @@ -8462,7 +8468,7 @@ verify_crtc_state(struct intel_crtc *crtc,
> >  	struct intel_encoder *encoder;
> >  	struct intel_crtc_state *pipe_config = old_crtc_state;
> >  	struct drm_atomic_state *state = old_crtc_state->uapi.state;
> > -	struct intel_crtc *master = crtc;
> > +	struct intel_crtc *master_crtc;
> >  
> >  	__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
> >  	intel_crtc_free_hw_state(old_crtc_state);
> > @@ -8490,10 +8496,9 @@ verify_crtc_state(struct intel_crtc *crtc,
> >  			"(expected %i, found %i)\n",
> >  			new_crtc_state->hw.active, crtc->active);
> >  
> > -	if (new_crtc_state->bigjoiner_slave)
> > -		master = new_crtc_state->bigjoiner_linked_crtc;
> > +	master_crtc = intel_master_crtc(new_crtc_state);
> >  
> > -	for_each_encoder_on_crtc(dev, &master->base, encoder) {
> > +	for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
> >  		enum pipe pipe;
> >  		bool active;
> >  
> > @@ -8503,7 +8508,7 @@ verify_crtc_state(struct intel_crtc *crtc,
> >  				encoder->base.base.id, active,
> >  				new_crtc_state->hw.active);
> >  
> > -		I915_STATE_WARN(active && master->pipe != pipe,
> > +		I915_STATE_WARN(active && master_crtc->pipe != pipe,
> >  				"Encoder connected to wrong pipe %c\n",
> >  				pipe_name(pipe));
> >  
> > @@ -9192,13 +9197,13 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
> >  					struct intel_crtc_state *new_crtc_state)
> >  {
> >  	struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
> > -	struct intel_crtc *slave, *master;
> > +	struct intel_crtc *slave_crtc, *master_crtc;
> >  
> >  	/* slave being enabled, is master is still claiming this crtc? */
> >  	if (old_crtc_state->bigjoiner_slave) {
> > -		slave = crtc;
> > -		master = old_crtc_state->bigjoiner_linked_crtc;
> > -		master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> > +		slave_crtc = crtc;
> > +		master_crtc = old_crtc_state->bigjoiner_linked_crtc;
> > +		master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
> >  		if (!master_crtc_state || !intel_crtc_needs_modeset(master_crtc_state))
> >  			goto claimed;
> >  	}
> > @@ -9206,17 +9211,17 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
> >  	if (!new_crtc_state->bigjoiner)
> >  		return 0;
> >  
> > -	slave = intel_dsc_get_bigjoiner_secondary(crtc);
> > -	if (!slave) {
> > +	slave_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
> > +	if (!slave_crtc) {
> >  		DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
> >  			      "CRTC + 1 to be used, doesn't exist\n",
> >  			      crtc->base.base.id, crtc->base.name);
> >  		return -EINVAL;
> >  	}
> >  
> > -	new_crtc_state->bigjoiner_linked_crtc = slave;
> > -	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
> > -	master = crtc;
> > +	new_crtc_state->bigjoiner_linked_crtc = slave_crtc;
> > +	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave_crtc);
> > +	master_crtc = crtc;
> >  	if (IS_ERR(slave_crtc_state))
> >  		return PTR_ERR(slave_crtc_state);
> >  
> > @@ -9225,15 +9230,15 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
> >  		goto claimed;
> >  
> >  	DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
> > -		      slave->base.base.id, slave->base.name);
> > +		      slave_crtc->base.base.id, slave_crtc->base.name);
> >  
> >  	return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
> >  
> >  claimed:
> >  	DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
> >  		      "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
> > -		      slave->base.base.id, slave->base.name,
> > -		      master->base.base.id, master->base.name);
> > +		      slave_crtc->base.base.id, slave_crtc->base.name,
> > +		      master_crtc->base.base.id, master_crtc->base.name);
> >  	return -EINVAL;
> >  }
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Ville Syrjälä]

On Wed, Sep 15, 2021 at 12:00:28AM +0000, Souza, Jose wrote:
> On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> > On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > > On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > 
> > > > > Disabling planes in the middle of the modeset seuqnece does not make
> > > > > sense since userspace can anyway disable planes before the modeset
> > > > > even starts. So when the modeset seuqence starts the set of enabled
> > > > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > > > into the modeset sequence just means more randomness and potential
> > > > > for hard to reproduce bugs.
> > > > 
> > > > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> > > 
> > > The commit message only talks about planes. Also we already disable
> > > the pipe in the post_disable hook, so PSR/audio was always disabled
> > > before the pipe IIRC.
> > 
> > That is true, my bad.
> > 
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> Sorry I missed the intel_crtc_disable_planes() call, so here is the problem:
> 
> 
> intel_commit_modeset_disables()
> 	intel_old_crtc_state_disables()
> 		intel_crtc_disable_planes()
> 			intel_disable_plane()
> 		dev_priv->display.crtc_disable(state, crtc)/hsw_crtc_disable()
> 			intel_encoders_disable()
> 				encoder->disable()/intel_disable_ddi()
> 					intel_psr_disable()
> 			intel_encoders_post_disable()
> 				post_disable/intel_ddi_post_disable()
> 					intel_disable_pipe()
> 
> So all the planes are disabled while PSR is still on, that is why this patch fixed the underrun.
> 
> We need to call the pre_disable() before intel_crtc_disable_planes() and for the case where pipe is not disabled but all of its planes are requires
> the pending patch that I have.
> 
> Or do you have other suggestion?

I would like to follow the same sequence always, ie. disable planes
first (be it from userspace or from the kernel just before the modeset),
and then we take the exact same measures in both cases to deal with
whatever is the problem with PSR vs. disabled planes. That makes the
sequence as deterministic as possible, and thus we avoid potential
weird bugs stemming from userspace behaviour wrt. disabling planes.

Hmm. Our modeset plane disable code is certainly a bit lackluster.
It misses a bunch of stuff that we do for normal plane updates.
So we might want to put a few extra things in there. Maybe PSR
needs the vblank_get+psr_idle trick? And we might want a
vrr_push/etc. in there as well, not sure.

What exactly is your solution to the case where the planes are
already disabled by userspace?

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF

[Ville Syrjälä]

On Wed, Sep 15, 2021 at 01:16:58PM +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > PIPECONF becamse TRANSCONF when HSW introduced the EDP transcoder.
> > Bigjoiner is making life even more confusing by introducing
> > a N:1 relationship between pipes and transcoders. In that case
> > we only enable/configure the transcoder corresponding to the
> > master pipe. Let's do some renames to make it clear we're dealing
> > with the transcoder rather than pipe when it comes to
> > PIPECONF/TRANSCONF.
> >
> > I decided to leave the _cpu_ part out from the function/macro
> > names since the PCH transcoder related stuff already has a
> > _pch_ in their name. So shouldn't be possible to confuse them.
> 
> Wondering about flipping the names to intel_transcoder_enable and
> intel_transcoder_disable, with a potential move to a separate file.

If you're thinking about intel_transcoder.c then I doubts
about it making much sense. Seems a bit too specific,
and the transcoder vs. pipe split has been a rather fluid
over the years so not all platforms may even fit into the
same mold.

I think what we want to do to the modeset code in
intel_display.c is mainly just split on the high level vs.
low level boundary somewhere. But splitting the low level
code further is probably going to require more thought.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> 
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/g4x_dp.c        |  4 +--
> >  drivers/gpu/drm/i915/display/intel_crt.c     |  4 +--
> >  drivers/gpu/drm/i915/display/intel_ddi.c     |  4 +--
> >  drivers/gpu/drm/i915/display/intel_display.c | 28 ++++++++++----------
> >  drivers/gpu/drm/i915/display/intel_display.h | 12 ++++-----
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c  |  4 +--
> >  drivers/gpu/drm/i915/display/intel_dpll.c    | 12 ++++-----
> >  drivers/gpu/drm/i915/display/intel_fdi.c     |  2 +-
> >  drivers/gpu/drm/i915/display/intel_tv.c      |  2 +-
> >  9 files changed, 36 insertions(+), 36 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> > index 9577f6843f79..8e0620ae2ed1 100644
> > --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> > +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> > @@ -211,7 +211,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
> >  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >  
> > -	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> >  	assert_dp_port_disabled(intel_dp);
> >  	assert_edp_pll_disabled(dev_priv);
> >  
> > @@ -251,7 +251,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
> >  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >  
> > -	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> >  	assert_dp_port_disabled(intel_dp);
> >  	assert_edp_pll_enabled(dev_priv);
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> > index 408f82b0dc7d..1c161eeed82f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crt.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> > @@ -251,7 +251,7 @@ static void hsw_post_disable_crt(struct intel_atomic_state *state,
> >  
> >  	intel_crtc_vblank_off(old_crtc_state);
> >  
> > -	intel_disable_pipe(old_crtc_state);
> > +	intel_disable_transcoder(old_crtc_state);
> >  
> >  	intel_ddi_disable_transcoder_func(old_crtc_state);
> >  
> > @@ -314,7 +314,7 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
> >  
> >  	intel_ddi_enable_transcoder_func(encoder, crtc_state);
> >  
> > -	intel_enable_pipe(crtc_state);
> > +	intel_enable_transcoder(crtc_state);
> >  
> >  	lpt_pch_enable(crtc_state);
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index c1fd7cbb40e1..4f7420dda8b5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -2867,7 +2867,7 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
> >  	if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
> >  		intel_crtc_vblank_off(old_crtc_state);
> >  
> > -		intel_disable_pipe(old_crtc_state);
> > +		intel_disable_transcoder(old_crtc_state);
> >  
> >  		intel_vrr_disable(old_crtc_state);
> >  
> > @@ -3138,7 +3138,7 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
> >  
> >  	intel_vrr_enable(encoder, crtc_state);
> >  
> > -	intel_enable_pipe(crtc_state);
> > +	intel_enable_transcoder(crtc_state);
> >  
> >  	intel_crtc_vblank_on(crtc_state);
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index afa26911c236..1a0eac3da3f0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -120,7 +120,7 @@ static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_sta
> >  					 const struct intel_link_m_n *m2_n2);
> >  static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
> >  static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
> > -static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
> > +static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
> >  static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
> >  static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
> >  static void intel_modeset_setup_hw_state(struct drm_device *dev,
> > @@ -448,8 +448,8 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
> >  	     pipe_name(pipe));
> >  }
> >  
> > -void assert_pipe(struct drm_i915_private *dev_priv,
> > -		 enum transcoder cpu_transcoder, bool state)
> > +void assert_transcoder(struct drm_i915_private *dev_priv,
> > +		       enum transcoder cpu_transcoder, bool state)
> >  {
> >  	bool cur_state;
> >  	enum intel_display_power_domain power_domain;
> > @@ -766,7 +766,7 @@ enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc)
> >  		return crtc->pipe;
> >  }
> >  
> > -void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
> > +void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state)
> >  {
> >  	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > @@ -827,7 +827,7 @@ void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
> >  		intel_wait_for_pipe_scanline_moving(crtc);
> >  }
> >  
> > -void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
> > +void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state)
> >  {
> >  	struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > @@ -2883,7 +2883,7 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
> >  
> >  	if (dev_priv->display.initial_watermarks)
> >  		dev_priv->display.initial_watermarks(state, crtc);
> > -	intel_enable_pipe(new_crtc_state);
> > +	intel_enable_transcoder(new_crtc_state);
> >  
> >  	if (new_crtc_state->has_pch_encoder)
> >  		ilk_pch_enable(state, new_crtc_state);
> > @@ -3062,7 +3062,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> >  	}
> >  
> >  	if (!transcoder_is_dsi(cpu_transcoder))
> > -		hsw_set_pipeconf(new_crtc_state);
> > +		hsw_set_transconf(new_crtc_state);
> >  
> >  	crtc->active = true;
> >  
> > @@ -3157,7 +3157,7 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
> >  
> >  	intel_crtc_vblank_off(old_crtc_state);
> >  
> > -	intel_disable_pipe(old_crtc_state);
> > +	intel_disable_transcoder(old_crtc_state);
> >  
> >  	ilk_pfit_disable(old_crtc_state);
> >  
> > @@ -3219,7 +3219,7 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
> >  	 */
> >  	drm_WARN_ON(&dev_priv->drm,
> >  		    intel_de_read(dev_priv, PFIT_CONTROL) & PFIT_ENABLE);
> > -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	intel_de_write(dev_priv, PFIT_PGM_RATIOS,
> >  		       crtc_state->gmch_pfit.pgm_ratios);
> > @@ -3511,7 +3511,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
> >  	intel_disable_primary_plane(new_crtc_state);
> >  
> >  	dev_priv->display.initial_watermarks(state, crtc);
> > -	intel_enable_pipe(new_crtc_state);
> > +	intel_enable_transcoder(new_crtc_state);
> >  
> >  	intel_crtc_vblank_on(new_crtc_state);
> >  
> > @@ -3557,7 +3557,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
> >  		dev_priv->display.initial_watermarks(state, crtc);
> >  	else
> >  		intel_update_watermarks(crtc);
> > -	intel_enable_pipe(new_crtc_state);
> > +	intel_enable_transcoder(new_crtc_state);
> >  
> >  	intel_crtc_vblank_on(new_crtc_state);
> >  
> > @@ -3576,7 +3576,7 @@ static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
> >  	if (!old_crtc_state->gmch_pfit.control)
> >  		return;
> >  
> > -	assert_pipe_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
> >  
> >  	drm_dbg_kms(&dev_priv->drm, "disabling pfit, current: 0x%08x\n",
> >  		    intel_de_read(dev_priv, PFIT_CONTROL));
> > @@ -3602,7 +3602,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
> >  
> >  	intel_crtc_vblank_off(old_crtc_state);
> >  
> > -	intel_disable_pipe(old_crtc_state);
> > +	intel_disable_transcoder(old_crtc_state);
> >  
> >  	i9xx_pfit_disable(old_crtc_state);
> >  
> > @@ -5172,7 +5172,7 @@ static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
> >  	intel_de_posting_read(dev_priv, PIPECONF(pipe));
> >  }
> >  
> > -static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
> > +static void hsw_set_transconf(const struct intel_crtc_state *crtc_state)
> >  {
> >  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > index 4719ffc97fce..d425ee77aad7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -531,8 +531,8 @@ enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
> >  bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
> >  
> >  void intel_plane_destroy(struct drm_plane *plane);
> > -void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state);
> > -void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state);
> > +void intel_enable_transcoder(const struct intel_crtc_state *new_crtc_state);
> > +void intel_disable_transcoder(const struct intel_crtc_state *old_crtc_state);
> >  void i830_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
> >  void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe);
> >  enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc);
> > @@ -657,10 +657,10 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
> >  		       enum pipe pipe, bool state);
> >  #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
> >  #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
> > -void assert_pipe(struct drm_i915_private *dev_priv,
> > -		 enum transcoder cpu_transcoder, bool state);
> > -#define assert_pipe_enabled(d, t) assert_pipe(d, t, true)
> > -#define assert_pipe_disabled(d, t) assert_pipe(d, t, false)
> > +void assert_transcoder(struct drm_i915_private *dev_priv,
> > +		       enum transcoder cpu_transcoder, bool state);
> > +#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
> > +#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
> >  
> >  /* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
> >   * WARN_ON()) for hw state sanity checks to check for unexpected conditions
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 914bea983a28..9f1fc1a68ed2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -398,7 +398,7 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
> >  
> >  	intel_crtc_vblank_off(old_crtc_state);
> >  
> > -	intel_disable_pipe(old_crtc_state);
> > +	intel_disable_transcoder(old_crtc_state);
> >  
> >  	drm_dp_update_payload_part2(&intel_dp->mst_mgr);
> >  
> > @@ -559,7 +559,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
> >  		intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
> >  			     FECSTALL_DIS_DPTSTREAM_DPTTG);
> >  
> > -	intel_enable_pipe(pipe_config);
> > +	intel_enable_transcoder(pipe_config);
> >  
> >  	intel_crtc_vblank_on(pipe_config);
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> > index ace9157a1c30..487d8721ecf8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> > @@ -1402,7 +1402,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)
> >  	enum pipe pipe = crtc->pipe;
> >  	int i;
> >  
> > -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	/* PLL is protected by panel, make sure we can write it */
> >  	if (i9xx_has_pps(dev_priv))
> > @@ -1582,7 +1582,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >  	enum pipe pipe = crtc->pipe;
> >  
> > -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	/* PLL is protected by panel, make sure we can write it */
> >  	assert_panel_unlocked(dev_priv, pipe);
> > @@ -1734,7 +1734,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)
> >  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >  	enum pipe pipe = crtc->pipe;
> >  
> > -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	/* PLL is protected by panel, make sure we can write it */
> >  	assert_panel_unlocked(dev_priv, pipe);
> > @@ -1818,7 +1818,7 @@ void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
> >  	u32 val;
> >  
> >  	/* Make sure the pipe isn't still relying on us */
> > -	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
> > +	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
> >  
> >  	val = DPLL_INTEGRATED_REF_CLK_VLV |
> >  		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> > @@ -1835,7 +1835,7 @@ void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
> >  	u32 val;
> >  
> >  	/* Make sure the pipe isn't still relying on us */
> > -	assert_pipe_disabled(dev_priv, (enum transcoder)pipe);
> > +	assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
> >  
> >  	val = DPLL_SSC_REF_CLK_CHV |
> >  		DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> > @@ -1866,7 +1866,7 @@ void i9xx_disable_pll(const struct intel_crtc_state *crtc_state)
> >  		return;
> >  
> >  	/* Make sure the pipe isn't still relying on us */
> > -	assert_pipe_disabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	intel_de_write(dev_priv, DPLL(pipe), DPLL_VGA_MODE_DIS);
> >  	intel_de_posting_read(dev_priv, DPLL(pipe));
> > diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> > index fc09b781f15f..96ff12ad0873 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> > @@ -281,7 +281,7 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
> >  		       intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
> >  
> >  	/* FDI needs bits from pipe first */
> > -	assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
> > +	assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);
> >  
> >  	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
> >  	   for train result */
> > diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
> > index d02f09f7e750..88a398df9621 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tv.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> > @@ -1529,7 +1529,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
> >  		intel_de_write(dev_priv, TV_CLR_LEVEL,
> >  			       ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
> >  
> > -	assert_pipe_disabled(dev_priv, pipe_config->cpu_transcoder);
> > +	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> >  
> >  	/* Filter ctl must be set before TV_WIN_SIZE */
> >  	tv_filter_ctl = TV_AUTO_SCALE;
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 05/16] drm/i915: s/pipe/transcoder/ when dealing with PIPECONF/TRANSCONF

[Jani Nikula]

On Wed, 15 Sep 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, Sep 15, 2021 at 01:16:58PM +0300, Jani Nikula wrote:
>> On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
>> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >
>> > PIPECONF becamse TRANSCONF when HSW introduced the EDP transcoder.
>> > Bigjoiner is making life even more confusing by introducing
>> > a N:1 relationship between pipes and transcoders. In that case
>> > we only enable/configure the transcoder corresponding to the
>> > master pipe. Let's do some renames to make it clear we're dealing
>> > with the transcoder rather than pipe when it comes to
>> > PIPECONF/TRANSCONF.
>> >
>> > I decided to leave the _cpu_ part out from the function/macro
>> > names since the PCH transcoder related stuff already has a
>> > _pch_ in their name. So shouldn't be possible to confuse them.
>> 
>> Wondering about flipping the names to intel_transcoder_enable and
>> intel_transcoder_disable, with a potential move to a separate file.
>
> If you're thinking about intel_transcoder.c then I doubts
> about it making much sense. Seems a bit too specific,
> and the transcoder vs. pipe split has been a rather fluid
> over the years so not all platforms may even fit into the
> same mold.
>
> I think what we want to do to the modeset code in
> intel_display.c is mainly just split on the high level vs.
> low level boundary somewhere. But splitting the low level
> code further is probably going to require more thought.

Yeah, just throwing ideas around, really.

We could start with a new intel_modeset.[ch] and start moving the high
level modeset functions there? Because moving everything else out from
intel_display.c is going to take forever, so it's perhaps easier to move
the high level stuff instead. *shrug*

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 06/16] drm/i915: Introduce with_intel_display_power_if_enabled()

[Jani Nikula]

On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add the _if_enabled() counterpart to with_intel_display_power().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Looks like there's plenty of code that could use this.

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.h | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 978531841fa3..0612e4b6e3c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -410,6 +410,10 @@ void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
>  	for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
>  	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
>  
> +#define with_intel_display_power_if_enabled(i915, domain, wf) \
> +	for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
> +	     intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
> +
>  void chv_phy_powergate_lanes(struct intel_encoder *encoder,
>  			     bool override, unsigned int mask);
>  bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner()

[Ville Syrjälä]

On Wed, Sep 15, 2021 at 01:12:26PM +0300, Jani Nikula wrote:
> On Mon, 13 Sep 2021, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Suck the "do we need bigjoiner?" checks into a helper instead of
> > duplicating them in two differentt places.
> 
> Could've called it intel_dp_need_bigjoiner() but meh.

Gave it a fresh coat of paint while pushing.

> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Ta. Pushed patches 3-8.

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Souza, Jose]

On Wed, 2021-09-15 at 15:30 +0300, Ville Syrjälä wrote:
> On Wed, Sep 15, 2021 at 12:00:28AM +0000, Souza, Jose wrote:
> > On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> > > On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > > > On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > > > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > 
> > > > > > Disabling planes in the middle of the modeset seuqnece does not make
> > > > > > sense since userspace can anyway disable planes before the modeset
> > > > > > even starts. So when the modeset seuqence starts the set of enabled
> > > > > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > > > > into the modeset sequence just means more randomness and potential
> > > > > > for hard to reproduce bugs.
> > > > > 
> > > > > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> > > > 
> > > > The commit message only talks about planes. Also we already disable
> > > > the pipe in the post_disable hook, so PSR/audio was always disabled
> > > > before the pipe IIRC.
> > > 
> > > That is true, my bad.
> > > 
> > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > 
> > Sorry I missed the intel_crtc_disable_planes() call, so here is the problem:
> > 
> > 
> > intel_commit_modeset_disables()
> > 	intel_old_crtc_state_disables()
> > 		intel_crtc_disable_planes()
> > 			intel_disable_plane()
> > 		dev_priv->display.crtc_disable(state, crtc)/hsw_crtc_disable()
> > 			intel_encoders_disable()
> > 				encoder->disable()/intel_disable_ddi()
> > 					intel_psr_disable()
> > 			intel_encoders_post_disable()
> > 				post_disable/intel_ddi_post_disable()
> > 					intel_disable_pipe()
> > 
> > So all the planes are disabled while PSR is still on, that is why this patch fixed the underrun.
> > 
> > We need to call the pre_disable() before intel_crtc_disable_planes() and for the case where pipe is not disabled but all of its planes are requires
> > the pending patch that I have.
> > 
> > Or do you have other suggestion?
> 
> I would like to follow the same sequence always, ie. disable planes
> first (be it from userspace or from the kernel just before the modeset),
> and then we take the exact same measures in both cases to deal with
> whatever is the problem with PSR vs. disabled planes. That makes the
> sequence as deterministic as possible, and thus we avoid potential
> weird bugs stemming from userspace behaviour wrt. disabling planes.
> 
> Hmm. Our modeset plane disable code is certainly a bit lackluster.
> It misses a bunch of stuff that we do for normal plane updates.
> So we might want to put a few extra things in there. Maybe PSR
> needs the vblank_get+psr_idle trick? And we might want a
> vrr_push/etc. in there as well, not sure.
> 
> What exactly is your solution to the case where the planes are
> already disabled by userspace?

https://github.com/zehortigoza/linux/commit/013478a67e0b96abbaf6ab2d1b4be324b0fe737b

Whole branch: https://github.com/zehortigoza/linux/commits/upstream-psr2-sel-fetch-new

> 

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Ville Syrjälä]

On Wed, Sep 15, 2021 at 08:19:41PM +0000, Souza, Jose wrote:
> On Wed, 2021-09-15 at 15:30 +0300, Ville Syrjälä wrote:
> > On Wed, Sep 15, 2021 at 12:00:28AM +0000, Souza, Jose wrote:
> > > On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> > > > On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > > > > On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > > > > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > 
> > > > > > > Disabling planes in the middle of the modeset seuqnece does not make
> > > > > > > sense since userspace can anyway disable planes before the modeset
> > > > > > > even starts. So when the modeset seuqence starts the set of enabled
> > > > > > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > > > > > into the modeset sequence just means more randomness and potential
> > > > > > > for hard to reproduce bugs.
> > > > > > 
> > > > > > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> > > > > 
> > > > > The commit message only talks about planes. Also we already disable
> > > > > the pipe in the post_disable hook, so PSR/audio was always disabled
> > > > > before the pipe IIRC.
> > > > 
> > > > That is true, my bad.
> > > > 
> > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > 
> > > Sorry I missed the intel_crtc_disable_planes() call, so here is the problem:
> > > 
> > > 
> > > intel_commit_modeset_disables()
> > > 	intel_old_crtc_state_disables()
> > > 		intel_crtc_disable_planes()
> > > 			intel_disable_plane()
> > > 		dev_priv->display.crtc_disable(state, crtc)/hsw_crtc_disable()
> > > 			intel_encoders_disable()
> > > 				encoder->disable()/intel_disable_ddi()
> > > 					intel_psr_disable()
> > > 			intel_encoders_post_disable()
> > > 				post_disable/intel_ddi_post_disable()
> > > 					intel_disable_pipe()
> > > 
> > > So all the planes are disabled while PSR is still on, that is why this patch fixed the underrun.
> > > 
> > > We need to call the pre_disable() before intel_crtc_disable_planes() and for the case where pipe is not disabled but all of its planes are requires
> > > the pending patch that I have.
> > > 
> > > Or do you have other suggestion?
> > 
> > I would like to follow the same sequence always, ie. disable planes
> > first (be it from userspace or from the kernel just before the modeset),
> > and then we take the exact same measures in both cases to deal with
> > whatever is the problem with PSR vs. disabled planes. That makes the
> > sequence as deterministic as possible, and thus we avoid potential
> > weird bugs stemming from userspace behaviour wrt. disabling planes.
> > 
> > Hmm. Our modeset plane disable code is certainly a bit lackluster.
> > It misses a bunch of stuff that we do for normal plane updates.
> > So we might want to put a few extra things in there. Maybe PSR
> > needs the vblank_get+psr_idle trick? And we might want a
> > vrr_push/etc. in there as well, not sure.
> > 
> > What exactly is your solution to the case where the planes are
> > already disabled by userspace?
> 
> https://github.com/zehortigoza/linux/commit/013478a67e0b96abbaf6ab2d1b4be324b0fe737b

That's not going to work correctly. You can't depend on
connectors being part of the state since that's not the case for
pure plane updates/etc.

In general I really dislike the PSR code's reliance on the
encoder/connector. Tht makes it really hard to do these sorts
of things. So I think we'd have to redesign it to try to
operate purely on the crtc and not need the encoder/connector.

> 
> Whole branch: https://github.com/zehortigoza/linux/commits/upstream-psr2-sel-fetch-new
> 
> > 
> 

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/16] Revert "drm/i915/display: Disable audio, DRRS and PSR before planes"

[Souza, Jose]

On Thu, 2021-09-16 at 16:21 +0300, Ville Syrjälä wrote:
> On Wed, Sep 15, 2021 at 08:19:41PM +0000, Souza, Jose wrote:
> > On Wed, 2021-09-15 at 15:30 +0300, Ville Syrjälä wrote:
> > > On Wed, Sep 15, 2021 at 12:00:28AM +0000, Souza, Jose wrote:
> > > > On Tue, 2021-09-14 at 16:30 -0700, José Roberto de Souza wrote:
> > > > > On Tue, 2021-09-14 at 11:20 +0300, Ville Syrjälä wrote:
> > > > > > On Mon, Sep 13, 2021 at 04:28:35PM +0000, Souza, Jose wrote:
> > > > > > > On Mon, 2021-09-13 at 17:44 +0300, Ville Syrjala wrote:
> > > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > > 
> > > > > > > > Disabling planes in the middle of the modeset seuqnece does not make
> > > > > > > > sense since userspace can anyway disable planes before the modeset
> > > > > > > > even starts. So when the modeset seuqence starts the set of enabled
> > > > > > > > planes is entirely arbitrary. Trying to sprinkle the plane disabling
> > > > > > > > into the modeset sequence just means more randomness and potential
> > > > > > > > for hard to reproduce bugs.
> > > > > > > 
> > > > > > > The patch being reverted did not changed anything about plane, it only disables audio and PSR before pipe is disabled in this case.
> > > > > > 
> > > > > > The commit message only talks about planes. Also we already disable
> > > > > > the pipe in the post_disable hook, so PSR/audio was always disabled
> > > > > > before the pipe IIRC.
> > > > > 
> > > > > That is true, my bad.
> > > > > 
> > > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > > > 
> > > > Sorry I missed the intel_crtc_disable_planes() call, so here is the problem:
> > > > 
> > > > 
> > > > intel_commit_modeset_disables()
> > > > 	intel_old_crtc_state_disables()
> > > > 		intel_crtc_disable_planes()
> > > > 			intel_disable_plane()
> > > > 		dev_priv->display.crtc_disable(state, crtc)/hsw_crtc_disable()
> > > > 			intel_encoders_disable()
> > > > 				encoder->disable()/intel_disable_ddi()
> > > > 					intel_psr_disable()
> > > > 			intel_encoders_post_disable()
> > > > 				post_disable/intel_ddi_post_disable()
> > > > 					intel_disable_pipe()
> > > > 
> > > > So all the planes are disabled while PSR is still on, that is why this patch fixed the underrun.
> > > > 
> > > > We need to call the pre_disable() before intel_crtc_disable_planes() and for the case where pipe is not disabled but all of its planes are requires
> > > > the pending patch that I have.
> > > > 
> > > > Or do you have other suggestion?
> > > 
> > > I would like to follow the same sequence always, ie. disable planes
> > > first (be it from userspace or from the kernel just before the modeset),
> > > and then we take the exact same measures in both cases to deal with
> > > whatever is the problem with PSR vs. disabled planes. That makes the
> > > sequence as deterministic as possible, and thus we avoid potential
> > > weird bugs stemming from userspace behaviour wrt. disabling planes.
> > > 
> > > Hmm. Our modeset plane disable code is certainly a bit lackluster.
> > > It misses a bunch of stuff that we do for normal plane updates.
> > > So we might want to put a few extra things in there. Maybe PSR
> > > needs the vblank_get+psr_idle trick? And we might want a
> > > vrr_push/etc. in there as well, not sure.
> > > 
> > > What exactly is your solution to the case where the planes are
> > > already disabled by userspace?
> > 
> > https://github.com/zehortigoza/linux/commit/013478a67e0b96abbaf6ab2d1b4be324b0fe737b
> 
> That's not going to work correctly. You can't depend on
> connectors being part of the state since that's not the case for
> pure plane updates/etc.

Thanks for catching it, fixed here: https://github.com/zehortigoza/linux/commit/77f3dd1e1dccdf25d04cb42a45b95570b2d3d3e8

> 
> In general I really dislike the PSR code's reliance on the
> encoder/connector. Tht makes it really hard to do these sorts
> of things. So I think we'd have to redesign it to try to
> operate purely on the crtc and not need the encoder/connector.

I can help with reviews if you want to do that.

> 
> > 
> > Whole branch: https://github.com/zehortigoza/linux/commits/upstream-psr2-sel-fetch-new
> > 
> > > 
> > 
> 

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:26PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's disable planes on all pipes affected by the modeset before
> we start doing the actual modeset. This means we have less
> random planes enabled during the modeset, and it also mirrors
> what we already do when enabling pipes on skl+ since we enable
> planes on all pipes as the very last step. As a bonus we also
> nuke a bunch og bigjoiner special casing.
> 
> I've occasionally pondered about going even furher here and
> doing the pre_plane_update() stuff for all pipes first, then
> actually disabling the planes, and finally running the rest
> of the modeset sequence. This would potentially allow
> parallelizing all the extra vblank waits across multiple pipes,
> and would make the plane disable even more atomic. But let's
> go one step a time here.

So you are moving the plane disables all together in the commit_disables()?
But dont we need to pass old_crtc_state->bigjoiner_linked_crtc) crtc in case of bigjoiner?
How is that handled?

Regards
Manasi

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
>  1 file changed, 13 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index cd150512d275..afa26911c236 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9785,18 +9785,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>  
>  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
>  
> -	intel_crtc_disable_planes(state, crtc);
> -
>  	/*
>  	 * We still need special handling for disabling bigjoiner master
>  	 * and slaves since for slave we do not have encoder or plls
>  	 * so we dont need to disable those.
>  	 */
> -	if (old_crtc_state->bigjoiner) {
> -		intel_crtc_disable_planes(state,
> -					  old_crtc_state->bigjoiner_linked_crtc);
> +	if (old_crtc_state->bigjoiner)
>  		old_crtc_state->bigjoiner_linked_crtc->active = false;
> -	}
>  
>  	/*
>  	 * We need to disable pipe CRC before disabling the pipe,
> @@ -9823,6 +9818,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  	u32 handled = 0;
>  	int i;
>  
> +	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> +					    new_crtc_state, i) {
> +		if (!intel_crtc_needs_modeset(new_crtc_state))
> +			continue;
> +
> +		if (!old_crtc_state->hw.active)
> +			continue;
> +
> +		intel_pre_plane_update(state, crtc);
> +		intel_crtc_disable_planes(state, crtc);
> +	}
> +
>  	/* Only disable port sync and MST slaves */
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
> @@ -9841,7 +9848,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  		    !intel_dp_mst_is_slave_trans(old_crtc_state))
>  			continue;
>  
> -		intel_pre_plane_update(state, crtc);
>  		intel_old_crtc_state_disables(state, old_crtc_state,
>  					      new_crtc_state, crtc);
>  		handled |= BIT(crtc->pipe);
> @@ -9855,14 +9861,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  		    old_crtc_state->bigjoiner_slave)
>  			continue;
>  
> -		intel_pre_plane_update(state, crtc);
> -		if (old_crtc_state->bigjoiner) {
> -			struct intel_crtc *slave =
> -				old_crtc_state->bigjoiner_linked_crtc;
> -
> -			intel_pre_plane_update(state, slave);
> -		}
> -
>  		if (old_crtc_state->hw.active)
>  			intel_old_crtc_state_disables(state, old_crtc_state,
>  						      new_crtc_state, crtc);
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 03/16] drm/i915: Extract intel_dp_use_bigjoiner()

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:27PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Suck the "do we need bigjoiner?" checks into a helper instead of
> duplicating them in two differentt places.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 19 ++++++++++++++-----
>  1 file changed, 14 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 161c33b2c869..e898834cc5f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -805,6 +805,17 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> +static bool intel_dp_use_bigjoiner(struct intel_dp *intel_dp,
> +				   int hdisplay, int clock)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +
> +	if (!intel_dp_can_bigjoiner(intel_dp))
> +		return false;
> +
> +	return clock > i915->max_dotclk_freq || hdisplay > 5120;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mode_valid(struct drm_connector *connector,
>  		    struct drm_display_mode *mode)
> @@ -840,8 +851,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode->clock < 10000)
>  		return MODE_CLOCK_LOW;
>  
> -	if ((target_clock > max_dotclk || mode->hdisplay > 5120) &&
> -	    intel_dp_can_bigjoiner(intel_dp)) {
> +	if (intel_dp_use_bigjoiner(intel_dp, mode->hdisplay, target_clock)) {
>  		bigjoiner = true;
>  		max_dotclk *= 2;
>  	}
> @@ -1457,9 +1467,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  		    limits.max_lane_count, limits.max_rate,
>  		    limits.max_bpp, adjusted_mode->crtc_clock);
>  
> -	if ((adjusted_mode->crtc_clock > i915->max_dotclk_freq ||
> -	     adjusted_mode->crtc_hdisplay > 5120) &&
> -	    intel_dp_can_bigjoiner(intel_dp))
> +	if (intel_dp_use_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
> +				   adjusted_mode->crtc_clock))
>  		pipe_config->bigjoiner = true;
>  
>  	/*
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 09/16] drm/i915: Pimp HSW+ transcoder state readout

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:33PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Adjust the HSW+ transcoder state readout to just read through
> all the possible transcoders for the pipe, and stuff the results
> in a bitmask.
> 
> We can conveniently cross check the bitmask for invalid
> combinations of enabled transcoders, and later we can easily
> extend the bitmask readout to handle the bigjoiner case.
> 
> One slight change in behaviour is that we no longer read out
> the AONOFF->force_pfit.pfit bit for all the enabled "panel
> transcoders". But having more than one enabled would anyway
> be illegal so no big loss. Also the AONOFF selection should
> only ever be used on HSW, which only has the EDP transcoder
> an no DSI transcoders.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Looks good to me

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 130 ++++++++++++++-----
>  1 file changed, 95 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 3848f7963cec..2430142b0337 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5577,6 +5577,21 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>  	return ret;
>  }
>  
> +static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
> +					   enum transcoder cpu_transcoder)
> +{
> +	enum intel_display_power_domain power_domain;
> +	intel_wakeref_t wakeref;
> +	u32 tmp = 0;
> +
> +	power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> +
> +	with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
> +		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> +
> +	return tmp & TRANS_DDI_FUNC_ENABLE;
> +}
> +
>  static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
>  {
>  	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> @@ -5587,55 +5602,39 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
>  	return panel_transcoder_mask;
>  }
>  
> -static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> -				     struct intel_crtc_state *pipe_config,
> -				     struct intel_display_power_domain_set *power_domain_set)
> +static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
>  {
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
> -	unsigned long enabled_panel_transcoders = 0;
> -	enum transcoder panel_transcoder;
> -	u32 tmp;
> -
> -	/*
> -	 * The pipe->transcoder mapping is fixed with the exception of the eDP
> -	 * and DSI transcoders handled below.
> -	 */
> -	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> +	enum transcoder cpu_transcoder;
> +	u8 enabled_transcoders = 0;
>  
>  	/*
>  	 * XXX: Do intel_display_power_get_if_enabled before reading this (for
>  	 * consistency and less surprising code; it's in always on power).
>  	 */
> -	for_each_cpu_transcoder_masked(dev_priv, panel_transcoder,
> +	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder,
>  				       panel_transcoder_mask) {
> -		bool force_thru = false;
> +		enum intel_display_power_domain power_domain;
> +		intel_wakeref_t wakeref;
>  		enum pipe trans_pipe;
> +		u32 tmp = 0;
> +
> +		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> +		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
> +			tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
>  
> -		tmp = intel_de_read(dev_priv,
> -				    TRANS_DDI_FUNC_CTL(panel_transcoder));
>  		if (!(tmp & TRANS_DDI_FUNC_ENABLE))
>  			continue;
>  
> -		/*
> -		 * Log all enabled ones, only use the first one.
> -		 *
> -		 * FIXME: This won't work for two separate DSI displays.
> -		 */
> -		enabled_panel_transcoders |= BIT(panel_transcoder);
> -		if (enabled_panel_transcoders != BIT(panel_transcoder))
> -			continue;
> -
>  		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
>  		default:
>  			drm_WARN(dev, 1,
>  				 "unknown pipe linked to transcoder %s\n",
> -				 transcoder_name(panel_transcoder));
> +				 transcoder_name(cpu_transcoder));
>  			fallthrough;
>  		case TRANS_DDI_EDP_INPUT_A_ONOFF:
> -			force_thru = true;
> -			fallthrough;
>  		case TRANS_DDI_EDP_INPUT_A_ON:
>  			trans_pipe = PIPE_A;
>  			break;
> @@ -5650,22 +5649,83 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
>  			break;
>  		}
>  
> -		if (trans_pipe == crtc->pipe) {
> -			pipe_config->cpu_transcoder = panel_transcoder;
> -			pipe_config->pch_pfit.force_thru = force_thru;
> -		}
> +		if (trans_pipe == crtc->pipe)
> +			enabled_transcoders |= BIT(cpu_transcoder);
>  	}
>  
> +	cpu_transcoder = (enum transcoder) crtc->pipe;
> +	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
> +		enabled_transcoders |= BIT(cpu_transcoder);
> +
> +	return enabled_transcoders;
> +}
> +
> +static bool has_edp_transcoders(u8 enabled_transcoders)
> +{
> +	return enabled_transcoders & BIT(TRANSCODER_EDP);
> +}
> +
> +static bool has_dsi_transcoders(u8 enabled_transcoders)
> +{
> +	return enabled_transcoders & (BIT(TRANSCODER_DSI_0) |
> +				      BIT(TRANSCODER_DSI_1));
> +}
> +
> +static bool has_pipe_transcoders(u8 enabled_transcoders)
> +{
> +	return enabled_transcoders & ~(BIT(TRANSCODER_EDP) |
> +				       BIT(TRANSCODER_DSI_0) |
> +				       BIT(TRANSCODER_DSI_1));
> +}
> +
> +static void assert_enabled_transcoders(struct drm_i915_private *i915,
> +				       u8 enabled_transcoders)
> +{
> +	/* Only one type of transcoder please */
> +	drm_WARN_ON(&i915->drm,
> +		    has_edp_transcoders(enabled_transcoders) +
> +		    has_dsi_transcoders(enabled_transcoders) +
> +		    has_pipe_transcoders(enabled_transcoders) > 1);
> +
> +	/* Only DSI transcoders can be ganged */
> +	drm_WARN_ON(&i915->drm,
> +		    !has_dsi_transcoders(enabled_transcoders) &&
> +		    !is_power_of_2(enabled_transcoders));
> +}
> +
> +static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> +				     struct intel_crtc_state *pipe_config,
> +				     struct intel_display_power_domain_set *power_domain_set)
> +{
> +	struct drm_device *dev = crtc->base.dev;
> +	struct drm_i915_private *dev_priv = to_i915(dev);
> +	unsigned long enabled_transcoders;
> +	u32 tmp;
> +
> +	enabled_transcoders = hsw_enabled_transcoders(crtc);
> +	if (!enabled_transcoders)
> +		return false;
> +
> +	assert_enabled_transcoders(dev_priv, enabled_transcoders);
> +
>  	/*
> -	 * Valid combos: none, eDP, DSI0, DSI1, DSI0+DSI1
> +	 * With the exception of DSI we should only ever have
> +	 * a single enabled transcoder. With DSI let's just
> +	 * pick the first one.
>  	 */
> -	drm_WARN_ON(dev, (enabled_panel_transcoders & BIT(TRANSCODER_EDP)) &&
> -		    enabled_panel_transcoders != BIT(TRANSCODER_EDP));
> +	pipe_config->cpu_transcoder = ffs(enabled_transcoders) - 1;
>  
>  	if (!intel_display_power_get_in_set_if_enabled(dev_priv, power_domain_set,
>  						       POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
>  		return false;
>  
> +	if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) {
> +		tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
> +
> +		if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == TRANS_DDI_EDP_INPUT_A_ONOFF)
> +			pipe_config->pch_pfit.force_thru = true;
> +	}
> +
>  	tmp = intel_de_read(dev_priv, PIPECONF(pipe_config->cpu_transcoder));
>  
>  	return tmp & PIPECONF_ENABLE;
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 10/16] drm/i915: Configure TRANSCONF just the once with bigjoiner

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:34PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's not configure the single transcoder's TRANSCONF multiple
> times with bigjoiner. No real harm I suppose but since we already
> have the bigjoiner if statement directly above might as well suck
> this in there and skip the redundant programming.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Yes I agree

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 2430142b0337..24214e6249a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3059,10 +3059,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>  						     &new_crtc_state->fdi_m_n, NULL);
>  
>  		hsw_set_frame_start_delay(new_crtc_state);
> -	}
>  
> -	if (!transcoder_is_dsi(cpu_transcoder))
>  		hsw_set_transconf(new_crtc_state);
> +	}
>  
>  	crtc->active = true;
>  
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes

[Ville Syrjälä]

On Mon, Sep 20, 2021 at 12:52:15AM -0700, Navare, Manasi wrote:
> On Mon, Sep 13, 2021 at 05:44:26PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Let's disable planes on all pipes affected by the modeset before
> > we start doing the actual modeset. This means we have less
> > random planes enabled during the modeset, and it also mirrors
> > what we already do when enabling pipes on skl+ since we enable
> > planes on all pipes as the very last step. As a bonus we also
> > nuke a bunch og bigjoiner special casing.
> > 
> > I've occasionally pondered about going even furher here and
> > doing the pre_plane_update() stuff for all pipes first, then
> > actually disabling the planes, and finally running the rest
> > of the modeset sequence. This would potentially allow
> > parallelizing all the extra vblank waits across multiple pipes,
> > and would make the plane disable even more atomic. But let's
> > go one step a time here.
> 
> So you are moving the plane disables all together in the commit_disables()?
> But dont we need to pass old_crtc_state->bigjoiner_linked_crtc) crtc in case of bigjoiner?
> How is that handled?

Whether bigjoiner is used or not is irrelevant when disabling the
planes.

> 
> Regards
> Manasi
> 
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
> >  1 file changed, 13 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index cd150512d275..afa26911c236 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -9785,18 +9785,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> >  
> >  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> >  
> > -	intel_crtc_disable_planes(state, crtc);
> > -
> >  	/*
> >  	 * We still need special handling for disabling bigjoiner master
> >  	 * and slaves since for slave we do not have encoder or plls
> >  	 * so we dont need to disable those.
> >  	 */
> > -	if (old_crtc_state->bigjoiner) {
> > -		intel_crtc_disable_planes(state,
> > -					  old_crtc_state->bigjoiner_linked_crtc);
> > +	if (old_crtc_state->bigjoiner)
> >  		old_crtc_state->bigjoiner_linked_crtc->active = false;
> > -	}
> >  
> >  	/*
> >  	 * We need to disable pipe CRC before disabling the pipe,
> > @@ -9823,6 +9818,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> >  	u32 handled = 0;
> >  	int i;
> >  
> > +	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > +					    new_crtc_state, i) {
> > +		if (!intel_crtc_needs_modeset(new_crtc_state))
> > +			continue;
> > +
> > +		if (!old_crtc_state->hw.active)
> > +			continue;
> > +
> > +		intel_pre_plane_update(state, crtc);
> > +		intel_crtc_disable_planes(state, crtc);
> > +	}
> > +
> >  	/* Only disable port sync and MST slaves */
> >  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> >  					    new_crtc_state, i) {
> > @@ -9841,7 +9848,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> >  		    !intel_dp_mst_is_slave_trans(old_crtc_state))
> >  			continue;
> >  
> > -		intel_pre_plane_update(state, crtc);
> >  		intel_old_crtc_state_disables(state, old_crtc_state,
> >  					      new_crtc_state, crtc);
> >  		handled |= BIT(crtc->pipe);
> > @@ -9855,14 +9861,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> >  		    old_crtc_state->bigjoiner_slave)
> >  			continue;
> >  
> > -		intel_pre_plane_update(state, crtc);
> > -		if (old_crtc_state->bigjoiner) {
> > -			struct intel_crtc *slave =
> > -				old_crtc_state->bigjoiner_linked_crtc;
> > -
> > -			intel_pre_plane_update(state, slave);
> > -		}
> > -
> >  		if (old_crtc_state->hw.active)
> >  			intel_old_crtc_state_disables(state, old_crtc_state,
> >  						      new_crtc_state, crtc);
> > -- 
> > 2.32.0
> > 

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Disable all planes before modesetting any pipes

[Navare, Manasi]

On Tue, Sep 21, 2021 at 03:49:24PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 20, 2021 at 12:52:15AM -0700, Navare, Manasi wrote:
> > On Mon, Sep 13, 2021 at 05:44:26PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Let's disable planes on all pipes affected by the modeset before
> > > we start doing the actual modeset. This means we have less
> > > random planes enabled during the modeset, and it also mirrors
> > > what we already do when enabling pipes on skl+ since we enable
> > > planes on all pipes as the very last step. As a bonus we also
> > > nuke a bunch og bigjoiner special casing.
> > > 
> > > I've occasionally pondered about going even furher here and
> > > doing the pre_plane_update() stuff for all pipes first, then
> > > actually disabling the planes, and finally running the rest
> > > of the modeset sequence. This would potentially allow
> > > parallelizing all the extra vblank waits across multiple pipes,
> > > and would make the plane disable even more atomic. But let's
> > > go one step a time here.
> > 
> > So you are moving the plane disables all together in the commit_disables()?
> > But dont we need to pass old_crtc_state->bigjoiner_linked_crtc) crtc in case of bigjoiner?
> > How is that handled?
> 
> Whether bigjoiner is used or not is irrelevant when disabling the
> planes.
>

So basically now you disable planes for all the crtcs in state that have been active?

Makes sense to me

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi
 
> > 
> > Regards
> > Manasi
> > 
> > > 
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 28 +++++++++-----------
> > >  1 file changed, 13 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index cd150512d275..afa26911c236 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -9785,18 +9785,13 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> > >  
> > >  	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> > >  
> > > -	intel_crtc_disable_planes(state, crtc);
> > > -
> > >  	/*
> > >  	 * We still need special handling for disabling bigjoiner master
> > >  	 * and slaves since for slave we do not have encoder or plls
> > >  	 * so we dont need to disable those.
> > >  	 */
> > > -	if (old_crtc_state->bigjoiner) {
> > > -		intel_crtc_disable_planes(state,
> > > -					  old_crtc_state->bigjoiner_linked_crtc);
> > > +	if (old_crtc_state->bigjoiner)
> > >  		old_crtc_state->bigjoiner_linked_crtc->active = false;
> > > -	}
> > >  
> > >  	/*
> > >  	 * We need to disable pipe CRC before disabling the pipe,
> > > @@ -9823,6 +9818,18 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> > >  	u32 handled = 0;
> > >  	int i;
> > >  
> > > +	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > > +					    new_crtc_state, i) {
> > > +		if (!intel_crtc_needs_modeset(new_crtc_state))
> > > +			continue;
> > > +
> > > +		if (!old_crtc_state->hw.active)
> > > +			continue;
> > > +
> > > +		intel_pre_plane_update(state, crtc);
> > > +		intel_crtc_disable_planes(state, crtc);
> > > +	}
> > > +
> > >  	/* Only disable port sync and MST slaves */
> > >  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> > >  					    new_crtc_state, i) {
> > > @@ -9841,7 +9848,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> > >  		    !intel_dp_mst_is_slave_trans(old_crtc_state))
> > >  			continue;
> > >  
> > > -		intel_pre_plane_update(state, crtc);
> > >  		intel_old_crtc_state_disables(state, old_crtc_state,
> > >  					      new_crtc_state, crtc);
> > >  		handled |= BIT(crtc->pipe);
> > > @@ -9855,14 +9861,6 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
> > >  		    old_crtc_state->bigjoiner_slave)
> > >  			continue;
> > >  
> > > -		intel_pre_plane_update(state, crtc);
> > > -		if (old_crtc_state->bigjoiner) {
> > > -			struct intel_crtc *slave =
> > > -				old_crtc_state->bigjoiner_linked_crtc;
> > > -
> > > -			intel_pre_plane_update(state, slave);
> > > -		}
> > > -
> > >  		if (old_crtc_state->hw.active)
> > >  			intel_old_crtc_state_disables(state, old_crtc_state,
> > >  						      new_crtc_state, crtc);
> > > -- 
> > > 2.32.0
> > > 
> 
> -- 
> Ville Syrjälä
> Intel

Re: [Intel-gfx] [PATCH 12/16] drm/i915: Simplify intel_crtc_copy_uapi_to_hw_state_nomodeset()

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:36PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Rewrite intel_crtc_copy_uapi_to_hw_state_nomodeset() in a
> slightly more straightforward manner.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 17 +++++++----------
>  1 file changed, 7 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a5450ac9e2d0..5716085e15f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7347,18 +7347,15 @@ static void
>  intel_crtc_copy_uapi_to_hw_state_nomodeset(struct intel_atomic_state *state,
>  					   struct intel_crtc_state *crtc_state)
>  {
> -	const struct intel_crtc_state *from_crtc_state = crtc_state;
> +	const struct intel_crtc_state *master_crtc_state;

Are we changing the naming convention to primary/secondary crtc? In that case should we name this as primary_crtc_state ?

If thats oing to be handled in a separate series, this logic looks good

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> +	struct intel_crtc *master_crtc;
>  
> -	if (crtc_state->bigjoiner_slave) {
> -		from_crtc_state = intel_atomic_get_new_crtc_state(state,
> -								  crtc_state->bigjoiner_linked_crtc);
> +	master_crtc = intel_master_crtc(crtc_state);
> +	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
>  
> -		/* No need to copy state if the master state is unchanged */
> -		if (!from_crtc_state)
> -			return;
> -	}
> -
> -	intel_crtc_copy_color_blobs(crtc_state, from_crtc_state);
> +	/* No need to copy state if the master state is unchanged */
> +	if (master_crtc_state)
> +		intel_crtc_copy_color_blobs(crtc_state, master_crtc_state);
>  }
>  
>  static void
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 13/16] drm/i915: Split PPS write from DSC enable

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:37PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The PPS SDP is fed into the transcoder whereas the DSC
> block is (or at least can be) per pipe. Let's split these
> into two distinct operations in an effort to untagle the
> bigjoiner mess where we have two pipes feeding a single
> transcoder.
>

Yes makes sense.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi
 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c       |  6 ++--
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 14 +++++++--
>  drivers/gpu/drm/i915/display/intel_display.c |  5 ++-
>  drivers/gpu/drm/i915/display/intel_dp.c      |  2 +-
>  drivers/gpu/drm/i915/display/intel_vdsc.c    | 33 +++++++++-----------
>  drivers/gpu/drm/i915/display/intel_vdsc.h    | 10 +++---
>  6 files changed, 39 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 060bc8fb0d30..070ad144ef83 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1246,7 +1246,9 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
>  	/* step5: program and powerup panel */
>  	gen11_dsi_powerup_panel(encoder);
>  
> -	intel_dsc_enable(encoder, pipe_config);
> +	intel_dsc_dsi_pps_write(encoder, pipe_config);
> +
> +	intel_dsc_enable(pipe_config);
>  
>  	/* step6c: configure transcoder timings */
>  	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> @@ -1636,7 +1638,7 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
>  	/* FIXME: initialize from VBT */
>  	vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;
>  
> -	ret = intel_dsc_compute_params(encoder, crtc_state);
> +	ret = intel_dsc_compute_params(crtc_state);
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4fbffce501dc..f51c5d732d41 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2434,7 +2434,10 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  
>  	/* 5.k Configure and enable FEC if needed */
>  	intel_ddi_enable_fec(encoder, crtc_state);
> -	intel_dsc_enable(encoder, crtc_state);
> +
> +	intel_dsc_dp_pps_write(encoder, crtc_state);
> +
> +	intel_dsc_enable(crtc_state);
>  }
>  
>  static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2575,8 +2578,11 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  
>  	/* 7.l Configure and enable FEC if needed */
>  	intel_ddi_enable_fec(encoder, crtc_state);
> +
> +	intel_dsc_dp_pps_write(encoder, crtc_state);
> +
>  	if (!crtc_state->bigjoiner)
> -		intel_dsc_enable(encoder, crtc_state);
> +		intel_dsc_enable(crtc_state);
>  }
>  
>  static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> @@ -2641,8 +2647,10 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	if (!is_mst)
>  		intel_ddi_enable_pipe_clock(encoder, crtc_state);
>  
> +	intel_dsc_dp_pps_write(encoder, crtc_state);
> +
>  	if (!crtc_state->bigjoiner)
> -		intel_dsc_enable(encoder, crtc_state);
> +		intel_dsc_enable(crtc_state);
>  }
>  
>  static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5716085e15f5..4e659a103984 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3007,7 +3007,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  
>  	if (!crtc_state->bigjoiner_slave) {
>  		/* need to enable VDSC, which we skipped in pre-enable */
> -		intel_dsc_enable(encoder, crtc_state);
> +		intel_dsc_enable(crtc_state);
>  	} else {
>  		/*
>  		 * Enable sequence steps 1-7 on bigjoiner master
> @@ -3017,8 +3017,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  			intel_enable_shared_dpll(master_crtc_state);
>  		intel_encoders_pre_enable(state, master_crtc);
>  
> -		/* and DSC on slave */
> -		intel_dsc_enable(NULL, crtc_state);
> +		intel_dsc_enable(crtc_state);
>  	}
>  
>  	if (DISPLAY_VER(dev_priv) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index e898834cc5f9..68ddd9a490e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1260,7 +1260,7 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
>  	else
>  		vdsc_cfg->slice_height = 2;
>  
> -	ret = intel_dsc_compute_params(encoder, crtc_state);
> +	ret = intel_dsc_compute_params(crtc_state);
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 2275f99ce9d7..fa84be609d5d 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -442,10 +442,10 @@ calculate_rc_params(struct rc_parameters *rc,
>  	}
>  }
>  
> -int intel_dsc_compute_params(struct intel_encoder *encoder,
> -			     struct intel_crtc_state *pipe_config)
> +int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
>  	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
>  	const struct rc_parameters *rc_params;
> @@ -1055,8 +1055,8 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state)
>  	}
>  }
>  
> -static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
> -				    const struct intel_crtc_state *crtc_state)
> +void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
> +			     const struct intel_crtc_state *crtc_state)
>  {
>  	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
>  	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> @@ -1064,6 +1064,9 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
>  	struct drm_dsc_picture_parameter_set pps;
>  	enum port port;
>  
> +	if (!crtc_state->dsc.compression_enable)
> +		return;
> +
>  	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);
>  
>  	for_each_dsi_port(port, intel_dsi->ports) {
> @@ -1074,14 +1077,16 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
>  	}
>  }
>  
> -static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> -				   const struct intel_crtc_state *crtc_state)
> +void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> +			    const struct intel_crtc_state *crtc_state)
>  {
> -	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
>  	struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;
>  
> +	if (!crtc_state->dsc.compression_enable)
> +		return;
> +
>  	/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */
>  	drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp.pps_header);
>  
> @@ -1142,8 +1147,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
>  	}
>  }
>  
> -void intel_dsc_enable(struct intel_encoder *encoder,
> -		      const struct intel_crtc_state *crtc_state)
> +void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -1155,13 +1159,6 @@ void intel_dsc_enable(struct intel_encoder *encoder,
>  
>  	intel_dsc_pps_configure(crtc_state);
>  
> -	if (!crtc_state->bigjoiner_slave) {
> -		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> -			intel_dsc_dsi_pps_write(encoder, crtc_state);
> -		else
> -			intel_dsc_dp_pps_write(encoder, crtc_state);
> -	}
> -
>  	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;
>  	if (crtc_state->dsc.dsc_split) {
>  		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 0c5d80a572da..4ec75f715986 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -15,15 +15,17 @@ struct intel_encoder;
>  
>  bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
>  void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
> -void intel_dsc_enable(struct intel_encoder *encoder,
> -		      const struct intel_crtc_state *crtc_state);
> +void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
>  void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
> -int intel_dsc_compute_params(struct intel_encoder *encoder,
> -			     struct intel_crtc_state *pipe_config);
> +int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
>  void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
>  void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
>  enum intel_display_power_domain
>  intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
>  struct intel_crtc *intel_dsc_get_bigjoiner_secondary(const struct intel_crtc *primary_crtc);
> +void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
> +			     const struct intel_crtc_state *crtc_state);
> +void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> +			    const struct intel_crtc_state *crtc_state);
>  
>  #endif /* __INTEL_VDSC_H__ */
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Perform correct cpu_transcoder readout for bigjoiner

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Read out cpu_transcoder correctly for the bigjoiner slave pipes.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 66 ++++++++++++++++++++
>  1 file changed, 66 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4e659a103984..25ae9e4f6b66 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5581,6 +5581,16 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>  	return ret;
>  }
>  
> +static u8 bigjoiner_pipes(struct drm_i915_private *i915)


> +{
> +	if (DISPLAY_VER(i915) >= 12)
> +		return BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D);
> +	else if (DISPLAY_VER(i915) >= 11)
> +		return BIT(PIPE_B) | BIT(PIPE_C);
> +	else
> +		return 0;
> +}
> +
>  static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
>  					   enum transcoder cpu_transcoder)
>  {
> @@ -5596,6 +5606,54 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
>  	return tmp & TRANS_DDI_FUNC_ENABLE;
>  }
>  
> +static u8 enabled_bigjoiner_pipes(struct drm_i915_private *dev_priv)
> +{
> +	u8 master_pipes = 0, slave_pipes = 0;
> +	struct intel_crtc *crtc;
> +
> +	for_each_intel_crtc(&dev_priv->drm, crtc) {
> +		enum intel_display_power_domain power_domain;
> +		enum pipe pipe = crtc->pipe;
> +		intel_wakeref_t wakeref;
> +
> +		if ((bigjoiner_pipes(dev_priv) & BIT(pipe)) == 0)
> +			continue;
> +
> +		power_domain = intel_dsc_power_domain(crtc, (enum transcoder) pipe);
> +		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
> +			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
> +
> +			if (!(tmp & BIG_JOINER_ENABLE))
> +				continue;
> +
> +			if (tmp & MASTER_BIG_JOINER_ENABLE)
> +				master_pipes |= BIT(pipe);
> +			else
> +				slave_pipes |= BIT(pipe);
> +		}
> +
> +		if (DISPLAY_VER(dev_priv) < 13)
> +			continue;
> +
> +		power_domain = POWER_DOMAIN_PIPE(pipe);
> +		with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref) {
> +			u32 tmp = intel_de_read(dev_priv, ICL_PIPE_DSS_CTL1(pipe));
> +
> +			if (tmp & UNCOMPRESSED_JOINER_MASTER)
> +				master_pipes |= BIT(pipe);
> +			if (tmp & UNCOMPRESSED_JOINER_SLAVE)
> +				slave_pipes |= BIT(pipe);
> +		}
> +	}
> +
> +	/* Bigjoiner pipes should always be consecutive master and slave */
> +	drm_WARN(&dev_priv->drm, slave_pipes != master_pipes << 1,
> +		 "Bigjoiner misconfigured (master pipes 0x%x, slave pipes 0x%x)\n",
> +		 master_pipes, slave_pipes);
> +
> +	return slave_pipes;
> +}
> +
>  static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
>  {
>  	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
> @@ -5657,10 +5715,18 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
>  			enabled_transcoders |= BIT(cpu_transcoder);
>  	}
>  
> +	/* single pipe or bigjoiner master */
>  	cpu_transcoder = (enum transcoder) crtc->pipe;
>  	if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
>  		enabled_transcoders |= BIT(cpu_transcoder);
>  
> +	/* bigjoiner slave -> consider the master pipe's transcoder as well */
> +	if (enabled_bigjoiner_pipes(dev_priv) & BIT(crtc->pipe)) {
> +		cpu_transcoder = (enum transcoder) crtc->pipe - 1;
> +		if (transcoder_ddi_func_is_enabled(dev_priv, cpu_transcoder))
> +			enabled_transcoders |= BIT(cpu_transcoder);
> +	}
> +
>  	return enabled_transcoders;
>  }
>  
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 15/16] drm/i915: Reduce bigjoiner special casing

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Try to make bigjoiner pipes less special.
> 
> The main things here are that each pipe now does full
> clock computation/readout with its own shared_dpll reference.
> Also every pipe's cpu_transcoder always points correctly
> at the master transcoder.
> 
> Due to the above changes state readout is now complete
> and all the related hacks can go away. The actual modeset
> sequence code is still a mess, but I think in order to clean
> that up properly we're probably going to have to redesign
> the modeset logic to treat transcoders vs. pipes separately.
> That is going to require significant amounts of work.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

This cleanup and making both slave and master generic makes sense and lot cleaner

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  16 +--
>  drivers/gpu/drm/i915/display/intel_display.c | 132 ++++++-------------
>  2 files changed, 40 insertions(+), 108 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index f51c5d732d41..6a068a57f6d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3615,18 +3615,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
>  	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
>  		return;
>  
> -	if (pipe_config->bigjoiner_slave) {
> -		/* read out pipe settings from master */
> -		enum transcoder save = pipe_config->cpu_transcoder;
> -
> -		/* Our own transcoder needs to be disabled when reading it in intel_ddi_read_func_ctl() */
> -		WARN_ON(pipe_config->output_types);
> -		pipe_config->cpu_transcoder = (enum transcoder)pipe_config->bigjoiner_linked_crtc->pipe;
> -		intel_ddi_read_func_ctl(encoder, pipe_config);
> -		pipe_config->cpu_transcoder = save;
> -	} else {
> -		intel_ddi_read_func_ctl(encoder, pipe_config);
> -	}
> +	intel_ddi_read_func_ctl(encoder, pipe_config);
>  
>  	intel_ddi_mso_get_config(encoder, pipe_config);
>  
> @@ -3654,8 +3643,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
>  		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
>  	}
>  
> -	if (!pipe_config->bigjoiner_slave)
> -		ddi_dotclock_get(pipe_config);
> +	ddi_dotclock_get(pipe_config);
>  
>  	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
>  		pipe_config->lane_lat_optim_mask =
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 25ae9e4f6b66..17d12d12bc0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2027,15 +2027,17 @@ struct intel_encoder *
>  intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
>  			   const struct intel_crtc_state *crtc_state)
>  {
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	const struct drm_connector_state *connector_state;
>  	const struct drm_connector *connector;
>  	struct intel_encoder *encoder = NULL;
> +	struct intel_crtc *master_crtc;
>  	int num_encoders = 0;
>  	int i;
>  
> +	master_crtc = intel_master_crtc(crtc_state);
> +
>  	for_each_new_connector_in_state(&state->base, connector, connector_state, i) {
> -		if (connector_state->crtc != &crtc->base)
> +		if (connector_state->crtc != &master_crtc->base)
>  			continue;
>  
>  		encoder = to_intel_encoder(connector_state->best_encoder);
> @@ -2044,7 +2046,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
>  
>  	drm_WARN(encoder->base.dev, num_encoders != 1,
>  		 "%d encoders for pipe %c\n",
> -		 num_encoders, pipe_name(crtc->pipe));
> +		 num_encoders, pipe_name(master_crtc->pipe));
>  
>  	return encoder;
>  }
> @@ -3005,20 +3007,20 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  		break;
>  	}
>  
> -	if (!crtc_state->bigjoiner_slave) {
> -		/* need to enable VDSC, which we skipped in pre-enable */
> -		intel_dsc_enable(crtc_state);
> -	} else {
> -		/*
> -		 * Enable sequence steps 1-7 on bigjoiner master
> -		 */
> +	/*
> +	 * Enable sequence steps 1-7 on bigjoiner master
> +	 */
> +	if (crtc_state->bigjoiner_slave)
>  		intel_encoders_pre_pll_enable(state, master_crtc);
> -		if (master_crtc_state->shared_dpll)
> -			intel_enable_shared_dpll(master_crtc_state);
> +
> +	if (crtc_state->shared_dpll)
> +		intel_enable_shared_dpll(crtc_state);
> +
> +	if (crtc_state->bigjoiner_slave)
>  		intel_encoders_pre_enable(state, master_crtc);
>  
> -		intel_dsc_enable(crtc_state);
> -	}
> +	/* need to enable VDSC, which we skipped in pre-enable */
> +	intel_dsc_enable(crtc_state);
>  
>  	if (DISPLAY_VER(dev_priv) >= 13)
>  		intel_uncompressed_joiner_enable(crtc_state);
> @@ -3201,12 +3203,17 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
>  static void hsw_crtc_disable(struct intel_atomic_state *state,
>  			     struct intel_crtc *crtc)
>  {
> +	const struct intel_crtc_state *old_crtc_state =
> +		intel_atomic_get_old_crtc_state(state, crtc);
> +
>  	/*
>  	 * FIXME collapse everything to one hook.
>  	 * Need care with mst->ddi interactions.
>  	 */
> -	intel_encoders_disable(state, crtc);
> -	intel_encoders_post_disable(state, crtc);
> +	if (!old_crtc_state->bigjoiner_slave) {
> +		intel_encoders_disable(state, crtc);
> +		intel_encoders_post_disable(state, crtc);
> +	}
>  }
>  
>  static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
> @@ -5912,17 +5919,10 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
>  	if (DISPLAY_VER(dev_priv) >= 13 && !pipe_config->dsc.compression_enable)
>  		intel_uncompressed_joiner_get_config(pipe_config);
>  
> -	if (!active) {
> -		/* bigjoiner slave doesn't enable transcoder */
> -		if (!pipe_config->bigjoiner_slave)
> -			goto out;
> +	if (!active)
> +		goto out;
>  
> -		active = true;
> -		pipe_config->pixel_multiplier = 1;
> -
> -		/* we cannot read out most state, so don't bother.. */
> -		pipe_config->quirks |= PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE;
> -	} else if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
> +	if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
>  	    DISPLAY_VER(dev_priv) >= 11) {
>  		hsw_get_ddi_port_state(crtc, pipe_config);
>  		intel_get_transcoder_timings(crtc, pipe_config);
> @@ -5994,10 +5994,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
>  		}
>  	}
>  
> -	if (pipe_config->bigjoiner_slave) {
> -		/* Cannot be read out as a slave, set to 0. */
> -		pipe_config->pixel_multiplier = 0;
> -	} else if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
> +	if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
>  	    !transcoder_is_dsi(pipe_config->cpu_transcoder)) {
>  		pipe_config->pixel_multiplier =
>  			intel_de_read(dev_priv,
> @@ -6845,7 +6842,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
>  
>  	if (mode_changed && crtc_state->hw.enable &&
>  	    dev_priv->display.crtc_compute_clock &&
> -	    !crtc_state->bigjoiner_slave &&
>  	    !drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) {
>  		ret = dev_priv->display.crtc_compute_clock(crtc_state);
>  		if (ret)
> @@ -7463,7 +7459,6 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
>  			  const struct intel_crtc_state *from_crtc_state)
>  {
>  	struct intel_crtc_state *saved_state;
> -	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  
>  	saved_state = kmemdup(from_crtc_state, sizeof(*saved_state), GFP_KERNEL);
>  	if (!saved_state)
> @@ -7493,8 +7488,8 @@ copy_bigjoiner_crtc_state(struct intel_crtc_state *crtc_state,
>  	crtc_state->nv12_planes = crtc_state->c8_planes = crtc_state->update_planes = 0;
>  	crtc_state->bigjoiner_linked_crtc = to_intel_crtc(from_crtc_state->uapi.crtc);
>  	crtc_state->bigjoiner_slave = true;
> -	crtc_state->cpu_transcoder = (enum transcoder)crtc->pipe;
> -	crtc_state->has_audio = false;
> +	crtc_state->cpu_transcoder = from_crtc_state->cpu_transcoder;
> +	crtc_state->has_audio = from_crtc_state->has_audio;
>  
>  	return 0;
>  }
> @@ -8581,10 +8576,6 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	if (!new_crtc_state->hw.active)
>  		return;
>  
> -	if (new_crtc_state->bigjoiner_slave)
> -		/* No PLLs set for slave */
> -		pipe_config->shared_dpll = NULL;
> -
>  	intel_pipe_config_sanity_check(dev_priv, pipe_config);
>  
>  	if (!intel_pipe_config_compare(new_crtc_state,
> @@ -8703,9 +8694,6 @@ verify_mpllb_state(struct intel_atomic_state *state,
>  	if (!new_crtc_state->hw.active)
>  		return;
>  
> -	if (new_crtc_state->bigjoiner_slave)
> -		return;
> -
>  	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
>  	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
>  
> @@ -9915,16 +9903,6 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  
> -	drm_WARN_ON(&dev_priv->drm, old_crtc_state->bigjoiner_slave);
> -
> -	/*
> -	 * We still need special handling for disabling bigjoiner master
> -	 * and slaves since for slave we do not have encoder or plls
> -	 * so we dont need to disable those.
> -	 */
> -	if (old_crtc_state->bigjoiner)
> -		old_crtc_state->bigjoiner_linked_crtc->active = false;
> -
>  	/*
>  	 * We need to disable pipe CRC before disabling the pipe,
>  	 * or we race against vblank off.
> @@ -9965,7 +9943,7 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  	/* Only disable port sync and MST slaves */
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
> -		if (!intel_crtc_needs_modeset(new_crtc_state) || old_crtc_state->bigjoiner)
> +		if (!intel_crtc_needs_modeset(new_crtc_state))
>  			continue;
>  
>  		if (!old_crtc_state->hw.active)
> @@ -9977,7 +9955,8 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  		 * Slave vblanks are masked till Master Vblanks.
>  		 */
>  		if (!is_trans_port_sync_slave(old_crtc_state) &&
> -		    !intel_dp_mst_is_slave_trans(old_crtc_state))
> +		    !intel_dp_mst_is_slave_trans(old_crtc_state) &&
> +		    !old_crtc_state->bigjoiner_slave)
>  			continue;
>  
>  		intel_old_crtc_state_disables(state, old_crtc_state,
> @@ -9989,13 +9968,14 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
>  		if (!intel_crtc_needs_modeset(new_crtc_state) ||
> -		    (handled & BIT(crtc->pipe)) ||
> -		    old_crtc_state->bigjoiner_slave)
> +		    (handled & BIT(crtc->pipe)))
>  			continue;
>  
> -		if (old_crtc_state->hw.active)
> -			intel_old_crtc_state_disables(state, old_crtc_state,
> -						      new_crtc_state, crtc);
> +		if (!old_crtc_state->hw.active)
> +			continue;
> +
> +		intel_old_crtc_state_disables(state, old_crtc_state,
> +					      new_crtc_state, crtc);
>  	}
>  }
>  
> @@ -12373,9 +12353,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  		struct intel_plane *plane;
>  		int min_cdclk = 0;
>  
> -		if (crtc_state->bigjoiner_slave)
> -			continue;
> -
>  		if (crtc_state->hw.active) {
>  			/*
>  			 * The initial mode needs to be set in order to keep
> @@ -12435,39 +12412,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
>  		intel_bw_crtc_update(bw_state, crtc_state);
>  
>  		intel_pipe_config_sanity_check(dev_priv, crtc_state);
> -
> -		/* discard our incomplete slave state, copy it from master */
> -		if (crtc_state->bigjoiner && crtc_state->hw.active) {
> -			struct intel_crtc *slave = crtc_state->bigjoiner_linked_crtc;
> -			struct intel_crtc_state *slave_crtc_state =
> -				to_intel_crtc_state(slave->base.state);
> -
> -			copy_bigjoiner_crtc_state(slave_crtc_state, crtc_state);
> -			slave->base.mode = crtc->base.mode;
> -
> -			cdclk_state->min_cdclk[slave->pipe] = min_cdclk;
> -			cdclk_state->min_voltage_level[slave->pipe] =
> -				crtc_state->min_voltage_level;
> -
> -			for_each_intel_plane_on_crtc(&dev_priv->drm, slave, plane) {
> -				const struct intel_plane_state *plane_state =
> -					to_intel_plane_state(plane->base.state);
> -
> -				/*
> -				 * FIXME don't have the fb yet, so can't
> -				 * use intel_plane_data_rate() :(
> -				 */
> -				if (plane_state->uapi.visible)
> -					crtc_state->data_rate[plane->id] =
> -						4 * crtc_state->pixel_rate;
> -				else
> -					crtc_state->data_rate[plane->id] = 0;
> -			}
> -
> -			intel_bw_crtc_update(bw_state, slave_crtc_state);
> -			drm_calc_timestamping_constants(&slave->base,
> -							&slave_crtc_state->hw.adjusted_mode);
> -		}
>  	}
>  }
>  
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Nuke PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Now that the bigjoiner state readout/computation has been
> made to do the right thing nuke the related state checker
> quirk.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c  | 105 ++++++++----------
>  .../drm/i915/display/intel_display_types.h    |   1 -
>  2 files changed, 47 insertions(+), 59 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 17d12d12bc0a..a6d1d6fbaeef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8087,51 +8087,48 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  
>  	PIPE_CONF_CHECK_X(output_types);
>  
> -	/* FIXME do the readout properly and get rid of this quirk */
> -	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hdisplay);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_htotal);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_start);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hblank_end);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_start);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_hsync_end);
>  
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> -		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vdisplay);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vtotal);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_start);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vblank_end);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_start);
> +	PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_vsync_end);
>  
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>  
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> -		PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> +	PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
>  
> -		PIPE_CONF_CHECK_I(pixel_multiplier);
> +	PIPE_CONF_CHECK_I(pixel_multiplier);
>  
> -		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> -				      DRM_MODE_FLAG_INTERLACE);
> +	PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> +			      DRM_MODE_FLAG_INTERLACE);
>  
> -		if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> -			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> -					      DRM_MODE_FLAG_PHSYNC);
> -			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> -					      DRM_MODE_FLAG_NHSYNC);
> -			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> -					      DRM_MODE_FLAG_PVSYNC);
> -			PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> -					      DRM_MODE_FLAG_NVSYNC);
> -		}
> +	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> +		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> +				      DRM_MODE_FLAG_PHSYNC);
> +		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> +				      DRM_MODE_FLAG_NHSYNC);
> +		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> +				      DRM_MODE_FLAG_PVSYNC);
> +		PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> +				      DRM_MODE_FLAG_NVSYNC);
>  	}
>  
>  	PIPE_CONF_CHECK_I(output_format);
> @@ -8143,9 +8140,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
>  	PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
>  	PIPE_CONF_CHECK_BOOL(has_infoframe);
> -	/* FIXME do the readout properly and get rid of this quirk */
> -	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> -		PIPE_CONF_CHECK_BOOL(fec_enable);
> +	PIPE_CONF_CHECK_BOOL(fec_enable);
>  
>  	PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>  
> @@ -8174,9 +8169,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  		}
>  
>  		PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> -		/* FIXME do the readout properly and get rid of this quirk */
> -		if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE))
> -			PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
> +		PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
>  
>  		PIPE_CONF_CHECK_X(gamma_mode);
>  		if (IS_CHERRYVIEW(dev_priv))
> @@ -8201,11 +8194,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  
>  	PIPE_CONF_CHECK_BOOL(double_wide);
>  
> -	if (dev_priv->dpll.mgr)
> +	if (dev_priv->dpll.mgr) {
>  		PIPE_CONF_CHECK_P(shared_dpll);
>  
> -	/* FIXME do the readout properly and get rid of this quirk */
> -	if (dev_priv->dpll.mgr && !PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
>  		PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
>  		PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
>  		PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
> @@ -8239,19 +8230,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  		PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
>  	}
>  
> -	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) {
> -		PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> -		PIPE_CONF_CHECK_X(dsi_pll.div);
> +	PIPE_CONF_CHECK_X(dsi_pll.ctrl);
> +	PIPE_CONF_CHECK_X(dsi_pll.div);
>  
> -		if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
> -			PIPE_CONF_CHECK_I(pipe_bpp);
> +	if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5)
> +		PIPE_CONF_CHECK_I(pipe_bpp);
>  
> -		PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> -		PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> -		PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
> +	PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock);
> +	PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
> +	PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
>  
> -		PIPE_CONF_CHECK_I(min_voltage_level);
> -	}
> +	PIPE_CONF_CHECK_I(min_voltage_level);
>  
>  	if (fastset && (current_config->has_psr || pipe_config->has_psr))
>  		PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 7d852affead1..ee45fc3b1672 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -938,7 +938,6 @@ struct intel_crtc_state {
>  	 * accordingly.
>  	 */
>  #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS	(1<<0) /* unreliable sync mode.flags */
> -#define PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE      (1<<1) /* bigjoiner slave, partial readout */
>  	unsigned long quirks;
>  
>  	unsigned fb_bits; /* framebuffers to flip */
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH 11/16] drm/i915: Introduce intel_master_crtc()

[Navare, Manasi]

On Mon, Sep 13, 2021 at 05:44:35PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add a helper to determine the master crtc for bigjoiner usage.
> Also name the variables consistently.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Agree with Jani that at some point we should start calling this Primary/secondary after Bspec names change probably
But for now this logic looks good

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     |  6 +--
>  drivers/gpu/drm/i915/display/intel_display.c | 57 +++++++++++---------
>  2 files changed, 33 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 4f7420dda8b5..4fbffce501dc 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2882,12 +2882,10 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state,
>  	}
>  
>  	if (old_crtc_state->bigjoiner_linked_crtc) {
> -		struct intel_atomic_state *state =
> -			to_intel_atomic_state(old_crtc_state->uapi.state);
> -		struct intel_crtc *slave =
> +		struct intel_crtc *slave_crtc =
>  			old_crtc_state->bigjoiner_linked_crtc;
>  		const struct intel_crtc_state *old_slave_crtc_state =
> -			intel_atomic_get_old_crtc_state(state, slave);
> +			intel_atomic_get_old_crtc_state(state, slave_crtc);
>  
>  		intel_crtc_vblank_off(old_slave_crtc_state);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 24214e6249a9..a5450ac9e2d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -227,6 +227,14 @@ is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
>  		is_trans_port_sync_slave(crtc_state);
>  }
>  
> +static struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
> +{
> +	if (crtc_state->bigjoiner_slave)
> +		return crtc_state->bigjoiner_linked_crtc;
> +	else
> +		return to_intel_crtc(crtc_state->uapi.crtc);
> +}
> +
>  static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
>  				    enum pipe pipe)
>  {
> @@ -2978,21 +2986,19 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>  static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  					 const struct intel_crtc_state *crtc_state)
>  {
> -	struct intel_crtc *master = to_intel_crtc(crtc_state->uapi.crtc);
> -	struct drm_i915_private *dev_priv = to_i915(master->base.dev);
> +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  	struct intel_crtc_state *master_crtc_state;
> +	struct intel_crtc *master_crtc;
>  	struct drm_connector_state *conn_state;
>  	struct drm_connector *conn;
>  	struct intel_encoder *encoder = NULL;
>  	int i;
>  
> -	if (crtc_state->bigjoiner_slave)
> -		master = crtc_state->bigjoiner_linked_crtc;
> -
> -	master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> +	master_crtc = intel_master_crtc(crtc_state);
> +	master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
>  
>  	for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
> -		if (conn_state->crtc != &master->base)
> +		if (conn_state->crtc != &master_crtc->base)
>  			continue;
>  
>  		encoder = to_intel_encoder(conn_state->best_encoder);
> @@ -3006,10 +3012,10 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
>  		/*
>  		 * Enable sequence steps 1-7 on bigjoiner master
>  		 */
> -		intel_encoders_pre_pll_enable(state, master);
> +		intel_encoders_pre_pll_enable(state, master_crtc);
>  		if (master_crtc_state->shared_dpll)
>  			intel_enable_shared_dpll(master_crtc_state);
> -		intel_encoders_pre_enable(state, master);
> +		intel_encoders_pre_enable(state, master_crtc);
>  
>  		/* and DSC on slave */
>  		intel_dsc_enable(NULL, crtc_state);
> @@ -8462,7 +8468,7 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	struct intel_encoder *encoder;
>  	struct intel_crtc_state *pipe_config = old_crtc_state;
>  	struct drm_atomic_state *state = old_crtc_state->uapi.state;
> -	struct intel_crtc *master = crtc;
> +	struct intel_crtc *master_crtc;
>  
>  	__drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi);
>  	intel_crtc_free_hw_state(old_crtc_state);
> @@ -8490,10 +8496,9 @@ verify_crtc_state(struct intel_crtc *crtc,
>  			"(expected %i, found %i)\n",
>  			new_crtc_state->hw.active, crtc->active);
>  
> -	if (new_crtc_state->bigjoiner_slave)
> -		master = new_crtc_state->bigjoiner_linked_crtc;
> +	master_crtc = intel_master_crtc(new_crtc_state);
>  
> -	for_each_encoder_on_crtc(dev, &master->base, encoder) {
> +	for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) {
>  		enum pipe pipe;
>  		bool active;
>  
> @@ -8503,7 +8508,7 @@ verify_crtc_state(struct intel_crtc *crtc,
>  				encoder->base.base.id, active,
>  				new_crtc_state->hw.active);
>  
> -		I915_STATE_WARN(active && master->pipe != pipe,
> +		I915_STATE_WARN(active && master_crtc->pipe != pipe,
>  				"Encoder connected to wrong pipe %c\n",
>  				pipe_name(pipe));
>  
> @@ -9192,13 +9197,13 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  					struct intel_crtc_state *new_crtc_state)
>  {
>  	struct intel_crtc_state *slave_crtc_state, *master_crtc_state;
> -	struct intel_crtc *slave, *master;
> +	struct intel_crtc *slave_crtc, *master_crtc;
>  
>  	/* slave being enabled, is master is still claiming this crtc? */
>  	if (old_crtc_state->bigjoiner_slave) {
> -		slave = crtc;
> -		master = old_crtc_state->bigjoiner_linked_crtc;
> -		master_crtc_state = intel_atomic_get_new_crtc_state(state, master);
> +		slave_crtc = crtc;
> +		master_crtc = old_crtc_state->bigjoiner_linked_crtc;
> +		master_crtc_state = intel_atomic_get_new_crtc_state(state, master_crtc);
>  		if (!master_crtc_state || !intel_crtc_needs_modeset(master_crtc_state))
>  			goto claimed;
>  	}
> @@ -9206,17 +9211,17 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  	if (!new_crtc_state->bigjoiner)
>  		return 0;
>  
> -	slave = intel_dsc_get_bigjoiner_secondary(crtc);
> -	if (!slave) {
> +	slave_crtc = intel_dsc_get_bigjoiner_secondary(crtc);
> +	if (!slave_crtc) {
>  		DRM_DEBUG_KMS("[CRTC:%d:%s] Big joiner configuration requires "
>  			      "CRTC + 1 to be used, doesn't exist\n",
>  			      crtc->base.base.id, crtc->base.name);
>  		return -EINVAL;
>  	}
>  
> -	new_crtc_state->bigjoiner_linked_crtc = slave;
> -	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave);
> -	master = crtc;
> +	new_crtc_state->bigjoiner_linked_crtc = slave_crtc;
> +	slave_crtc_state = intel_atomic_get_crtc_state(&state->base, slave_crtc);
> +	master_crtc = crtc;
>  	if (IS_ERR(slave_crtc_state))
>  		return PTR_ERR(slave_crtc_state);
>  
> @@ -9225,15 +9230,15 @@ static int intel_atomic_check_bigjoiner(struct intel_atomic_state *state,
>  		goto claimed;
>  
>  	DRM_DEBUG_KMS("[CRTC:%d:%s] Used as slave for big joiner\n",
> -		      slave->base.base.id, slave->base.name);
> +		      slave_crtc->base.base.id, slave_crtc->base.name);
>  
>  	return copy_bigjoiner_crtc_state(slave_crtc_state, new_crtc_state);
>  
>  claimed:
>  	DRM_DEBUG_KMS("[CRTC:%d:%s] Slave is enabled as normal CRTC, but "
>  		      "[CRTC:%d:%s] claiming this CRTC for bigjoiner.\n",
> -		      slave->base.base.id, slave->base.name,
> -		      master->base.base.id, master->base.name);
> +		      slave_crtc->base.base.id, slave_crtc->base.name,
> +		      master_crtc->base.base.id, master_crtc->base.name);
>  	return -EINVAL;
>  }
>  
> -- 
> 2.32.0
>