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From: Alexander Graf <agraf@csgraf.de>
To: QEMU Developers <qemu-devel@nongnu.org>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Sergio Lopez" <slp@redhat.com>,
	"Peter Collingbourne" <pcc@google.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Cameron Esfahani" <dirty@apple.com>,
	"Roman Bolshakov" <r.bolshakov@yadro.com>,
	qemu-arm <qemu-arm@nongnu.org>, "Frank Yang" <lfy@google.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2
Date: Wed, 15 Sep 2021 20:10:49 +0200	[thread overview]
Message-ID: <20210915181049.27597-11-agraf@csgraf.de> (raw)
In-Reply-To: <20210915181049.27597-1-agraf@csgraf.de>

The SMCCC 1.3 spec section 5.2 says

  The Unknown SMC Function Identifier is a sign-extended value of (-1)
  that is returned in the R0, W0 or X0 registers. An implementation must
  return this error code when it receives:

    * An SMC or HVC call with an unknown Function Identifier
    * An SMC or HVC call for a removed Function Identifier
    * An SMC64/HVC64 call from AArch32 state

To comply with these statements, let's always return -1 when we encounter
an unknown HVC or SMC call.

Signed-off-by: Alexander Graf <agraf@csgraf.de>

---

v8 -> v9:

  - Remove Windows specifics and just comply with SMCCC spec

v9 -> v10:

  - Fix comment
---
 target/arm/psci.c | 35 ++++++-----------------------------
 1 file changed, 6 insertions(+), 29 deletions(-)

diff --git a/target/arm/psci.c b/target/arm/psci.c
index 6709e28013..b279c0b9a4 100644
--- a/target/arm/psci.c
+++ b/target/arm/psci.c
@@ -27,15 +27,13 @@
 
 bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
 {
-    /* Return true if the r0/x0 value indicates a PSCI call and
-     * the exception type matches the configured PSCI conduit. This is
-     * called before the SMC/HVC instruction is executed, to decide whether
-     * we should treat it as a PSCI call or with the architecturally
+    /*
+     * Return true if the exception type matches the configured PSCI conduit.
+     * This is called before the SMC/HVC instruction is executed, to decide
+     * whether we should treat it as a PSCI call or with the architecturally
      * defined behaviour for an SMC or HVC (which might be UNDEF or trap
      * to EL2 or to EL3).
      */
-    CPUARMState *env = &cpu->env;
-    uint64_t param = is_a64(env) ? env->xregs[0] : env->regs[0];
 
     switch (excp_type) {
     case EXCP_HVC:
@@ -52,27 +50,7 @@ bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
         return false;
     }
 
-    switch (param) {
-    case QEMU_PSCI_0_2_FN_PSCI_VERSION:
-    case QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE:
-    case QEMU_PSCI_0_2_FN_AFFINITY_INFO:
-    case QEMU_PSCI_0_2_FN64_AFFINITY_INFO:
-    case QEMU_PSCI_0_2_FN_SYSTEM_RESET:
-    case QEMU_PSCI_0_2_FN_SYSTEM_OFF:
-    case QEMU_PSCI_0_1_FN_CPU_ON:
-    case QEMU_PSCI_0_2_FN_CPU_ON:
-    case QEMU_PSCI_0_2_FN64_CPU_ON:
-    case QEMU_PSCI_0_1_FN_CPU_OFF:
-    case QEMU_PSCI_0_2_FN_CPU_OFF:
-    case QEMU_PSCI_0_1_FN_CPU_SUSPEND:
-    case QEMU_PSCI_0_2_FN_CPU_SUSPEND:
-    case QEMU_PSCI_0_2_FN64_CPU_SUSPEND:
-    case QEMU_PSCI_0_1_FN_MIGRATE:
-    case QEMU_PSCI_0_2_FN_MIGRATE:
-        return true;
-    default:
-        return false;
-    }
+    return true;
 }
 
 void arm_handle_psci_call(ARMCPU *cpu)
@@ -194,10 +172,9 @@ void arm_handle_psci_call(ARMCPU *cpu)
         break;
     case QEMU_PSCI_0_1_FN_MIGRATE:
     case QEMU_PSCI_0_2_FN_MIGRATE:
+    default:
         ret = QEMU_PSCI_RET_NOT_SUPPORTED;
         break;
-    default:
-        g_assert_not_reached();
     }
 
 err:
-- 
2.30.1 (Apple Git-130)



  parent reply	other threads:[~2021-09-15 18:33 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-15 18:10 [PATCH v11 00/10] hvf: Implement Apple Silicon Support Alexander Graf
2021-09-15 18:10 ` [PATCH v11 01/10] arm: Move PMC register definitions to cpu.h Alexander Graf
2021-09-16 10:38   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 02/10] hvf: Add execute to dirty log permission bitmap Alexander Graf
2021-09-16 11:59   ` Peter Maydell
2021-09-16 14:04     ` Alexander Graf
2021-09-16 14:05       ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 03/10] hvf: Introduce hvf_arch_init() callback Alexander Graf
2021-09-16 10:45   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 04/10] hvf: Add Apple Silicon support Alexander Graf
2021-09-16 12:16   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 05/10] arm/hvf: Add a WFI handler Alexander Graf
2021-09-16  4:49   ` Philippe Mathieu-Daudé
2021-09-16 15:02     ` Alexander Graf
2021-09-16 12:18   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 06/10] hvf: arm: Implement -cpu host Alexander Graf
2021-09-16 12:24   ` Peter Maydell
2021-09-16 15:30     ` Alexander Graf
2021-09-16 15:55       ` Peter Maydell
2021-09-16 16:05         ` Ard Biesheuvel
2021-09-16 16:16           ` Peter Maydell
2021-09-22 11:41             ` Ard Biesheuvel
2021-09-22 12:44               ` Peter Maydell
2021-09-22 16:10                 ` Ard Biesheuvel
2021-09-16 17:47         ` Alexander Graf
2021-09-15 18:10 ` [PATCH v11 07/10] hvf: arm: Implement PSCI handling Alexander Graf
2021-09-16 12:27   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 08/10] arm: Add Hypervisor.framework build target Alexander Graf
2021-09-15 18:10 ` [PATCH v11 09/10] hvf: arm: Add rudimentary PMC support Alexander Graf
2021-09-16 12:32   ` Peter Maydell
2021-09-15 18:10 ` Alexander Graf [this message]
2021-09-16 12:29   ` [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2 Peter Maydell

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