From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38CAEC433F5 for ; Thu, 16 Sep 2021 12:38:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1733660FA0 for ; Thu, 16 Sep 2021 12:38:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239479AbhIPMjf (ORCPT ); Thu, 16 Sep 2021 08:39:35 -0400 Received: from mail.kernel.org ([198.145.29.99]:41494 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235750AbhIPMjd (ORCPT ); Thu, 16 Sep 2021 08:39:33 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 46FAB60F6D; Thu, 16 Sep 2021 12:38:11 +0000 (UTC) From: Huacai Chen To: Thomas Gleixner , Marc Zyngier Cc: linux-kernel@vger.kernel.org, Xuefeng Li , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V5 06/10] irqchip/loongson-htvec: Add suspend/resume support Date: Thu, 16 Sep 2021 20:31:34 +0800 Message-Id: <20210916123138.3490474-7-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210916123138.3490474-1-chenhuacai@loongson.cn> References: <20210916123138.3490474-1-chenhuacai@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add suspend/resume support for HTVEC irqchip, which is needed for suspend/hibernation. Signed-off-by: Huacai Chen --- drivers/irqchip/irq-loongson-htvec.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/irqchip/irq-loongson-htvec.c b/drivers/irqchip/irq-loongson-htvec.c index f54c9ccbd69e..82adb2615013 100644 --- a/drivers/irqchip/irq-loongson-htvec.c +++ b/drivers/irqchip/irq-loongson-htvec.c @@ -16,6 +16,7 @@ #include #include #include +#include /* Registers */ #define HTVEC_EN_OFF 0x20 @@ -30,6 +31,7 @@ struct htvec { struct irq_domain *htvec_domain; raw_spinlock_t htvec_lock; struct fwnode_handle *domain_handle; + u32 saved_vec_en[HTVEC_MAX_PARENT_IRQ]; }; struct htvec *htvec_priv; @@ -157,6 +159,29 @@ static void htvec_reset(struct htvec *priv) } } +static int htvec_suspend(void) +{ + int i; + + for (i = 0; i < htvec_priv->num_parents; i++) + htvec_priv->saved_vec_en[i] = readl(htvec_priv->base + HTVEC_EN_OFF + 4 * i); + + return 0; +} + +static void htvec_resume(void) +{ + int i; + + for (i = 0; i < htvec_priv->num_parents; i++) + writel(htvec_priv->saved_vec_en[i], htvec_priv->base + HTVEC_EN_OFF + 4 * i); +} + +static struct syscore_ops htvec_syscore_ops = { + .suspend = htvec_suspend, + .resume = htvec_resume, +}; + static int htvec_init(phys_addr_t addr, unsigned long size, int num_parents, int parent_irq[], struct fwnode_handle *domain_handle) { @@ -190,6 +215,8 @@ static int htvec_init(phys_addr_t addr, unsigned long size, htvec_priv = priv; + register_syscore_ops(&htvec_syscore_ops); + return 0; iounmap_base: -- 2.27.0