From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 160D1C43219 for ; Thu, 16 Sep 2021 14:55:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F247F60698 for ; Thu, 16 Sep 2021 14:55:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238939AbhIPO44 (ORCPT ); Thu, 16 Sep 2021 10:56:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238935AbhIPO4u (ORCPT ); Thu, 16 Sep 2021 10:56:50 -0400 Received: from mail.kapsi.fi (mail.kapsi.fi [IPv6:2001:67c:1be8::25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CCDFC061767; Thu, 16 Sep 2021 07:55:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kapsi.fi; s=20161220; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=8Z8UdsvzeKoZJTZfQ5GStAx1Bjf3CHBgzJFfPbYyGko=; b=H03/qP4d6xZq4Tfh17PVu54tHP UkLRGURzcuTdbE9NkgWDHYEShK4sr6+FBPqeQmmMKkkGH7bl8bDMeCpZkP4GLw0TOaDSl4wW5t5vg 7XgM/Mpb0rnunTofBAeJW8XrnwKbysE58SlbQ/Z4F168G6eCbugYclQ1D7gHQsee3aJFyGnba3QuN NERiOm987vbFd6+21MXRFqANEIChSkLpXj9ReFwY5PXwfnsL6c3EZgGmvHJpd6dccJSFL5M6u1aZI 7t632wfd5hGLjIqJ61wanysZEL11OdDESZz1S8niDm6XXJ1Exd/VJmOoLFdlKwjo1gMS9bZEzCbgK n7edVzxg==; Received: from dsl-hkibng22-54f986-236.dhcp.inet.fi ([84.249.134.236] helo=toshino.localdomain) by mail.kapsi.fi with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1mQsnM-0002zq-8w; Thu, 16 Sep 2021 17:55:24 +0300 From: Mikko Perttunen To: thierry.reding@gmail.com, jonathanh@nvidia.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, Mikko Perttunen Subject: [PATCH v6 2/3] arm64: tegra: Add NVDEC to Tegra186/194 device trees Date: Thu, 16 Sep 2021 17:55:16 +0300 Message-Id: <20210916145517.2047351-3-mperttunen@nvidia.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210916145517.2047351-1-mperttunen@nvidia.com> References: <20210916145517.2047351-1-mperttunen@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 84.249.134.236 X-SA-Exim-Mail-From: mperttunen@nvidia.com X-SA-Exim-Scanned: No (on mail.kapsi.fi); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add a device tree node for NVDEC on Tegra186, and device tree nodes for NVDEC and NVDEC1 on Tegra194. Signed-off-by: Mikko Perttunen --- v5: * Change from nvidia,instance to nvidia,host1x-class v4: * Add dma-coherent markers v3: * Change read2 to read-1 v2: * Add NVDECSRD1 memory client * Add also to T194 (both NVDEC0/1) --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 16 ++++++++++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 38 ++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index d02f6bf3e2ca..4f2f21242b2c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1342,6 +1342,22 @@ dsib: dsi@15400000 { power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>; }; + nvdec@15480000 { + compatible = "nvidia,tegra186-nvdec"; + reg = <0x15480000 0x40000>; + clocks = <&bpmp TEGRA186_CLK_NVDEC>; + clock-names = "nvdec"; + resets = <&bpmp TEGRA186_RESET_NVDEC>; + reset-names = "nvdec"; + + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_NVDEC>; + interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDECSRD &emc>, + <&mc TEGRA186_MEMORY_CLIENT_NVDECSRD1 &emc>, + <&mc TEGRA186_MEMORY_CLIENT_NVDECSWR &emc>; + interconnect-names = "dma-mem", "read-1", "write"; + iommus = <&smmu TEGRA186_SID_NVDEC>; + }; + sor0: sor@15540000 { compatible = "nvidia,tegra186-sor"; reg = <0x15540000 0x10000>; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 5ba7a4519b95..04e883aa7aa2 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1412,6 +1412,25 @@ host1x@13e00000 { interconnect-names = "dma-mem"; iommus = <&smmu TEGRA194_SID_HOST1X>; + nvdec@15140000 { + compatible = "nvidia,tegra194-nvdec"; + reg = <0x15140000 0x00040000>; + clocks = <&bpmp TEGRA194_CLK_NVDEC1>; + clock-names = "nvdec"; + resets = <&bpmp TEGRA194_RESET_NVDEC1>; + reset-names = "nvdec"; + + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_NVDECB>; + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDEC1SRD &emc>, + <&mc TEGRA194_MEMORY_CLIENT_NVDEC1SRD1 &emc>, + <&mc TEGRA194_MEMORY_CLIENT_NVDEC1SWR &emc>; + interconnect-names = "dma-mem", "read-1", "write"; + iommus = <&smmu TEGRA194_SID_NVDEC1>; + dma-coherent; + + nvidia,host1x-class = <0xf5>; + }; + display-hub@15200000 { compatible = "nvidia,tegra194-display"; reg = <0x15200000 0x00040000>; @@ -1525,6 +1544,25 @@ vic@15340000 { iommus = <&smmu TEGRA194_SID_VIC>; }; + nvdec@15480000 { + compatible = "nvidia,tegra194-nvdec"; + reg = <0x15480000 0x00040000>; + clocks = <&bpmp TEGRA194_CLK_NVDEC>; + clock-names = "nvdec"; + resets = <&bpmp TEGRA194_RESET_NVDEC>; + reset-names = "nvdec"; + + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_NVDECA>; + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDECSRD &emc>, + <&mc TEGRA194_MEMORY_CLIENT_NVDECSRD1 &emc>, + <&mc TEGRA194_MEMORY_CLIENT_NVDECSWR &emc>; + interconnect-names = "dma-mem", "read-1", "write"; + iommus = <&smmu TEGRA194_SID_NVDEC>; + dma-coherent; + + nvidia,host1x-class = <0xf0>; + }; + dpaux0: dpaux@155c0000 { compatible = "nvidia,tegra194-dpaux"; reg = <0x155c0000 0x10000>; -- 2.32.0