From: Borislav Petkov <bp@alien8.de> To: Tony Luck <tony.luck@intel.com>, Yazen Ghannam <Yazen.Ghannam@amd.com> Cc: X86 ML <x86@kernel.org>, LKML <linux-kernel@vger.kernel.org> Subject: [PATCH 4/4] x86/mce: Get rid of the ->quirk_no_way_out() indirect call Date: Fri, 17 Sep 2021 12:53:55 +0200 [thread overview] Message-ID: <20210917105355.2368-5-bp@alien8.de> (raw) In-Reply-To: <20210917105355.2368-1-bp@alien8.de> From: Borislav Petkov <bp@suse.de> Use a flag setting to call the only quirk function for that. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> --- arch/x86/kernel/cpu/mce/core.c | 64 +++++++++++++++--------------- arch/x86/kernel/cpu/mce/internal.h | 5 ++- 2 files changed, 35 insertions(+), 34 deletions(-) diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index ee4f534424b8..e0cef8781c6f 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -121,8 +121,6 @@ mce_banks_t mce_banks_ce_disabled; static struct work_struct mce_work; static struct irq_work mce_irq_work; -static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs); - /* * CPU/chipset specific EDAC code can register a notifier call here to print * MCE errors in a human-readable form. @@ -818,6 +816,34 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b) } EXPORT_SYMBOL_GPL(machine_check_poll); +/* + * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and + * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM + * Vol 3B Table 15-20). But this confuses both the code that determines + * whether the machine check occurred in kernel or user mode, and also + * the severity assessment code. Pretend that EIPV was set, and take the + * ip/cs values from the pt_regs that mce_gather_info() ignored earlier. + */ +static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs) +{ + if (bank != 0) + return; + if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0) + return; + if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC| + MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV| + MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR| + MCACOD)) != + (MCI_STATUS_UC|MCI_STATUS_EN| + MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S| + MCI_STATUS_AR|MCACOD_INSTR)) + return; + + m->mcgstatus |= MCG_STATUS_EIPV; + m->ip = regs->ip; + m->cs = regs->cs; +} + /* * Do a quick check if any of the events requires a panic. * This decides if we keep the events around or clear them. @@ -834,8 +860,8 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp, continue; __set_bit(i, validp); - if (quirk_no_way_out) - quirk_no_way_out(i, m, regs); + if (mce_flags.snb_ifu_quirk) + quirk_sandybridge_ifu(i, m, regs); m->bank = i; if (mce_severity(m, regs, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) { @@ -1692,34 +1718,6 @@ static void __mcheck_cpu_check_banks(void) } } -/* - * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and - * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM - * Vol 3B Table 15-20). But this confuses both the code that determines - * whether the machine check occurred in kernel or user mode, and also - * the severity assessment code. Pretend that EIPV was set, and take the - * ip/cs values from the pt_regs that mce_gather_info() ignored earlier. - */ -static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs) -{ - if (bank != 0) - return; - if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0) - return; - if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC| - MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV| - MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR| - MCACOD)) != - (MCI_STATUS_UC|MCI_STATUS_EN| - MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S| - MCI_STATUS_AR|MCACOD_INSTR)) - return; - - m->mcgstatus |= MCG_STATUS_EIPV; - m->ip = regs->ip; - m->cs = regs->cs; -} - /* Add per CPU specific workarounds here */ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) { @@ -1793,7 +1791,7 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) cfg->bootlog = 0; if (c->x86 == 6 && c->x86_model == 45) - quirk_no_way_out = quirk_sandybridge_ifu; + mce_flags.snb_ifu_quirk = 1; } if (c->x86_vendor == X86_VENDOR_ZHAOXIN) { diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h index 1ad7b4bf5423..21865545cd3b 100644 --- a/arch/x86/kernel/cpu/mce/internal.h +++ b/arch/x86/kernel/cpu/mce/internal.h @@ -167,7 +167,10 @@ struct mce_vendor_flags { /* Centaur Winchip C6-style MCA */ winchip : 1, - __reserved_0 : 58; + /* SandyBridge IFU quirk */ + snb_ifu_quirk : 1, + + __reserved_0 : 57; }; extern struct mce_vendor_flags mce_flags; -- 2.29.2
next prev parent reply other threads:[~2021-09-17 10:54 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-17 10:53 [PATCH 0/4] x86/mce: Remove indirect calls Borislav Petkov 2021-09-17 10:53 ` [PATCH 1/4] x86/mce: Get rid of the mce_severity function pointer Borislav Petkov 2021-09-17 10:53 ` [PATCH 2/4] x86/mce: Get rid of machine_check_vector Borislav Petkov 2021-09-20 4:57 ` Luck, Tony 2021-09-20 7:42 ` Rasmus Villemoes 2021-09-20 8:15 ` Borislav Petkov 2021-09-20 8:12 ` Borislav Petkov 2021-09-20 16:04 ` Luck, Tony 2021-09-20 16:32 ` Borislav Petkov 2021-09-17 10:53 ` [PATCH 3/4] x86/mce: Get rid of msr_ops Borislav Petkov 2021-09-20 4:47 ` Luck, Tony 2021-09-20 8:32 ` Borislav Petkov 2021-09-22 12:16 ` Borislav Petkov 2021-09-22 13:23 ` Luck, Tony 2021-09-22 13:55 ` Borislav Petkov 2021-09-22 15:22 ` Luck, Tony 2021-09-22 15:57 ` Borislav Petkov 2021-09-17 10:53 ` Borislav Petkov [this message] 2021-09-20 5:06 ` [PATCH 4/4] x86/mce: Get rid of the ->quirk_no_way_out() indirect call Luck, Tony 2021-09-20 8:34 ` Borislav Petkov 2021-09-23 14:51 ` Yazen Ghannam 2021-09-23 15:11 ` Borislav Petkov 2021-09-24 20:04 ` Yazen Ghannam
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