From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A874C433EF for ; Mon, 20 Sep 2021 14:26:52 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 18C8160E76 for ; Mon, 20 Sep 2021 14:26:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 18C8160E76 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=xen0n.name Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:54362 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mSKFv-0000aj-Ai for qemu-devel@archiver.kernel.org; Mon, 20 Sep 2021 10:26:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49488) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mSEP5-0008Ko-Pj for qemu-devel@nongnu.org; Mon, 20 Sep 2021 04:11:55 -0400 Received: from [115.28.160.31] (port=35574 helo=mailbox.box.xen0n.name) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mSEP0-0005MK-25 for qemu-devel@nongnu.org; Mon, 20 Sep 2021 04:11:55 -0400 Received: from ld50.lan (unknown [101.88.25.142]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 186BA633F5; Mon, 20 Sep 2021 16:05:17 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=xen0n.name; s=mail; t=1632125117; bh=Lu5mLUyhQt1LqmrXXY0yo4NwJg17Ezz8k5d+Ck61Fgk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mxEVxQ8ak9d5CeABj/xIdBrzGWNNjwtcW6jLw0HGQjptujCGIbOzwW4IAQoXBFxDj uiK3WkhxuMqZXI3gM9/HEMCEiEAEurrORp+ZlQtVQnayL+H4Bs++rtm5zHYXw0z1zy P6LZi54DhUskbMDCZQwieD0FcmMf1GW0A+lNqDLQ= From: WANG Xuerui To: qemu-devel@nongnu.org Subject: [PATCH 04/30] tcg/loongarch: Add generated instruction opcodes and encoding helpers Date: Mon, 20 Sep 2021 16:04:25 +0800 Message-Id: <20210920080451.408655-5-git@xen0n.name> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210920080451.408655-1-git@xen0n.name> References: <20210920080451.408655-1-git@xen0n.name> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 115.28.160.31 (failed) Received-SPF: pass client-ip=115.28.160.31; envelope-from=git@xen0n.name; helo=mailbox.box.xen0n.name X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Mon, 20 Sep 2021 09:57:24 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: WANG Xuerui Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: WANG Xuerui --- tcg/loongarch/tcg-insn-defs.c.inc | 1080 +++++++++++++++++++++++++++++ 1 file changed, 1080 insertions(+) create mode 100644 tcg/loongarch/tcg-insn-defs.c.inc diff --git a/tcg/loongarch/tcg-insn-defs.c.inc b/tcg/loongarch/tcg-insn-defs.c.inc new file mode 100644 index 0000000000..413f7ffc12 --- /dev/null +++ b/tcg/loongarch/tcg-insn-defs.c.inc @@ -0,0 +1,1080 @@ +/* SPDX-License-Identifier: MIT */ +/* + * LoongArch instruction formats, opcodes, and encoders for TCG use. + * + * Code generated by genqemutcgdefs from + * https://github.com/loongson-community/loongarch-opcodes, + * from commit bb5234081663faaefb6b921a7848b18e19519890. + * DO NOT EDIT. + */ + +typedef enum { + OPC_CLZ_W = 0x00001400, + OPC_CTZ_W = 0x00001c00, + OPC_CLZ_D = 0x00002400, + OPC_CTZ_D = 0x00002c00, + OPC_REVB_2H = 0x00003000, + OPC_REVB_D = 0x00003c00, + OPC_SEXT_H = 0x00005800, + OPC_SEXT_B = 0x00005c00, + OPC_ADD_W = 0x00100000, + OPC_ADD_D = 0x00108000, + OPC_SUB_W = 0x00110000, + OPC_SUB_D = 0x00118000, + OPC_SLT = 0x00120000, + OPC_SLTU = 0x00128000, + OPC_MASKEQZ = 0x00130000, + OPC_MASKNEZ = 0x00138000, + OPC_NOR = 0x00140000, + OPC_AND = 0x00148000, + OPC_OR = 0x00150000, + OPC_XOR = 0x00158000, + OPC_ORN = 0x00160000, + OPC_ANDN = 0x00168000, + OPC_SLL_W = 0x00170000, + OPC_SRL_W = 0x00178000, + OPC_SRA_W = 0x00180000, + OPC_SLL_D = 0x00188000, + OPC_SRL_D = 0x00190000, + OPC_SRA_D = 0x00198000, + OPC_ROTR_W = 0x001b0000, + OPC_ROTR_D = 0x001b8000, + OPC_MUL_W = 0x001c0000, + OPC_MULH_W = 0x001c8000, + OPC_MULH_WU = 0x001d0000, + OPC_MUL_D = 0x001d8000, + OPC_MULH_D = 0x001e0000, + OPC_MULH_DU = 0x001e8000, + OPC_DIV_W = 0x00200000, + OPC_MOD_W = 0x00208000, + OPC_DIV_WU = 0x00210000, + OPC_MOD_WU = 0x00218000, + OPC_DIV_D = 0x00220000, + OPC_MOD_D = 0x00228000, + OPC_DIV_DU = 0x00230000, + OPC_MOD_DU = 0x00238000, + OPC_SLLI_W = 0x00408000, + OPC_SLLI_D = 0x00410000, + OPC_SRLI_W = 0x00448000, + OPC_SRLI_D = 0x00450000, + OPC_SRAI_W = 0x00488000, + OPC_SRAI_D = 0x00490000, + OPC_ROTRI_W = 0x004c8000, + OPC_ROTRI_D = 0x004d0000, + OPC_BSTRINS_W = 0x00600000, + OPC_BSTRPICK_W = 0x00608000, + OPC_BSTRINS_D = 0x00800000, + OPC_BSTRPICK_D = 0x00c00000, + OPC_SLTI = 0x02000000, + OPC_SLTUI = 0x02400000, + OPC_ADDI_W = 0x02800000, + OPC_ADDI_D = 0x02c00000, + OPC_CU52I_D = 0x03000000, + OPC_ANDI = 0x03400000, + OPC_ORI = 0x03800000, + OPC_XORI = 0x03c00000, + OPC_LU12I_W = 0x14000000, + OPC_CU32I_D = 0x16000000, + OPC_PCADDU12I = 0x1c000000, + OPC_LD_B = 0x28000000, + OPC_LD_H = 0x28400000, + OPC_LD_W = 0x28800000, + OPC_LD_D = 0x28c00000, + OPC_ST_B = 0x29000000, + OPC_ST_H = 0x29400000, + OPC_ST_W = 0x29800000, + OPC_ST_D = 0x29c00000, + OPC_LD_BU = 0x2a000000, + OPC_LD_HU = 0x2a400000, + OPC_LD_WU = 0x2a800000, + OPC_DBAR = 0x38720000, + OPC_JIRL = 0x4c000000, + OPC_B = 0x50000000, + OPC_BL = 0x54000000, + OPC_BEQ = 0x58000000, + OPC_BNE = 0x5c000000, + OPC_BGT = 0x60000000, + OPC_BLE = 0x64000000, + OPC_BGTU = 0x68000000, + OPC_BLEU = 0x6c000000, +} LoongArchInsn; + +static int32_t encode_d_slot(LoongArchInsn opc, uint32_t d) + __attribute__((unused)); + +static int32_t encode_d_slot(LoongArchInsn opc, uint32_t d) +{ + return opc | d; +} + +static int32_t encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j) + __attribute__((unused)); + +static int32_t encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j) +{ + return opc | d | j << 5; +} + +static int32_t encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, + uint32_t k) __attribute__((unused)); + +static int32_t encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, + uint32_t k) +{ + return opc | d | j << 5 | k << 10; +} + +static int32_t encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, + uint32_t k, uint32_t m) + __attribute__((unused)); + +static int32_t encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, + uint32_t k, uint32_t m) +{ + return opc | d | j << 5 | k << 10 | m << 16; +} + +static int32_t encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k) + __attribute__((unused)); + +static int32_t encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k) +{ + return opc | d | k << 10; +} + +static int32_t encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j) + __attribute__((unused)); + +static int32_t encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j) +{ + d &= 0x1f; + j &= 0x1f; + return encode_dj_slots(opc, d, j); +} + +static int32_t encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static int32_t encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k) +{ + d &= 0x1f; + j &= 0x1f; + k &= 0x1f; + return encode_djk_slots(opc, d, j, k); +} + +static int32_t encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + int32_t sk12) __attribute__((unused)); + +static int32_t encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + int32_t sk12) +{ + d &= 0x1f; + j &= 0x1f; + sk12 &= 0xfff; + return encode_djk_slots(opc, d, j, sk12); +} + +static int32_t encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + int32_t sk16) __attribute__((unused)); + +static int32_t encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + int32_t sk16) +{ + d &= 0x1f; + j &= 0x1f; + sk16 &= 0xffff; + return encode_djk_slots(opc, d, j, sk16); +} + +static int32_t encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk12) __attribute__((unused)); + +static int32_t encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk12) +{ + d &= 0x1f; + j &= 0x1f; + uk12 &= 0xfff; + return encode_djk_slots(opc, d, j, uk12); +} + +static int32_t encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk5) __attribute__((unused)); + +static int32_t encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk5) +{ + d &= 0x1f; + j &= 0x1f; + uk5 &= 0x1f; + return encode_djk_slots(opc, d, j, uk5); +} + +static int32_t encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) + __attribute__((unused)); + +static int32_t encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) +{ + d &= 0x1f; + j &= 0x1f; + uk5 &= 0x1f; + um5 &= 0x1f; + return encode_djkm_slots(opc, d, j, uk5, um5); +} + +static int32_t encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk6) __attribute__((unused)); + +static int32_t encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk6) +{ + d &= 0x1f; + j &= 0x1f; + uk6 &= 0x3f; + return encode_djk_slots(opc, d, j, uk6); +} + +static int32_t encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) + __attribute__((unused)); + +static int32_t encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) +{ + d &= 0x1f; + j &= 0x1f; + uk6 &= 0x3f; + um6 &= 0x3f; + return encode_djkm_slots(opc, d, j, uk6, um6); +} + +static int32_t encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20) + __attribute__((unused)); + +static int32_t encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20) +{ + d &= 0x1f; + sj20 &= 0xfffff; + return encode_dj_slots(opc, d, sj20); +} + +static int32_t encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16) + __attribute__((unused)); + +static int32_t encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16) +{ + sd10k16 &= 0x3ffffff; + return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff); +} + +static int32_t encode_ud15_insn(LoongArchInsn opc, uint32_t ud15) + __attribute__((unused)); + +static int32_t encode_ud15_insn(LoongArchInsn opc, uint32_t ud15) +{ + ud15 &= 0x7fff; + return encode_d_slot(opc, ud15); +} + +/* Emits the `clz.w d, j` instruction. */ +static void tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j)); +} + +/* Emits the `ctz.w d, j` instruction. */ +static void tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j)); +} + +/* Emits the `clz.d d, j` instruction. */ +static void tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j)); +} + +/* Emits the `ctz.d d, j` instruction. */ +static void tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j)); +} + +/* Emits the `revb.2h d, j` instruction. */ +static void tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j)); +} + +/* Emits the `revb.d d, j` instruction. */ +static void tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j)); +} + +/* Emits the `sext.h d, j` instruction. */ +static void tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j)); +} + +/* Emits the `sext.b d, j` instruction. */ +static void tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j) + __attribute__((unused)); + +static void tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j) +{ + tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j)); +} + +/* Emits the `add.w d, j, k` instruction. */ +static void tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k)); +} + +/* Emits the `add.d d, j, k` instruction. */ +static void tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k)); +} + +/* Emits the `sub.w d, j, k` instruction. */ +static void tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k)); +} + +/* Emits the `sub.d d, j, k` instruction. */ +static void tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k)); +} + +/* Emits the `slt d, j, k` instruction. */ +static void tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k)); +} + +/* Emits the `sltu d, j, k` instruction. */ +static void tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k)); +} + +/* Emits the `maskeqz d, j, k` instruction. */ +static void tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k)); +} + +/* Emits the `masknez d, j, k` instruction. */ +static void tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k)); +} + +/* Emits the `nor d, j, k` instruction. */ +static void tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k)); +} + +/* Emits the `and d, j, k` instruction. */ +static void tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k)); +} + +/* Emits the `or d, j, k` instruction. */ +static void tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k)); +} + +/* Emits the `xor d, j, k` instruction. */ +static void tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k)); +} + +/* Emits the `orn d, j, k` instruction. */ +static void tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k)); +} + +/* Emits the `andn d, j, k` instruction. */ +static void tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k)); +} + +/* Emits the `sll.w d, j, k` instruction. */ +static void tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k)); +} + +/* Emits the `srl.w d, j, k` instruction. */ +static void tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k)); +} + +/* Emits the `sra.w d, j, k` instruction. */ +static void tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k)); +} + +/* Emits the `sll.d d, j, k` instruction. */ +static void tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k)); +} + +/* Emits the `srl.d d, j, k` instruction. */ +static void tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k)); +} + +/* Emits the `sra.d d, j, k` instruction. */ +static void tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k)); +} + +/* Emits the `rotr.w d, j, k` instruction. */ +static void tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k)); +} + +/* Emits the `rotr.d d, j, k` instruction. */ +static void tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k)); +} + +/* Emits the `mul.w d, j, k` instruction. */ +static void tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k)); +} + +/* Emits the `mulh.w d, j, k` instruction. */ +static void tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k)); +} + +/* Emits the `mulh.wu d, j, k` instruction. */ +static void tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k)); +} + +/* Emits the `mul.d d, j, k` instruction. */ +static void tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k)); +} + +/* Emits the `mulh.d d, j, k` instruction. */ +static void tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k)); +} + +/* Emits the `mulh.du d, j, k` instruction. */ +static void tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k)); +} + +/* Emits the `div.w d, j, k` instruction. */ +static void tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k)); +} + +/* Emits the `mod.w d, j, k` instruction. */ +static void tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k)); +} + +/* Emits the `div.wu d, j, k` instruction. */ +static void tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k)); +} + +/* Emits the `mod.wu d, j, k` instruction. */ +static void tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k)); +} + +/* Emits the `div.d d, j, k` instruction. */ +static void tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k)); +} + +/* Emits the `mod.d d, j, k` instruction. */ +static void tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k)); +} + +/* Emits the `div.du d, j, k` instruction. */ +static void tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k)); +} + +/* Emits the `mod.du d, j, k` instruction. */ +static void tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) + __attribute__((unused)); + +static void tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k) +{ + tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k)); +} + +/* Emits the `slli.w d, j, uk5` instruction. */ +static void tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) + __attribute__((unused)); + +static void tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) +{ + tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5)); +} + +/* Emits the `slli.d d, j, uk6` instruction. */ +static void tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) + __attribute__((unused)); + +static void tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) +{ + tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6)); +} + +/* Emits the `srli.w d, j, uk5` instruction. */ +static void tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) + __attribute__((unused)); + +static void tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) +{ + tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5)); +} + +/* Emits the `srli.d d, j, uk6` instruction. */ +static void tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) + __attribute__((unused)); + +static void tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) +{ + tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6)); +} + +/* Emits the `srai.w d, j, uk5` instruction. */ +static void tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) + __attribute__((unused)); + +static void tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) +{ + tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5)); +} + +/* Emits the `srai.d d, j, uk6` instruction. */ +static void tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) + __attribute__((unused)); + +static void tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) +{ + tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6)); +} + +/* Emits the `rotri.w d, j, uk5` instruction. */ +static void tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) + __attribute__((unused)); + +static void tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5) +{ + tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5)); +} + +/* Emits the `rotri.d d, j, uk6` instruction. */ +static void tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) + __attribute__((unused)); + +static void tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6) +{ + tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6)); +} + +/* Emits the `bstrins.w d, j, uk5, um5` instruction. */ +static void tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) + __attribute__((unused)); + +static void tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) +{ + tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5)); +} + +/* Emits the `bstrpick.w d, j, uk5, um5` instruction. */ +static void tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) + __attribute__((unused)); + +static void tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk5, uint32_t um5) +{ + tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5)); +} + +/* Emits the `bstrins.d d, j, uk6, um6` instruction. */ +static void tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) + __attribute__((unused)); + +static void tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) +{ + tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6)); +} + +/* Emits the `bstrpick.d d, j, uk6, um6` instruction. */ +static void tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) + __attribute__((unused)); + +static void tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, + uint32_t uk6, uint32_t um6) +{ + tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6)); +} + +/* Emits the `slti d, j, sk12` instruction. */ +static void tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12)); +} + +/* Emits the `sltui d, j, sk12` instruction. */ +static void tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12)); +} + +/* Emits the `addi.w d, j, sk12` instruction. */ +static void tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12)); +} + +/* Emits the `addi.d d, j, sk12` instruction. */ +static void tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12)); +} + +/* Emits the `cu52i.d d, j, sk12` instruction. */ +static void tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12)); +} + +/* Emits the `andi d, j, uk12` instruction. */ +static void tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) + __attribute__((unused)); + +static void tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) +{ + tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12)); +} + +/* Emits the `ori d, j, uk12` instruction. */ +static void tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) + __attribute__((unused)); + +static void tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) +{ + tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12)); +} + +/* Emits the `xori d, j, uk12` instruction. */ +static void tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) + __attribute__((unused)); + +static void tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12) +{ + tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12)); +} + +/* Emits the `lu12i.w d, sj20` instruction. */ +static void tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20) + __attribute__((unused)); + +static void tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20) +{ + tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20)); +} + +/* Emits the `cu32i.d d, sj20` instruction. */ +static void tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20) + __attribute__((unused)); + +static void tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20) +{ + tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20)); +} + +/* Emits the `pcaddu12i d, sj20` instruction. */ +static void tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20) + __attribute__((unused)); + +static void tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20) +{ + tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20)); +} + +/* Emits the `ld.b d, j, sk12` instruction. */ +static void tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12)); +} + +/* Emits the `ld.h d, j, sk12` instruction. */ +static void tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12)); +} + +/* Emits the `ld.w d, j, sk12` instruction. */ +static void tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12)); +} + +/* Emits the `ld.d d, j, sk12` instruction. */ +static void tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12)); +} + +/* Emits the `st.b d, j, sk12` instruction. */ +static void tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12)); +} + +/* Emits the `st.h d, j, sk12` instruction. */ +static void tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12)); +} + +/* Emits the `st.w d, j, sk12` instruction. */ +static void tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12)); +} + +/* Emits the `st.d d, j, sk12` instruction. */ +static void tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12)); +} + +/* Emits the `ld.bu d, j, sk12` instruction. */ +static void tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12)); +} + +/* Emits the `ld.hu d, j, sk12` instruction. */ +static void tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12)); +} + +/* Emits the `ld.wu d, j, sk12` instruction. */ +static void tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) + __attribute__((unused)); + +static void tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12) +{ + tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12)); +} + +/* Emits the `dbar ud15` instruction. */ +static void tcg_out_opc_dbar(TCGContext *s, uint32_t ud15) + __attribute__((unused)); + +static void tcg_out_opc_dbar(TCGContext *s, uint32_t ud15) +{ + tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15)); +} + +/* Emits the `jirl d, j, sk16` instruction. */ +static void tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16)); +} + +/* Emits the `b sd10k16` instruction. */ +static void tcg_out_opc_b(TCGContext *s, int32_t sd10k16) + __attribute__((unused)); + +static void tcg_out_opc_b(TCGContext *s, int32_t sd10k16) +{ + tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16)); +} + +/* Emits the `bl sd10k16` instruction. */ +static void tcg_out_opc_bl(TCGContext *s, int32_t sd10k16) + __attribute__((unused)); + +static void tcg_out_opc_bl(TCGContext *s, int32_t sd10k16) +{ + tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16)); +} + +/* Emits the `beq d, j, sk16` instruction. */ +static void tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16)); +} + +/* Emits the `bne d, j, sk16` instruction. */ +static void tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16)); +} + +/* Emits the `bgt d, j, sk16` instruction. */ +static void tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16)); +} + +/* Emits the `ble d, j, sk16` instruction. */ +static void tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16)); +} + +/* Emits the `bgtu d, j, sk16` instruction. */ +static void tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16)); +} + +/* Emits the `bleu d, j, sk16` instruction. */ +static void tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) + __attribute__((unused)); + +static void tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) +{ + tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16)); +} -- 2.33.0