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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v5 30/31] target/xtensa: Restrict has_work() handler to sysemu
Date: Mon, 20 Sep 2021 23:44:46 +0200	[thread overview]
Message-ID: <20210920214447.2998623-31-f4bug@amsat.org> (raw)
In-Reply-To: <20210920214447.2998623-1-f4bug@amsat.org>

Restrict has_work() to sysemu.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/xtensa/cpu.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index c1cbd03595e..5cb19a88819 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -43,18 +43,17 @@ static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.pc = value;
 }
 
+#ifndef CONFIG_USER_ONLY
+
 static bool xtensa_cpu_has_work(CPUState *cs)
 {
-#ifndef CONFIG_USER_ONLY
     XtensaCPU *cpu = XTENSA_CPU(cs);
 
     return !cpu->env.runstall && cpu->env.pending_irq_level;
-#else
-    return true;
-#endif
 }
 
-#ifdef CONFIG_USER_ONLY
+#else /* CONFIG_USER_ONLY*/
+
 static bool abi_call0;
 
 void xtensa_set_abi_call0(void)
@@ -66,7 +65,8 @@ bool xtensa_abi_call0(void)
 {
     return abi_call0;
 }
-#endif
+
+#endif /* CONFIG_USER_ONLY */
 
 static void xtensa_cpu_reset(DeviceState *dev)
 {
@@ -196,6 +196,7 @@ static const struct TCGCPUOps xtensa_tcg_ops = {
     .debug_excp_handler = xtensa_breakpoint_handler,
 
 #ifndef CONFIG_USER_ONLY
+    .has_work = xtensa_cpu_has_work,
     .cpu_exec_interrupt = xtensa_cpu_exec_interrupt,
     .do_interrupt = xtensa_cpu_do_interrupt,
     .do_transaction_failed = xtensa_cpu_do_transaction_failed,
@@ -215,7 +216,6 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
     device_class_set_parent_reset(dc, xtensa_cpu_reset, &xcc->parent_reset);
 
     cc->class_by_name = xtensa_cpu_class_by_name;
-    cc->has_work = xtensa_cpu_has_work;
     cc->dump_state = xtensa_cpu_dump_state;
     cc->set_pc = xtensa_cpu_set_pc;
     cc->gdb_read_register = xtensa_cpu_gdb_read_register;
-- 
2.31.1



  parent reply	other threads:[~2021-09-20 22:23 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-20 21:44 [PATCH v5 00/31] accel: Move has_work() from SysemuCPUOps to AccelOpsClass Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 01/31] target/arm: Implement arm_v7m_cpu_has_work() Philippe Mathieu-Daudé
2021-09-21  9:34   ` Peter Maydell
2021-09-21  9:45     ` Philippe Mathieu-Daudé
2021-09-23 17:17       ` Philippe Mathieu-Daudé
2021-09-23 18:01         ` Peter Maydell
2021-09-23 18:06           ` Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 02/31] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 03/31] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 04/31] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 05/31] sysemu: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-20 21:58   ` Richard Henderson
2021-09-23 17:17     ` Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 06/31] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 07/31] accel/whpx: " Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 08/31] accel/tcg: Implement AccelOpsClass::has_work() as stub Philippe Mathieu-Daudé
2021-09-20 22:01   ` Richard Henderson
2021-09-23 17:18     ` Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 09/31] target/alpha: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 10/31] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-20 22:03   ` Richard Henderson
2021-09-20 21:44 ` [PATCH v5 11/31] target/avr: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 12/31] target/cris: " Philippe Mathieu-Daudé
2021-09-20 21:50   ` Richard Henderson
2021-09-20 21:44 ` [PATCH v5 13/31] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 14/31] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 15/31] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 16/31] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 17/31] target/microblaze: " Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 18/31] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 19/31] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 20/31] target/openrisc: " Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 21/31] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 22/31] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 23/31] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-24  6:41   ` Alistair Francis
2021-09-20 21:44 ` [PATCH v5 24/31] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 25/31] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 26/31] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 27/31] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 28/31] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-20 21:44 ` [PATCH v5 29/31] target/tricore: " Philippe Mathieu-Daudé
2021-09-20 21:44 ` Philippe Mathieu-Daudé [this message]
2021-09-20 21:44 ` [PATCH v5 31/31] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Philippe Mathieu-Daudé

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