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Mon, 20 Sep 2021 23:55:57 -0700 (PDT) Received: from toolbox.alistair23.me (unknown [10.225.165.26]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4HDByv6S5Hz1RvlV; Mon, 20 Sep 2021 23:55:51 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: alistair23@gmail.com, Green Wan , Frank Chang , Max Hsu , Bin Meng , Alistair Francis Subject: [PULL v2 16/21] hw/dma: sifive_pdma: allow non-multiple transaction size transactions Date: Tue, 21 Sep 2021 16:54:07 +1000 Message-Id: <20210921065412.312381-17-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210921065412.312381-1-alistair.francis@opensource.wdc.com> References: <20210921065412.312381-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=891501f09=alistair.francis@opensource.wdc.com; helo=esa4.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Green Wan Real PDMA is able to deal with non-multiple transaction size transactions= . The following result is PDMA tested in U-Boot on Unmatched board: =3D> mw.l 0x3000000 0x0 <=3D Disclaim channel 0 =3D> mw.l 0x3000000 0x1 <=3D Claim channel 0 =3D> mw.l 0x3000004 0x11000000 <=3D wsize =3D rsize =3D 1 (= 2^1 =3D 2 bytes) =3D> mw.q 0x3000008 0x3 <=3D NextBytes =3D 3 =3D> mw.q 0x3000010 0x84000000 <=3D NextDestination =3D 0x8= 4000000 =3D> mw.q 0x3000018 0x84001000 <=3D NextSource =3D 0x840010= 00 =3D> mw.l 0x84000000 0x87654321 <=3D Fill test data to dst =3D> mw.l 0x84001000 0x12345678 <=3D Fill test data to src =3D> md.l 0x84000000 1; md.l 0x84001000 1 <=3D Dump src/dst memory con= tents 84000000: 87654321 !Ce. 84001000: 12345678 xV4. =3D> md.l 0x3000000 8 <=3D Dump PDMA status 03000000: 00000001 11000000 00000003 00000000 ................ 03000010: 84000000 00000000 84001000 00000000 ................ =3D> mw.l 0x3000000 0x3 <=3D Set channel 0 run and c= laim bits =3D> md.l 0x3000000 8 <=3D Dump PDMA status 03000000: 40000001 11000000 00000003 00000000 ...@............ 03000010: 84000000 00000000 84001000 00000000 ................ =3D> md.l 0x84000000 1; md.l 0x84001000 1 <=3D Dump src/dst memory con= tents 84000000: 87345678 xV4. 84001000: 12345678 xV4. Signed-off-by: Green Wan Reviewed-by: Frank Chang Tested-by: Max Hsu Reviewed-by: Bin Meng Tested-by: Bin Meng Signed-off-by: Frank Chang Message-id: 20210912130553.179501-4-frank.chang@sifive.com Signed-off-by: Alistair Francis --- hw/dma/sifive_pdma.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c index a8ce3e6699..d7d2c53e97 100644 --- a/hw/dma/sifive_pdma.c +++ b/hw/dma/sifive_pdma.c @@ -74,7 +74,7 @@ static void sifive_pdma_run(SiFivePDMAState *s, int ch) uint64_t dst =3D s->chan[ch].next_dst; uint64_t src =3D s->chan[ch].next_src; uint32_t config =3D s->chan[ch].next_config; - int wsize, rsize, size; + int wsize, rsize, size, remainder; uint8_t buf[64]; int n; =20 @@ -106,11 +106,7 @@ static void sifive_pdma_run(SiFivePDMAState *s, int = ch) size =3D 6; } size =3D 1 << size; - - /* the bytes to transfer should be multiple of transaction size */ - if (bytes % size) { - goto error; - } + remainder =3D bytes % size; =20 /* indicate a DMA transfer is started */ s->chan[ch].state =3D DMA_CHAN_STATE_STARTED; @@ -131,6 +127,14 @@ static void sifive_pdma_run(SiFivePDMAState *s, int = ch) s->chan[ch].exec_bytes -=3D size; } =20 + if (remainder) { + cpu_physical_memory_read(s->chan[ch].exec_src, buf, remainder); + cpu_physical_memory_write(s->chan[ch].exec_dst, buf, remainder); + s->chan[ch].exec_src +=3D remainder; + s->chan[ch].exec_dst +=3D remainder; + s->chan[ch].exec_bytes -=3D remainder; + } + /* indicate a DMA transfer is done */ s->chan[ch].state =3D DMA_CHAN_STATE_DONE; s->chan[ch].control &=3D ~CONTROL_RUN; --=20 2.31.1