From: Dongdong Liu <liudongdong3@huawei.com> To: <helgaas@kernel.org>, <hch@infradead.org>, <kw@linux.com>, <logang@deltatee.com>, <leon@kernel.org>, <linux-pci@vger.kernel.org>, <rajur@chelsio.com>, <hverkuil-cisco@xs4all.nl> Cc: <linux-media@vger.kernel.org>, <netdev@vger.kernel.org> Subject: [PATCH V9 5/8] PCI/IOV: Add 10-Bit Tag sysfs files for VF devices Date: Wed, 22 Sep 2021 21:36:52 +0800 [thread overview] Message-ID: <20210922133655.51811-6-liudongdong3@huawei.com> (raw) In-Reply-To: <20210922133655.51811-1-liudongdong3@huawei.com> PCIe spec 5.0 r1.0 section 2.2.6.2 says: If an Endpoint supports sending Requests to other Endpoints (as opposed to host memory), the Endpoint must not send 10-Bit Tag Requests to another given Endpoint unless an implementation-specific mechanism determines that the Endpoint supports 10-Bit Tag Completer capability. Add sriov_vf_10bit_tag file to query the status of VF 10-Bit Tag Requester Enable. Add a sriov_vf_10bit_tag_ctl sysfs file, write 0 to disable the VF 10-Bit Tag Requester. The typical use case is for p2pdma when the peer device does not support 10-Bit Tag Completer. Write 1 to enable 10-Bit Tag Requester when RC supports 10-Bit Tag Completer capability. The typical use case is for host memory targeted by DMA Requests. Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> --- Documentation/ABI/testing/sysfs-bus-pci | 23 +++++++++++ drivers/pci/iov.c | 53 +++++++++++++++++++++++++ 2 files changed, 76 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 0c26346d1069..28b1f71df620 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -440,3 +440,26 @@ Description: 10-Bit Tag Completer. Write 1 to enable 10-Bit Tag Requester when RC supports 10-Bit Tag Completer capability. The typical use case is for host memory targeted by DMA Requests. + +What: /sys/bus/pci/devices/.../sriov_vf_10bit_tag +Date: September 2021 +Contact: Dongdong Liu <liudongdong3@huawei.com> +Description: + This file is associated with a SR-IOV physical function (PF). + It is visible when the device supports VF 10-Bit Tag Requester. + It contains the status of VF 10-Bit Tag Requester Enable. + The file is read-only. + +What: /sys/bus/pci/devices/.../sriov_vf_10bit_tag_ctl +Date: September 2021 +Contact: Dongdong Liu <liudongdong3@huawei.com> +Description: + This file is associated with a SR-IOV virtual function (VF). + It is visible when the device supports VF 10-Bit Tag + Requester. The file is only writeable when the VF driver + does not bind to a device. Write 0 to any VF's file disables + 10-Bit Tag Requester for all VFs. The typical use case is for + p2pdma when the peer device does not support 10-Bit Tag + Completer. Write 1 to enable 10-Bit Tag Requester for all VFs + when RC supports 10-Bit Tag Completer capability. The typical + use case is for host memory targeted by DMA Requests. diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index dafdc652fcd0..7781b87a940c 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -220,10 +220,41 @@ static ssize_t sriov_vf_msix_count_store(struct device *dev, static DEVICE_ATTR_WO(sriov_vf_msix_count); #endif +static ssize_t sriov_vf_10bit_tag_ctl_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct pci_dev *vf_dev = to_pci_dev(dev); + struct pci_dev *pdev = pci_physfn(vf_dev); + bool enable; + + if (kstrtobool(buf, &enable) < 0) + return -EINVAL; + + if (vf_dev->driver) + return -EBUSY; + + if (enable) { + if (!pcie_rp_10bit_tag_cmp_supported(pdev)) + return -EPERM; + + pdev->sriov->ctrl |= PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN; + } else { + pdev->sriov->ctrl &= ~PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN; + } + + pci_write_config_word(pdev, pdev->sriov->pos + PCI_SRIOV_CTRL, + pdev->sriov->ctrl); + + return count; +} +static DEVICE_ATTR_WO(sriov_vf_10bit_tag_ctl); + static struct attribute *sriov_vf_dev_attrs[] = { #ifdef CONFIG_PCI_MSI &dev_attr_sriov_vf_msix_count.attr, #endif + &dev_attr_sriov_vf_10bit_tag_ctl.attr, NULL, }; @@ -236,6 +267,11 @@ static umode_t sriov_vf_attrs_are_visible(struct kobject *kobj, if (!pdev->is_virtfn) return 0; + pdev = pci_physfn(pdev); + if ((a == &dev_attr_sriov_vf_10bit_tag_ctl.attr) && + !(pdev->sriov->cap & PCI_SRIOV_CAP_VF_10BIT_TAG_REQ)) + return 0; + return a->mode; } @@ -487,12 +523,23 @@ static ssize_t sriov_drivers_autoprobe_store(struct device *dev, return count; } +static ssize_t sriov_vf_10bit_tag_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + + return sysfs_emit(buf, "%u\n", + !!(pdev->sriov->ctrl & PCI_SRIOV_CTRL_VF_10BIT_TAG_REQ_EN)); +} + static DEVICE_ATTR_RO(sriov_totalvfs); static DEVICE_ATTR_RW(sriov_numvfs); static DEVICE_ATTR_RO(sriov_offset); static DEVICE_ATTR_RO(sriov_stride); static DEVICE_ATTR_RO(sriov_vf_device); static DEVICE_ATTR_RW(sriov_drivers_autoprobe); +static DEVICE_ATTR_RO(sriov_vf_10bit_tag); static struct attribute *sriov_pf_dev_attrs[] = { &dev_attr_sriov_totalvfs.attr, @@ -501,6 +548,7 @@ static struct attribute *sriov_pf_dev_attrs[] = { &dev_attr_sriov_stride.attr, &dev_attr_sriov_vf_device.attr, &dev_attr_sriov_drivers_autoprobe.attr, + &dev_attr_sriov_vf_10bit_tag.attr, #ifdef CONFIG_PCI_MSI &dev_attr_sriov_vf_total_msix.attr, #endif @@ -511,10 +559,15 @@ static umode_t sriov_pf_attrs_are_visible(struct kobject *kobj, struct attribute *a, int n) { struct device *dev = kobj_to_dev(kobj); + struct pci_dev *pdev = to_pci_dev(dev); if (!dev_is_pf(dev)) return 0; + if ((a == &dev_attr_sriov_vf_10bit_tag.attr) && + !(pdev->sriov->cap & PCI_SRIOV_CAP_VF_10BIT_TAG_REQ)) + return 0; + return a->mode; } -- 2.22.0
next prev parent reply other threads:[~2021-09-22 13:40 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-22 13:36 [PATCH V9 0/8] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 1/8] PCI: Use cached devcap in more places Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 2/8] PCI: Cache Device Capabilities 2 Register Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 3/8] PCI: Add 10-Bit Tag register definitions Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 4/8] PCI/sysfs: Add a 10-Bit Tag sysfs file PCIe Endpoint devices Dongdong Liu 2021-09-23 4:21 ` Krzysztof Wilczyński 2021-09-23 11:06 ` Dongdong Liu 2021-09-22 13:36 ` Dongdong Liu [this message] 2021-09-22 13:36 ` [PATCH V9 6/8] PCI/P2PDMA: Add a 10-Bit Tag check in P2PDMA Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 7/8] PCI: Enable 10-Bit Tag support for PCIe Endpoint device Dongdong Liu 2021-09-22 13:36 ` [PATCH V9 8/8] PCI/IOV: Enable 10-Bit Tag support for PCIe VF devices Dongdong Liu
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