All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v8 28/40] target/openrisc: Restrict has_work() handler to sysemu
Date: Mon, 27 Sep 2021 00:27:04 +0200	[thread overview]
Message-ID: <20210926222716.1732932-29-f4bug@amsat.org> (raw)
In-Reply-To: <20210926222716.1732932-1-f4bug@amsat.org>

Restrict has_work() to sysemu.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/openrisc/cpu.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 27cb04152f9..3c368a1bde7 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -30,11 +30,13 @@ static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.dflag = 0;
 }
 
+#if !defined(CONFIG_USER_ONLY)
 static bool openrisc_cpu_has_work(CPUState *cs)
 {
     return cs->interrupt_request & (CPU_INTERRUPT_HARD |
                                     CPU_INTERRUPT_TIMER);
 }
+#endif /* !CONFIG_USER_ONLY */
 
 static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info)
 {
@@ -189,6 +191,7 @@ static const struct TCGCPUOps openrisc_tcg_ops = {
     .tlb_fill = openrisc_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+    .has_work = openrisc_cpu_has_work,
     .cpu_exec_interrupt = openrisc_cpu_exec_interrupt,
     .do_interrupt = openrisc_cpu_do_interrupt,
 #endif /* !CONFIG_USER_ONLY */
@@ -205,7 +208,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
     device_class_set_parent_reset(dc, openrisc_cpu_reset, &occ->parent_reset);
 
     cc->class_by_name = openrisc_cpu_class_by_name;
-    cc->has_work = openrisc_cpu_has_work;
     cc->dump_state = openrisc_cpu_dump_state;
     cc->set_pc = openrisc_cpu_set_pc;
     cc->gdb_read_register = openrisc_cpu_gdb_read_register;
-- 
2.31.1



  parent reply	other threads:[~2021-09-26 22:53 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-26 22:26 [PATCH v8 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 02/40] hw/core: Restrict cpu_has_work() to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 03/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 04/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 23:58   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 05/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-26 23:59   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 06/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 07/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 08/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-27  0:00   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 09/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-27  0:01   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 10/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-27  0:01   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 11/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-27  0:02   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 12/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-27  0:02   ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 13/40] accel/tcg: " Philippe Mathieu-Daudé
2021-09-27  0:12   ` Richard Henderson
2021-09-27  4:38     ` Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 14/40] accel: Simplify cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 15/40] accel/tcg: Introduce TCGCPUOps::has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 16/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 17/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 18/40] target/alpha: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 19/40] target/avr: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 21/40] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 22/40] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` Philippe Mathieu-Daudé [this message]
2021-09-26 22:27 ` [PATCH v8 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-29  7:06   ` Mark Cave-Ayland
2021-09-26 22:27 ` [PATCH v8 36/40] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-29  7:07   ` Mark Cave-Ayland
2021-09-26 22:27 ` [PATCH v8 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210926222716.1732932-29-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.