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From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
To: u-boot@lists.denx.de
Cc: khilman@baylibre.com,
	Amjad Ouled-Ameur <aouledameur@baylibre.com>,
	Subhajit Paul <subhajit_paul@ti.com>, Suman Anna <s-anna@ti.com>,
	"Andrew F. Davis" <afd@ti.com>, Tom Rini <trini@konsulko.com>
Subject: [PATCH 2/2] ARM: DRA7: Enable OPP_HIGH for GPU voltage domain
Date: Mon, 27 Sep 2021 14:34:47 +0200	[thread overview]
Message-ID: <20210927123447.188123-3-aouledameur@baylibre.com> (raw)
In-Reply-To: <20210927123447.188123-1-aouledameur@baylibre.com>

Enable the OPP_HIGH configuration for GPU voltage domain
by default for various TI DRA7xx and AM57xx boards. This
is being done to meet the performance needs of 1080p
GFX/MultiMedia usecases. This domain does not support DVFS
and the kernel will continue to run at the boot OPP chosen
here.

Based on logic similar to that of DSPEVE and IVA voltage
domains in commit 58a8921fe34fd5 ("ARM: DRA7: Enable OPP_HIGH
for DSPEVE and IVA voltage domains")

Signed-off-by: Subhajit Paul <subhajit_paul@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>

---

 configs/am57xx_evm_defconfig        | 1 +
 configs/am57xx_hs_evm_defconfig     | 1 +
 configs/am57xx_hs_evm_usb_defconfig | 1 +
 configs/dra7xx_evm_defconfig        | 1 +
 configs/dra7xx_hs_evm_defconfig     | 1 +
 configs/dra7xx_hs_evm_usb_defconfig | 1 +
 6 files changed, 6 insertions(+)

diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 62fe2e5b9037..cfd742a3d80a 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -11,6 +11,7 @@ CONFIG_OMAP54XX=y
 CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 55bc28a533c1..edc3e8e34449 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -14,6 +14,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
 CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig
index cdb3af3cb69d..ba1449a6ef07 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -16,6 +16,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
 CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 71f6b0b6c3ff..95d4244595ab 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -11,6 +11,7 @@ CONFIG_OMAP54XX=y
 CONFIG_TARGET_DRA7XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 5462a79f10c5..537d7d40fdcf 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -14,6 +14,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
 CONFIG_TARGET_DRA7XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig
index eff9346221f4..cab7f9f5394d 100644
--- a/configs/dra7xx_hs_evm_usb_defconfig
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -16,6 +16,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
 CONFIG_TARGET_DRA7XX_EVM=y
 CONFIG_DRA7_DSPEVE_OPP_HIGH=y
 CONFIG_DRA7_IVA_OPP_HIGH=y
+CONFIG_DRA7_GPU_OPP_HIGH=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
-- 
2.25.1


  parent reply	other threads:[~2021-09-27 12:35 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-27 12:34 [PATCH 0/2] ARM: DRA7: Enable OPP_HIGH for GPU, DSPEVE and IVA voltage domains Amjad Ouled-Ameur
2021-09-27 12:34 ` [PATCH 1/2] ARM: DRA7: Enable OPP_HIGH for " Amjad Ouled-Ameur
2021-09-27 12:34 ` Amjad Ouled-Ameur [this message]
2021-09-27 14:43 ` [PATCH 0/2] ARM: DRA7: Enable OPP_HIGH for GPU, " Suman Anna
2021-09-27 14:50   ` Tom Rini

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