[PATCH net-next 1/2] net: pcs: xpcs: introduce xpcs_modify() helper function

[PATCH net-next 1/2] net: pcs: xpcs: introduce xpcs_modify() helper function

[Wong Vee Khee]

In some cases we need to call mdiobus_modify() to avoid calling
mdiobus_write() when it is not required.

Introduce a xpcs_modify() helper function that allow us to call
mdiobus_modify() in the pcs-xpcs module.

Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
---
 drivers/net/pcs/pcs-xpcs.c | 9 +++++++++
 drivers/net/pcs/pcs-xpcs.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index fb0a83dc09ac..da8c81d25edd 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -191,6 +191,15 @@ int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val)
 	return mdiobus_write(bus, addr, reg_addr, val);
 }
 
+int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set)
+{
+	u32 reg_addr = mdiobus_c45_addr(dev, reg);
+	struct mii_bus *bus = xpcs->mdiodev->bus;
+	int addr = xpcs->mdiodev->addr;
+
+	return mdiobus_modify(bus, addr, reg_addr, mask, set);
+}
+
 static int xpcs_read_vendor(struct dw_xpcs *xpcs, int dev, u32 reg)
 {
 	return xpcs_read(xpcs, dev, DW_VENDOR | reg);
diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h
index 35651d32a224..fdb870333395 100644
--- a/drivers/net/pcs/pcs-xpcs.h
+++ b/drivers/net/pcs/pcs-xpcs.h
@@ -109,6 +109,7 @@
 
 int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg);
 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val);
+int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set);
 
 int nxp_sja1105_sgmii_pma_config(struct dw_xpcs *xpcs);
 int nxp_sja1110_sgmii_pma_config(struct dw_xpcs *xpcs);
-- 
2.25.1

[PATCH net-next 1/2] net: pcs: xpcs: introduce xpcs_modify() helper function

[Wong Vee Khee]

In some cases we need to call mdiobus_modify() to avoid calling
mdiobus_write() when it is not required.

Introduce a xpcs_modify() helper function that allow us to call
mdiobus_modify() in the pcs-xpcs module.

Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
---
 drivers/net/pcs/pcs-xpcs.c | 9 +++++++++
 drivers/net/pcs/pcs-xpcs.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index fb0a83dc09ac..da8c81d25edd 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -191,6 +191,15 @@ int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val)
 	return mdiobus_write(bus, addr, reg_addr, val);
 }
 
+int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set)
+{
+	u32 reg_addr = mdiobus_c45_addr(dev, reg);
+	struct mii_bus *bus = xpcs->mdiodev->bus;
+	int addr = xpcs->mdiodev->addr;
+
+	return mdiobus_modify(bus, addr, reg_addr, mask, set);
+}
+
 static int xpcs_read_vendor(struct dw_xpcs *xpcs, int dev, u32 reg)
 {
 	return xpcs_read(xpcs, dev, DW_VENDOR | reg);
diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h
index 35651d32a224..fdb870333395 100644
--- a/drivers/net/pcs/pcs-xpcs.h
+++ b/drivers/net/pcs/pcs-xpcs.h
@@ -109,6 +109,7 @@
 
 int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg);
 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val);
+int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set);
 
 int nxp_sja1105_sgmii_pma_config(struct dw_xpcs *xpcs);
 int nxp_sja1110_sgmii_pma_config(struct dw_xpcs *xpcs);
-- 
2.25.1

[PATCH net-next 2/2] net: pcs: xpcs: fix incorrect CL37 AN sequence

[Wong Vee Khee]

According to Synopsys DesignWare Cores Ethernet PCS databook, it is
required to disable Clause 37 auto-negotiation by programming bit-12
(AN_ENABLE) to 0 if it is already enabled, before programming various
fields of VR_MII_AN_CTRL registers.

After all these programming are done, it is then required to enable
Clause 37 auto-negotiation by programming bit-12 (AN_ENABLE) to 1.

Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
---
 drivers/net/pcs/pcs-xpcs.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
index da8c81d25edd..eacfb32bb229 100644
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -709,11 +709,14 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
 	int ret;
 
 	/* For AN for C37 SGMII mode, the settings are :-
-	 * 1) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
-	 * 2) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
+	 * 1) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 0b (Disable SGMII AN in case
+	      it is already enabled)
+	 * 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
+	 * 3) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
 	 *    DW xPCS used with DW EQoS MAC is always MAC side SGMII.
-	 * 3) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
+	 * 4) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
 	 *    speed/duplex mode change by HW after SGMII AN complete)
+	 * 5) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN)
 	 *
 	 * Note: Since it is MAC side SGMII, there is no need to set
 	 *	 SR_MII_AN_ADV. MAC side SGMII receives AN Tx Config from
@@ -721,6 +724,11 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
 	 *	 between PHY and Link Partner. There is also no need to
 	 *	 trigger AN restart for MAC-side SGMII.
 	 */
+	ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, AN_CL37_EN,
+			  0);
+	if (ret < 0)
+		return ret;
+
 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);
 	if (ret < 0)
 		return ret;
@@ -745,7 +753,15 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
 	else
 		ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;
 
-	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
+	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
+	if (ret < 0)
+		return ret;
+
+	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
+	if (ret < 0)
+		return ret;
+	ret |= AN_CL37_EN;
+	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);
 }
 
 static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
-- 
2.25.1

Re: [PATCH net-next 2/2] net: pcs: xpcs: fix incorrect CL37 AN sequence

[Vladimir Oltean]

On Tue, Sep 28, 2021 at 12:19:38PM +0800, Wong Vee Khee wrote:
> According to Synopsys DesignWare Cores Ethernet PCS databook, it is
> required to disable Clause 37 auto-negotiation by programming bit-12
> (AN_ENABLE) to 0 if it is already enabled, before programming various
> fields of VR_MII_AN_CTRL registers.
> 
> After all these programming are done, it is then required to enable
> Clause 37 auto-negotiation by programming bit-12 (AN_ENABLE) to 1.
> 
> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
> ---



>  drivers/net/pcs/pcs-xpcs.c | 24 ++++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
> index da8c81d25edd..eacfb32bb229 100644
> --- a/drivers/net/pcs/pcs-xpcs.c
> +++ b/drivers/net/pcs/pcs-xpcs.c
> @@ -709,11 +709,14 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
>  	int ret;
>  
>  	/* For AN for C37 SGMII mode, the settings are :-
> -	 * 1) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
> -	 * 2) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
> +	 * 1) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 0b (Disable SGMII AN in case
> +	      it is already enabled)
> +	 * 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
> +	 * 3) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
>  	 *    DW xPCS used with DW EQoS MAC is always MAC side SGMII.
> -	 * 3) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
> +	 * 4) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
>  	 *    speed/duplex mode change by HW after SGMII AN complete)
> +	 * 5) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN)
>  	 *
>  	 * Note: Since it is MAC side SGMII, there is no need to set
>  	 *	 SR_MII_AN_ADV. MAC side SGMII receives AN Tx Config from
> @@ -721,6 +724,11 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
>  	 *	 between PHY and Link Partner. There is also no need to
>  	 *	 trigger AN restart for MAC-side SGMII.
>  	 */
> +	ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, AN_CL37_EN,

Would you mind using "MDIO_CTRL1" instead of "DW_VR_MII_MMD_CTRL", and
"MDIO_AN_CTRL1_ENABLE" instead of "AN_CL37_EN"? After all, the
"SR_MII_CTRL" naming from the data book comes from "Standard Register".

> +			  0);
> +	if (ret < 0)
> +		return ret;
> +
>  	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);
>  	if (ret < 0)
>  		return ret;
> @@ -745,7 +753,15 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
>  	else
>  		ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;
>  
> -	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
> +	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);

There is an interesting note in the data book about the MAC_AUTO_SW bit:

| This mode is valid only when DWC_xpcs is configured as MAC-side
| SGMII/USXGMII/QSGMII and should be set only when Auto-negotiation is
| enabled (AN_ENABLE bit is set to 1).

With your patch, it will be set while the AN_ENABLE bit is zero.
I wonder whether that's a poor choice of words, because it does
contradict with the sequence described in section "7.12.1 SGMII
Auto-Negotiation", and if it just means "only set MAC_AUTO_SW if you
intend to eventually set AN_ENABLE", not "you must set it only _while_
AN_ENABLE is set".

> +	if (ret < 0)
> +		return ret;
> +
> +	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
> +	if (ret < 0)
> +		return ret;
> +	ret |= AN_CL37_EN;

So this is the part that really confuses me.
The xpcs driver did not use to do any configuration at all for this bit.
Am I right in assuming that we were all operating with the default value?
Because in your case, the default value is set by your bootloader
(AN_CL37_EN is set), and in my case, the default is the hardware reset
(AN_CL37_EN is not set). I think (haven't tested) that this change would
actually break my setups where phylink_autoneg_inband(mode) returns false.

So could you please add this conditional?

	if (phylink_autoneg_inband(mode))
		ret |= MDIO_AN_CTRL1_ENABLE;
	else
		ret &= ~MDIO_AN_CTRL1_ENABLE;

> +	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);
>  }
>  
>  static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
> -- 
> 2.25.1
> 

Re: [PATCH net-next 2/2] net: pcs: xpcs: fix incorrect CL37 AN sequence

[Vladimir Oltean]

On Tue, Sep 28, 2021 at 12:19:38PM +0800, Wong Vee Khee wrote:
> According to Synopsys DesignWare Cores Ethernet PCS databook, it is
> required to disable Clause 37 auto-negotiation by programming bit-12
> (AN_ENABLE) to 0 if it is already enabled, before programming various
> fields of VR_MII_AN_CTRL registers.
> 
> After all these programming are done, it is then required to enable
> Clause 37 auto-negotiation by programming bit-12 (AN_ENABLE) to 1.
> 
> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
> ---

Other comments:

- please provide a Fixes: tag, like:

Fixes: b97b5331b8ab ("net: pcs: add C37 SGMII AN support for intel mGbE controller")

(just like that, not split on multiple lines)

- please target the patches to the "net" tree. I see the xpcs_modify
  patch has other stuff in its context (nxp_sja1105) that will conflict
  with the tree in which the bad commit was originally introduced, so I
  think the easiest way would be if you could just open-code the initial
  clearing of bit MDIO_AN_CTRL1_ENABLE. You could then wait until "net"
  merges with "net-next" again and do the other cleanups afterwards - it
  looks like other places could use a _modify method as well, just
  looking at DW_VR_MII_AN_CTRL, DW_VR_MII_DIG_CTRL1. Also, the complete
  replacement of DW_VR_MII_MMD_CTRL with MDIO_CTRL1 can also be done in
  net-next. Just try to keep the fix minimally self-contained.

Re: [PATCH net-next 2/2] net: pcs: xpcs: fix incorrect CL37 AN sequence

[Wong Vee Khee]

On Tue, Sep 28, 2021 at 10:27:31AM +0000, Vladimir Oltean wrote:
> On Tue, Sep 28, 2021 at 12:19:38PM +0800, Wong Vee Khee wrote:
> > According to Synopsys DesignWare Cores Ethernet PCS databook, it is
> > required to disable Clause 37 auto-negotiation by programming bit-12
> > (AN_ENABLE) to 0 if it is already enabled, before programming various
> > fields of VR_MII_AN_CTRL registers.
> > 
> > After all these programming are done, it is then required to enable
> > Clause 37 auto-negotiation by programming bit-12 (AN_ENABLE) to 1.
> > 
> > Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> > Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
> > ---
> 
> 
> 
> >  drivers/net/pcs/pcs-xpcs.c | 24 ++++++++++++++++++++----
> >  1 file changed, 20 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c
> > index da8c81d25edd..eacfb32bb229 100644
> > --- a/drivers/net/pcs/pcs-xpcs.c
> > +++ b/drivers/net/pcs/pcs-xpcs.c
> > @@ -709,11 +709,14 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
> >  	int ret;
> >  
> >  	/* For AN for C37 SGMII mode, the settings are :-
> > -	 * 1) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
> > -	 * 2) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
> > +	 * 1) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 0b (Disable SGMII AN in case
> > +	      it is already enabled)
> > +	 * 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 10b (SGMII AN)
> > +	 * 3) VR_MII_AN_CTRL Bit(3) [TX_CONFIG] = 0b (MAC side SGMII)
> >  	 *    DW xPCS used with DW EQoS MAC is always MAC side SGMII.
> > -	 * 3) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
> > +	 * 4) VR_MII_DIG_CTRL1 Bit(9) [MAC_AUTO_SW] = 1b (Automatic
> >  	 *    speed/duplex mode change by HW after SGMII AN complete)
> > +	 * 5) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN)
> >  	 *
> >  	 * Note: Since it is MAC side SGMII, there is no need to set
> >  	 *	 SR_MII_AN_ADV. MAC side SGMII receives AN Tx Config from
> > @@ -721,6 +724,11 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
> >  	 *	 between PHY and Link Partner. There is also no need to
> >  	 *	 trigger AN restart for MAC-side SGMII.
> >  	 */
> > +	ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, AN_CL37_EN,
> 
> Would you mind using "MDIO_CTRL1" instead of "DW_VR_MII_MMD_CTRL", and
> "MDIO_AN_CTRL1_ENABLE" instead of "AN_CL37_EN"? After all, the
> "SR_MII_CTRL" naming from the data book comes from "Standard Register".
> 
> > +			  0);
> > +	if (ret < 0)
> > +		return ret;
> > +
> >  	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);
> >  	if (ret < 0)
> >  		return ret;
> > @@ -745,7 +753,15 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
> >  	else
> >  		ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;
> >  
> > -	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
> > +	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
> 
> There is an interesting note in the data book about the MAC_AUTO_SW bit:
> 
> | This mode is valid only when DWC_xpcs is configured as MAC-side
> | SGMII/USXGMII/QSGMII and should be set only when Auto-negotiation is
> | enabled (AN_ENABLE bit is set to 1).
> 
> With your patch, it will be set while the AN_ENABLE bit is zero.
> I wonder whether that's a poor choice of words, because it does
> contradict with the sequence described in section "7.12.1 SGMII
> Auto-Negotiation", and if it just means "only set MAC_AUTO_SW if you
> intend to eventually set AN_ENABLE", not "you must set it only _while_
> AN_ENABLE is set".
>

I am actually following what is described in section "7.12.1 SGMII
Auto-Negotiation". I guess it is more accurate to follow what is
described in there.
 
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
> > +	if (ret < 0)
> > +		return ret;
> > +	ret |= AN_CL37_EN;
> 
> So this is the part that really confuses me.
> The xpcs driver did not use to do any configuration at all for this bit.
> Am I right in assuming that we were all operating with the default value?
> Because in your case, the default value is set by your bootloader
> (AN_CL37_EN is set), and in my case, the default is the hardware reset
> (AN_CL37_EN is not set). I think (haven't tested) that this change would
> actually break my setups where phylink_autoneg_inband(mode) returns false.
> 
> So could you please add this conditional?
> 
> 	if (phylink_autoneg_inband(mode))
> 		ret |= MDIO_AN_CTRL1_ENABLE;
> 	else
> 		ret &= ~MDIO_AN_CTRL1_ENABLE;
>

Added this. I will still use 'AN_CL37_EN' instead of
'MDIO_AN_CTRL1_ENABLE' for now. Let's rename all 'AN_CL37_EN' to
'MDIO_AN_CTRL1_ENABLE' later on net-next.

> > +	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);
> >  }
> >  
> >  static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
> > -- 
> > 2.25.1
> > 

Re: [PATCH net-next 2/2] net: pcs: xpcs: fix incorrect CL37 AN sequence

[Wong Vee Khee]

On Tue, Sep 28, 2021 at 10:41:04AM +0000, Vladimir Oltean wrote:
> On Tue, Sep 28, 2021 at 12:19:38PM +0800, Wong Vee Khee wrote:
> > According to Synopsys DesignWare Cores Ethernet PCS databook, it is
> > required to disable Clause 37 auto-negotiation by programming bit-12
> > (AN_ENABLE) to 0 if it is already enabled, before programming various
> > fields of VR_MII_AN_CTRL registers.
> > 
> > After all these programming are done, it is then required to enable
> > Clause 37 auto-negotiation by programming bit-12 (AN_ENABLE) to 1.
> > 
> > Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> > Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
> > ---
> 
> Other comments:
> 
> - please provide a Fixes: tag, like:
> 
> Fixes: b97b5331b8ab ("net: pcs: add C37 SGMII AN support for intel mGbE controller")
> 
> (just like that, not split on multiple lines)
> 
> - please target the patches to the "net" tree. I see the xpcs_modify
>   patch has other stuff in its context (nxp_sja1105) that will conflict
>   with the tree in which the bad commit was originally introduced, so I
>   think the easiest way would be if you could just open-code the initial
>   clearing of bit MDIO_AN_CTRL1_ENABLE. You could then wait until "net"
>   merges with "net-next" again and do the other cleanups afterwards - it
>   looks like other places could use a _modify method as well, just
>   looking at DW_VR_MII_AN_CTRL, DW_VR_MII_DIG_CTRL1. Also, the complete
>   replacement of DW_VR_MII_MMD_CTRL with MDIO_CTRL1 can also be done in
>   net-next. Just try to keep the fix minimally self-contained.

Sure! will mark this target for 'net' for v2.