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[88.207.96.123]) by smtp.googlemail.com with ESMTPSA id n23sm12579876edw.75.2021.09.28.09.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 09:27:10 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, pali@kernel.org Cc: Robert Marko Subject: [PATCH v2 2/3] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins Date: Tue, 28 Sep 2021 18:27:03 +0200 Message-Id: <20210928162704.687513-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210928162704.687513-1-robert.marko@sartura.hr> References: <20210928162704.687513-1-robert.marko@sartura.hr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Both the Topaz switch and 88E1512 PHY have their reset and interrupts connected to the SoC. So, define the Topaz and 88E1512 reset pins in the DTS. Defining the interrupt pins wont work as both the 88E1512 and the Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller only supports edge triggers. 88E1512 would require special setup anyway as its INT pin is shared with the LED2 and you first need to configure it as INT. Signed-off-by: Robert Marko Reviewed-by: Andrew Lunn --- arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts index 610ff6f385c7..7c786d218f1b 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts @@ -114,12 +114,16 @@ &usb3 { &mdio { extphy: ethernet-phy@1 { reg = <1>; + + reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>; }; }; &switch0 { reg = <3>; + reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>; + ports { switch0port1: port@1 { reg = <1>; -- 2.31.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07F35C433EF for ; Tue, 28 Sep 2021 16:29:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BF94D60EE9 for ; Tue, 28 Sep 2021 16:29:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BF94D60EE9 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sartura.hr Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ecfsWxj+gblCKoVW9UfAs04cHZ56RmZjWJ2b9KqELNY=; b=E0mg9hJJtvwIOj u7eAQq1AmnUzU9yOjLvT1/E7hBWxCIIIFgBnSvJoBDoE6LXAQa1kWB3qwy1nwaLd0y+fzIveqy6GF gkuK++46A+dfG4E6B0pZDok4+MNOQ3p3aNfDjVPskO95OmuQAnwvfp4xkDZ9pSBPqpf/04ENhSdks 7QTFeqJ7o88Mv6aqepHxqvLbjS20b3P25HGd6sRKb9ruRegRNr2IwPljzXSmZfkb7AaeGx8SCQBxv EjVE4ygH8lwMLf2saSYec/rdfI4dC7KUG1g/JToeVAjuG6dZdRLj4+kI38cWWhpxRQLIxEhpY5oUq iMB+g1LNP83jMMhiazXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVFwu-0083tO-PO; Tue, 28 Sep 2021 16:27:21 +0000 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVFwp-0083pq-72 for linux-arm-kernel@lists.infradead.org; Tue, 28 Sep 2021 16:27:16 +0000 Received: by mail-ed1-x532.google.com with SMTP id dj4so85975455edb.5 for ; Tue, 28 Sep 2021 09:27:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MOkJiFFV+D+y/7iBdkppsbCFqP93nQiAS8IIYiy8lX0=; b=djqXHYsV7xAQcQ/mhBAPdDxvJySXs4FguHPH9NH1ldUxU/J642GXPL3pB/z8F53aFY BQ2zNu9KA9YhEeTB5IvvS3LPUtp15tnP7jA3bSG6rZ2gNiZqqYcznhAJHNZHjV2/EaGo UKEq014m+btoLN5Piz2f9tSs78iGQo6WndI7+I3Kdz6lyyNPx2kLCa8Bcw7z7pAo3k4A USik91g0EdgluotTEu0f1OihzTcLWgwDR65N26NeQoBtI0rO/oMVb2TqmfLvRz4vjjrT mtQEJp5P1nAYOnCuGyyLPRCVXhoKEIE6TNDNyfGb2gZ/ulm7AaKpmHHy9ah9oV5fzn2f Cr+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MOkJiFFV+D+y/7iBdkppsbCFqP93nQiAS8IIYiy8lX0=; b=T5NOeFC5uhMye7nKp8wkndPXBIJ9rk/6EhC6C/cejGd7J7Bu97wTRcI+pbbMtkLAn+ aVvRQA1A+jv1fVWxLbGJ9cG40r7X6hklrN2I3/M6H4QQA+vcd4/BqtgALWl3swZXDjEV WWp1tqZHcdo5o9eR/rASY3xzDJ0Cne/vMJG19rFgzRK4z4r3REtr/yFtToxjckFf1dBr IJr3OukhNwxCptSgBxcgc5YGTrcXTQWcH0j7q0iytgx0dlXBUJgdYClytUXIfZ3WQ6lt jObkMiavKdZaQbkPMeebmE6y9PgpHlknqb06LC4tzScRuXZ2EDBbgRlONV4JTeZ+H/Ka c3ZA== X-Gm-Message-State: AOAM530OHnKHrsPZ2p7GCUDG5FKRB5rn2U5bjBcvxd5eaJd4K8zSpdNJ lxoqCmKvn8LfhfApwjRKqbM+9A== X-Google-Smtp-Source: ABdhPJxiSj/o79HZRaORk99sA2V5qNHGt2/Ilgk73xdVmmi2N/C1Gl07IERKmd5KSx+i7hFxUTiOYg== X-Received: by 2002:a17:906:7d42:: with SMTP id l2mr7917718ejp.467.1632846431153; Tue, 28 Sep 2021 09:27:11 -0700 (PDT) Received: from fedora.. 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[88.207.96.123]) by smtp.googlemail.com with ESMTPSA id n23sm12579876edw.75.2021.09.28.09.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Sep 2021 09:27:10 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, pali@kernel.org Cc: Robert Marko Subject: [PATCH v2 2/3] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins Date: Tue, 28 Sep 2021 18:27:03 +0200 Message-Id: <20210928162704.687513-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210928162704.687513-1-robert.marko@sartura.hr> References: <20210928162704.687513-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210928_092715_296121_86928F8D X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Both the Topaz switch and 88E1512 PHY have their reset and interrupts connected to the SoC. So, define the Topaz and 88E1512 reset pins in the DTS. Defining the interrupt pins wont work as both the 88E1512 and the Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller only supports edge triggers. 88E1512 would require special setup anyway as its INT pin is shared with the LED2 and you first need to configure it as INT. Signed-off-by: Robert Marko Reviewed-by: Andrew Lunn --- arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts index 610ff6f385c7..7c786d218f1b 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts @@ -114,12 +114,16 @@ &usb3 { &mdio { extphy: ethernet-phy@1 { reg = <1>; + + reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>; }; }; &switch0 { reg = <3>; + reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>; + ports { switch0port1: port@1 { reg = <1>; -- 2.31.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel