From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D95A8C433EF for ; Wed, 29 Sep 2021 20:39:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 80E406124C for ; Wed, 29 Sep 2021 20:39:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 80E406124C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1A80889E26; Wed, 29 Sep 2021 20:39:15 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3A9EE89E26 for ; Wed, 29 Sep 2021 20:39:14 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10122"; a="204523709" X-IronPort-AV: E=Sophos;i="5.85,334,1624345200"; d="scan'208";a="204523709" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 13:27:06 -0700 X-IronPort-AV: E=Sophos;i="5.85,334,1624345200"; d="scan'208";a="520012563" Received: from ideak-desk.fi.intel.com ([10.237.68.141]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 13:27:05 -0700 Date: Wed, 29 Sep 2021 23:27:02 +0300 From: Imre Deak To: Ville Syrjala Cc: intel-gfx@lists.freedesktop.org Message-ID: <20210929202702.GK2192289@ideak-desk.fi.intel.com> References: <20210927182455.27119-10-ville.syrjala@linux.intel.com> <20210929165525.11410-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20210929165525.11410-1-ville.syrjala@linux.intel.com> Subject: Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Allow per-lane drive settings with LTTPRs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Sep 29, 2021 at 07:55:25PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > LTTPRs should support per-lane drive settings I think, and even if > they don't they should implement their own fallback logic to determine > suitable common drive settings to use for all the lanes. > > v2: Actually check the correct thing > > Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > index f26c44a6b568..eeea6c73e218 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > @@ -304,7 +304,7 @@ static u8 intel_dp_phy_preemph_max(struct intel_dp *intel_dp, > static bool has_per_lane_signal_levels(struct intel_dp *intel_dp, > enum drm_dp_phy dp_phy) > { > - return false; > + return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy); > } > > static u8 intel_dp_get_lane_adjust_train(struct intel_dp *intel_dp, > -- > 2.32.0 >