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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Move WaPruneModeWithIncorrectHsyncOffset into intel_mode_valid()
Date: Thu, 30 Sep 2021 13:41:33 +0300	[thread overview]
Message-ID: <20210930104133.30854-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20210930104133.30854-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Check for the zero length front porch already in intel_mode_valid()
so that we get the same validation for both get_modes() and setcrtc()/etc.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9ede0c5fbc44..2b76ec6ad5d2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4208,13 +4208,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
 		}
 	}
 
-	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
-	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
-	 */
-	if ((DISPLAY_VER(dev_priv) > 4 || IS_G4X(dev_priv)) &&
-	    pipe_mode->crtc_hsync_start == pipe_mode->crtc_hdisplay)
-		return -EINVAL;
-
 	intel_crtc_compute_pixel_rate(pipe_config);
 
 	if (pipe_config->has_pch_encoder)
@@ -11323,6 +11316,14 @@ intel_mode_valid(struct drm_device *dev,
 			return MODE_V_ILLEGAL;
 	}
 
+	/*
+	 * Cantiga+ cannot handle modes with a hsync front porch of 0.
+	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
+	 */
+	if ((DISPLAY_VER(dev_priv) > 4 || IS_G4X(dev_priv)) &&
+	    mode->hsync_start == mode->hdisplay)
+		return MODE_H_ILLEGAL;
+
 	return MODE_OK;
 }
 
-- 
2.32.0


  parent reply	other threads:[~2021-09-30 10:41 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 10:41 [Intel-gfx] [PATCH 1/3] drm/i915: Use standard form -EDEADLK check Ville Syrjala
2021-09-30 10:41 ` [Intel-gfx] [PATCH 2/3] drm/i915: Adjust intel_crtc_compute_config() debug message Ville Syrjala
2021-09-30 10:41 ` Ville Syrjala [this message]
2021-09-30 10:53 ` [Intel-gfx] [PATCH 1/3] drm/i915: Use standard form -EDEADLK check Jani Nikula
2021-09-30 13:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] " Patchwork
2021-09-30 16:51 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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