From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6677C433EF for ; Thu, 30 Sep 2021 15:42:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BFEB9613A7 for ; Thu, 30 Sep 2021 15:42:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345827AbhI3PoV (ORCPT ); Thu, 30 Sep 2021 11:44:21 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:31909 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345053AbhI3PoR (ORCPT ); Thu, 30 Sep 2021 11:44:17 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1633016555; x=1664552555; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YvsqvIz8zOr3ivUKTHHuuOf1oT832h6IMldyet80HTk=; b=pMAS2BNPJr0inPLOUTKOFYJmpne41L4TTot8iPcUo4desEkJWjY5/2X8 bERUe4MAdD2VjRheVryRe5Q9wo0BmPapt4gIplqyM8Ep+ED/wVyZ0xqu1 fie5R5b0HuZLY43CvLM0qvYIdO8bxiskNAO6yB863ub6dIm1xHJ/UJNpN gM2ZTITKHqpN+1o56khjUNWX7U+RuNVyXeSbIcUxw8lMqMHxWTCs0nXVj KPYGpWZ8neQbLjdrG24txV2L4lzJpthnuX5om3sQs8KOjI9vvcpWIjpMj d3mox48sTq+5b66mUXhiX00eBUD5M0E2DUtwdYPytJyGbg7++Jh1L/mgd w==; IronPort-SDR: He4AGs6TBfLNhhRWSRnSITdHUBd5ULwn6tBz0OJ5W/LiLM63q0h44AgMX/h7/WXgx3jz7piu/O 5Tp5PTgZ8qSMP2GZJiQCNhW9dx59fUGgT6Ebvu12zZpZDY9ByU3TbicTTPWg4XoeTgIzks9qi3 THrtenN5dcOrP47yxCGt+ztNKX/j67zhuT3tG3RHfA5yik0g1wAC+l9pFbZNMCegu9xhp1boOL kD8wsGLYt4JBposllnnZ+183orqb6lY3DYbBZj3OmbhndyjlmyKdKAaN4HC9Y3hkNZbGt413kz UNXlE1keEfN4byzDzY7ggHpi X-IronPort-AV: E=Sophos;i="5.85,336,1624345200"; d="scan'208";a="146284152" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Sep 2021 08:42:34 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 30 Sep 2021 08:42:34 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 30 Sep 2021 08:42:32 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH v2 1/3] ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail Date: Thu, 30 Sep 2021 18:42:17 +0300 Message-ID: <20210930154219.2214051-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210930154219.2214051-1-claudiu.beznea@microchip.com> References: <20210930154219.2214051-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The 1.35V for DDR3L rail at run-time is selected by the proper configuration on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of configuration registers to provide proper voltages on its rail. Run-time configuration registers could be configured differently than suspend configuration register for MCP16502 (VSEL2 affects only run-time configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK switches to self-refresh. Even on self-refresh it needs to be powered by a 1.35V rail. Thus, make sure the PMIC is configured properly when system is suspended. Fixes: 7540629e2fc7 (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91-sama7g5ek.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 4e6bcb7fdfd4..be905eb1da31 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -206,11 +206,13 @@ vddioddr: VDD_DDR { regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; regulator-mode = <4>; }; regulator-state-mem { regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; regulator-mode = <4>; }; }; -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B156C433EF for ; Thu, 30 Sep 2021 15:45:13 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 513C7613A7 for ; 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IronPort-SDR: He4AGs6TBfLNhhRWSRnSITdHUBd5ULwn6tBz0OJ5W/LiLM63q0h44AgMX/h7/WXgx3jz7piu/O 5Tp5PTgZ8qSMP2GZJiQCNhW9dx59fUGgT6Ebvu12zZpZDY9ByU3TbicTTPWg4XoeTgIzks9qi3 THrtenN5dcOrP47yxCGt+ztNKX/j67zhuT3tG3RHfA5yik0g1wAC+l9pFbZNMCegu9xhp1boOL kD8wsGLYt4JBposllnnZ+183orqb6lY3DYbBZj3OmbhndyjlmyKdKAaN4HC9Y3hkNZbGt413kz UNXlE1keEfN4byzDzY7ggHpi X-IronPort-AV: E=Sophos;i="5.85,336,1624345200"; d="scan'208";a="146284152" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Sep 2021 08:42:34 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 30 Sep 2021 08:42:34 -0700 Received: from rob-dk-mpu01.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 30 Sep 2021 08:42:32 -0700 From: Claudiu Beznea To: , , , , CC: , , , Claudiu Beznea Subject: [PATCH v2 1/3] ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail Date: Thu, 30 Sep 2021 18:42:17 +0300 Message-ID: <20210930154219.2214051-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210930154219.2214051-1-claudiu.beznea@microchip.com> References: <20210930154219.2214051-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_084235_493343_ECDADF8D X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The 1.35V for DDR3L rail at run-time is selected by the proper configuration on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of configuration registers to provide proper voltages on its rail. Run-time configuration registers could be configured differently than suspend configuration register for MCP16502 (VSEL2 affects only run-time configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK switches to self-refresh. Even on self-refresh it needs to be powered by a 1.35V rail. Thus, make sure the PMIC is configured properly when system is suspended. Fixes: 7540629e2fc7 (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/at91-sama7g5ek.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index 4e6bcb7fdfd4..be905eb1da31 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -206,11 +206,13 @@ vddioddr: VDD_DDR { regulator-state-standby { regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; regulator-mode = <4>; }; regulator-state-mem { regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; regulator-mode = <4>; }; }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel