From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5388C433EF for ; Sun, 3 Oct 2021 18:35:37 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 245A8619E0 for ; Sun, 3 Oct 2021 18:35:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 245A8619E0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=openbsd.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5BF488347D; Sun, 3 Oct 2021 20:35:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=openbsd.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6292483425; Sun, 3 Oct 2021 20:33:50 +0200 (CEST) Received: from lb2-smtp-cloud7.xs4all.net (lb2-smtp-cloud7.xs4all.net [194.109.24.28]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A2D1180303 for ; Sun, 3 Oct 2021 20:33:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=openbsd.org Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=kettenis@openbsd.org Received: from cust-df1d398c ([IPv6:fc0c:c1f5:9ac0:c45f:1583:5c5b:91fa:2436]) by smtp-cloud7.xs4all.net with ESMTPA id X6GJmiwcM3tiGX6Iymelum; Sun, 03 Oct 2021 20:33:45 +0200 From: Mark Kettenis To: u-boot@lists.denx.de Cc: Mark Kettenis , Bharat Gooty , Rayagonda Kokatanur , Simon Glass , Andre Przywara , Jagan Teki , Fabio Estevam , Kever Yang , Priyanka Jain , Peter Robinson , Tim Harvey , Konstantin Porotchkin , Heiko Schocher , Lokesh Vutla , Dario Binacchi , Bin Meng , Sean Anderson , Nandor Han , Neil Armstrong , Claudiu Manoil , Jean-Jacques Hiblot , Michael Walle , Patrick Delaunay , Nicolas Saenz Julienne , AKASHI Takahiro , Wasim Khan , Alexandru Gagniuc , Steffen Jaeckel , Heinrich Schuchardt , Asherah Connor , Oliver Graute , Masami Hiramatsu , Tianrui Wei , Padmarao Begari , Kishon Vijay Abraham I , Stephan Gerhold , Kunihiko Hayashi , Pratyush Yadav , Philippe Reynes , Ye Li , Stefan Roese , Michal Simek , Weijie Gao , Vabhav Sharma , Andy Shevchenko Subject: [PATCH v2 4/7] serial: s5p: Add Apple M1 support Date: Sun, 3 Oct 2021 20:30:30 +0200 Message-Id: <20211003183050.67925-5-kettenis@openbsd.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211003183050.67925-1-kettenis@openbsd.org> References: <20211003183050.67925-1-kettenis@openbsd.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CMAE-Envelope: MS4xfOLTCPYOuG/QW6WhhhvwG1f1C7Uh4dFzS4DrD7jDSbfcKm9jicGcdDp8PRgz1R+V+KnorZxqSkG4Zdyram64uM6ZhTfAfcg+H+skpCxyfnxyHL3xUQKe StCkxNdzMH6acf/9b7Qai0sLuarhLseXNRxLQ/eIjfxBC6RWOCD2f227rsSg0V5iLyZ1rDAYEps8NPKvVLcvgG8d7p+pyMu6jbhsonORat9rIhEq0pPINVSL G+8dgaZuWJkNMqrMFK31ryWm4rCYyTLSBdfGSGtMxcnHXBK3td3iVsOuZqv6LnTNdQ4nTaOY87c/PLgT/XN1p+iLTigr85rpFKDlWGaes3d6/7A5AJdPv3bT Lji1AfB7sB3Rmjrd1Jt6oPziRgx0bAlKhMVFmRQa/L13H2ILADj47hOlKSb6j+lALrwAXvV/O4iLfHosv2w+bk9P24/1O5QJFBK7iHaKkc8qkVMO/AzilHwD SbLX1A2R47URHIFXPaEFuXY+de7F4Ts1JlbzZ8T99OMNHsS32kYsGv/sQ3WAYC/LAcSPf3VLEN3UaeF3Vkmf8UFPymhNCbS9gXl8dDw4JkxqV7+XS81LzbNc waYBqAEIySdA7qCxwlJ+dnkYYM9CwXBFBadl8dJBpL1TZDZSiDDFhVjtgRHm0zuF/qVElg5LwwOkN5TgUDskaM8/NNetdfOhCwy1PTevtqduy3QHzRTVXHE+ sAJaDWioeGcoPOCFYs0bdDpg7LiGh1K+GB1RDzpKTV7IzO3EZvuqQfUAnaLwV3MVdMBxDktEXOrlNR2BqrDSYQimn9+5PCvJBFNKLBP7M9FAACtUSWRGweuT QZGjs+K70UotLrnTJj5ak0PzgOvV8QyqjoUCYlPtbRHo6qHloN4JlEF12fKIKA4UOqCy2HW2gpslSrM3ohMc45QonsT7weEGIaYm4RfKfIJshOnxkwXzGTn2 5dIySrwS5NRkL58muEouPvXvmtVMimzAEHvfY4Ln9rZH1YuwNZ2wCwjzD39cJjcLr5cjwtDC6/ew7ABMSk8zhwAPFqQXzyLfuDPKmoKOWLBlO5gTuFnDL3g3 K5h4bvzTWCX/QVc7TbL9TUrrr5vynehJ8jg8j2GQRu32f/sIEQPjQ2ZUQQrLq4XPKyOWCAPYSwvW2b3EqXolP0XzS4D7/weXMRvbsN3PDwLvheZmVJt+XonX UUnxKV70W5awbXU+aqh3RpPa2efnuHAgHSNwlhsYdwYK9AgVxM7+i1hya5IYIR/Aq6nNkHhBzO8UhfRk7y2pzRaN9keudV7Rrs8cVHkdXZL4NoMHuX1b/jVe ln5S7c17usFhwzKtMNdvJ1RtlFCqyJU2B9ImlAkGa4WKqVrMRq+272FNibn9hVkWqShZPf+ZR7sWgRz5EThTCxa7WMACy/QZpJezCvcQ1a2LS/EoFGGzPm1F clUEKUCgUt+QPwtsuWQLGnNjjtF/G4QWfsngpAGdj4RYTeQKR86uxZ1ZTGDImrDy70LLwsE7vGAX19Ti7djvX5MqkFH9Xzz9yekklPmF1X54OJNXlD8BrCjO FlV1XnJ3aB1heq4fO2eXlFh/oKaIOAlGvQ23ENGiZd6ilklBLtZhp7MgM9PdAIGqK+AtHKetwpBti2VkHjF/8t+jus0jlV04UmGcDuYhogri/2CddSHlqZwU TxXeOR7SCmDZDhLtairR6Fd5L2Z5W4Vksnr2LUtpBS81GN22kUy9aw== X-Mailman-Approved-At: Sun, 03 Oct 2021 20:34:39 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Apple M1 SoCs include an S5L UART which is a variant of the S5P UART. Add support for this variant and enable it by default on Apple SoCs. Signed-off-by: Mark Kettenis --- arch/arm/Kconfig | 1 + arch/arm/include/asm/arch-m1/uart.h | 41 +++++++++++ configs/apple_m1_defconfig | 4 ++ drivers/serial/Kconfig | 4 +- drivers/serial/serial_s5p.c | 104 ++++++++++++++++++++++------ 5 files changed, 130 insertions(+), 24 deletions(-) create mode 100644 arch/arm/include/asm/arch-m1/uart.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4948dad4df..876d9c4044 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -899,6 +899,7 @@ config ARCH_APPLE bool "Apple SoCs" select ARM64 select BLK + select CLK select CMD_USB select DM select DM_KEYBOARD diff --git a/arch/arm/include/asm/arch-m1/uart.h b/arch/arm/include/asm/arch-m1/uart.h new file mode 100644 index 0000000000..d2a17a221e --- /dev/null +++ b/arch/arm/include/asm/arch-m1/uart.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang + * Heungjun Kim + */ + +#ifndef __ASM_ARCH_UART_H_ +#define __ASM_ARCH_UART_H_ + +#ifndef __ASSEMBLY__ +/* baudrate rest value */ +union br_rest { + unsigned short slot; /* udivslot */ + unsigned char value; /* ufracval */ +}; + +struct s5p_uart { + unsigned int ulcon; + unsigned int ucon; + unsigned int ufcon; + unsigned int umcon; + unsigned int utrstat; + unsigned int uerstat; + unsigned int ufstat; + unsigned int umstat; + unsigned int utxh; + unsigned int urxh; + unsigned int ubrdiv; + union br_rest rest; + unsigned char res3[0x3fd0]; +}; + +static inline int s5p_uart_divslot(void) +{ + return 0; +} + +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig index a7ae15576b..674b74b90b 100644 --- a/configs/apple_m1_defconfig +++ b/configs/apple_m1_defconfig @@ -12,3 +12,7 @@ CONFIG_USB_STORAGE=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="usb start" # CONFIG_GENERATE_SMBIOS_TABLE is not set +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_BASE=0x235200000 +CONFIG_DEBUG_UART_CLOCK=240000 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 93348c0929..033d160579 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -272,7 +272,7 @@ config DEBUG_EFI_CONSOLE config DEBUG_UART_S5P bool "Samsung S5P" - depends on ARCH_EXYNOS || ARCH_S5PC1XX + depends on ARCH_APPLE || ARCH_EXYNOS || ARCH_S5PC1XX help Select this to enable a debug UART using the serial_s5p driver. You will need to provide parameters to make this work. The driver will @@ -719,7 +719,7 @@ config ROCKCHIP_SERIAL config S5P_SERIAL bool "Support for Samsung S5P UART" - depends on ARCH_EXYNOS || ARCH_S5PC1XX + depends on ARCH_APPLE || ARCH_EXYNOS || ARCH_S5PC1XX default y help Select this to enable Samsung S5P UART support. diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 6d09952a5d..53a7b0bd1b 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -14,24 +14,45 @@ #include #include #include +#if !CONFIG_IS_ENABLED(ARCH_APPLE) #include +#endif #include #include #include DECLARE_GLOBAL_DATA_PTR; -#define RX_FIFO_COUNT_SHIFT 0 -#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT) -#define RX_FIFO_FULL (1 << 8) -#define TX_FIFO_COUNT_SHIFT 16 -#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT) -#define TX_FIFO_FULL (1 << 24) +enum { + PORT_S5P = 0, + PORT_S5L +}; + +#define S5L_RX_FIFO_COUNT_SHIFT 0 +#define S5L_RX_FIFO_COUNT_MASK (0xf << S5L_RX_FIFO_COUNT_SHIFT) +#define S5L_RX_FIFO_FULL (1 << 8) +#define S5L_TX_FIFO_COUNT_SHIFT 4 +#define S5L_TX_FIFO_COUNT_MASK (0xf << S5L_TX_FIFO_COUNT_SHIFT) +#define S5L_TX_FIFO_FULL (1 << 9) + +#define S5P_RX_FIFO_COUNT_SHIFT 0 +#define S5P_RX_FIFO_COUNT_MASK (0xff << S5P_RX_FIFO_COUNT_SHIFT) +#define S5P_RX_FIFO_FULL (1 << 8) +#define S5P_TX_FIFO_COUNT_SHIFT 16 +#define S5P_TX_FIFO_COUNT_MASK (0xff << S5P_TX_FIFO_COUNT_SHIFT) +#define S5P_TX_FIFO_FULL (1 << 24) /* Information about a serial port */ struct s5p_serial_plat { struct s5p_uart *reg; /* address of registers in physical memory */ + u8 reg_width; /* register width */ u8 port_id; /* uart port number */ + u8 rx_fifo_count_shift; + u8 tx_fifo_count_shift; + u32 rx_fifo_count_mask; + u32 tx_fifo_count_mask; + u32 rx_fifo_full; + u32 tx_fifo_full; }; /* @@ -71,8 +92,8 @@ static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) writel(0x245, &uart->ucon); } -static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, - int baudrate) +static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, u8 reg_width, + uint uclk, int baudrate) { u32 val; @@ -82,6 +103,8 @@ static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, if (s5p_uart_divslot()) writew(udivslot[val % 16], &uart->rest.slot); + else if (reg_width == 4) + writel(val % 16, &uart->rest.value); else writeb(val % 16, &uart->rest.value); } @@ -93,7 +116,7 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate) struct s5p_uart *const uart = plat->reg; u32 uclk; -#ifdef CONFIG_CLK_EXYNOS +#if CONFIG_IS_ENABLED(CLK_EXYNOS) || CONFIG_IS_ENABLED(ARCH_APPLE) struct clk clk; u32 ret; @@ -105,7 +128,7 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate) uclk = get_uart_clk(plat->port_id); #endif - s5p_serial_baud(uart, uclk, baudrate); + s5p_serial_baud(uart, plat->reg_width, uclk, baudrate); return 0; } @@ -144,11 +167,14 @@ static int s5p_serial_getc(struct udevice *dev) struct s5p_serial_plat *plat = dev_get_plat(dev); struct s5p_uart *const uart = plat->reg; - if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK)) + if (!(readl(&uart->ufstat) & plat->rx_fifo_count_mask)) return -EAGAIN; serial_err_check(uart, 0); - return (int)(readb(&uart->urxh) & 0xff); + if (plat->reg_width == 4) + return (int)(readl(&uart->urxh) & 0xff); + else + return (int)(readb(&uart->urxh) & 0xff); } static int s5p_serial_putc(struct udevice *dev, const char ch) @@ -156,10 +182,13 @@ static int s5p_serial_putc(struct udevice *dev, const char ch) struct s5p_serial_plat *plat = dev_get_plat(dev); struct s5p_uart *const uart = plat->reg; - if (readl(&uart->ufstat) & TX_FIFO_FULL) + if (readl(&uart->ufstat) & plat->tx_fifo_full) return -EAGAIN; - writeb(ch, &uart->utxh); + if (plat->reg_width == 4) + writel(ch, &uart->utxh); + else + writeb(ch, &uart->utxh); serial_err_check(uart, 1); return 0; @@ -171,15 +200,19 @@ static int s5p_serial_pending(struct udevice *dev, bool input) struct s5p_uart *const uart = plat->reg; uint32_t ufstat = readl(&uart->ufstat); - if (input) - return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT; - else - return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT; + if (input) { + return (ufstat & plat->rx_fifo_count_mask) >> + plat->rx_fifo_count_shift; + } else { + return (ufstat & plat->tx_fifo_count_mask) >> + plat->tx_fifo_count_shift; + } } static int s5p_serial_of_to_plat(struct udevice *dev) { struct s5p_serial_plat *plat = dev_get_plat(dev); + const ulong port_type = dev_get_driver_data(dev); fdt_addr_t addr; addr = dev_read_addr(dev); @@ -187,8 +220,26 @@ static int s5p_serial_of_to_plat(struct udevice *dev) return -EINVAL; plat->reg = (struct s5p_uart *)addr; + plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "id", dev_seq(dev)); + + if (port_type == PORT_S5L) { + plat->rx_fifo_count_shift = S5L_RX_FIFO_COUNT_SHIFT; + plat->rx_fifo_count_mask = S5L_RX_FIFO_COUNT_MASK; + plat->rx_fifo_full = S5L_RX_FIFO_FULL; + plat->tx_fifo_count_shift = S5L_TX_FIFO_COUNT_SHIFT; + plat->tx_fifo_count_mask = S5L_TX_FIFO_COUNT_MASK; + plat->tx_fifo_full = S5L_TX_FIFO_FULL; + } else { + plat->rx_fifo_count_shift = S5P_RX_FIFO_COUNT_SHIFT; + plat->rx_fifo_count_mask = S5P_RX_FIFO_COUNT_MASK; + plat->rx_fifo_full = S5P_RX_FIFO_FULL; + plat->tx_fifo_count_shift = S5P_TX_FIFO_COUNT_SHIFT; + plat->tx_fifo_count_mask = S5P_TX_FIFO_COUNT_MASK; + plat->tx_fifo_full = S5P_TX_FIFO_FULL; + } + return 0; } @@ -200,7 +251,8 @@ static const struct dm_serial_ops s5p_serial_ops = { }; static const struct udevice_id s5p_serial_ids[] = { - { .compatible = "samsung,exynos4210-uart" }, + { .compatible = "samsung,exynos4210-uart", .data = PORT_S5P }, + { .compatible = "apple,s5l-uart", .data = PORT_S5L }, { } }; @@ -224,16 +276,24 @@ static inline void _debug_uart_init(void) struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; s5p_serial_init(uart); - s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); +#if CONFIG_IS_ENABLED(ARCH_APPLE) + s5p_serial_baud(uart, 4, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); +#else + s5p_serial_baud(uart, 1, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); +#endif } static inline void _debug_uart_putc(int ch) { struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; - while (readl(&uart->ufstat) & TX_FIFO_FULL); - +#if CONFIG_IS_ENABLED(ARCH_APPLE) + while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL); + writel(ch, &uart->utxh); +#else + while (readl(&uart->ufstat) & S5P_TX_FIFO_FULL); writeb(ch, &uart->utxh); +#endif } DEBUG_UART_FUNCS -- 2.33.0