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From: Michael Walle <michael@walle.cc>
To: u-boot@lists.denx.de
Cc: Jagan Teki <jagan@amarulasolutions.com>,
	Priyanka Jain <priyanka.jain@nxp.com>,
	Vladimir Oltean <vladimir.oltean@nxp.com>,
	Tom Rini <trini@konsulko.com>,
	Peter Griffin <peter.griffin@linaro.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	Michael Walle <michael@walle.cc>
Subject: [PATCH v4 06/29] arm: dts: ls1028a: move I2C controller nodes into /soc
Date: Tue,  5 Oct 2021 10:37:49 +0200	[thread overview]
Message-ID: <20211005083812.1311465-7-michael@walle.cc> (raw)
In-Reply-To: <20211005083812.1311465-1-michael@walle.cc>

While inserting them into the new location, keep them sorted by the
register base offset just like in the linux kernel device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 .../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-7777-sch-30841.dtsi   |   8 +-
 .../dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi  |   4 +-
 .../dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi   |   2 +-
 .../fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi  |   8 +-
 .../dts/fsl-ls1028a-qds-9999-sch-24801.dtsi   |   8 +-
 .../fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi  |   8 +-
 .../fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi  |   8 +-
 .../dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi   |   2 +-
 .../dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi   |   2 +-
 arch/arm/dts/fsl-ls1028a.dtsi                 | 176 +++++++++---------
 12 files changed, 115 insertions(+), 115 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
index 4063d9a114..1f13cf80e6 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
@@ -16,5 +16,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
index 548ab2ba65..10375b2751 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
index 3991fb793f..f18cb39f21 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
@@ -31,25 +31,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
index d68c8c2be0..f6561a89eb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
@@ -20,13 +20,13 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
index 94b5081d61..d9ccd8353b 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
@@ -15,5 +15,5 @@
 &enetc0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
index 3b850268e6..0630f12069 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
@@ -45,25 +45,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
index eb632143e0..170aacf8c0 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "sgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
index ed86da6b26..1a9288a037 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
@@ -30,25 +30,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "usxgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
index c9de4ecc43..544f548b1a 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
@@ -24,25 +24,25 @@
 &mscc_felix_port0 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
 };
 
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
 };
 
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
 };
 
 &mscc_felix_port3 {
 	status = "okay";
 	phy-mode = "qsgmii";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
index 7f785507bf..639796263c 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port1 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
index 0fbe7721c8..62c5513c2c 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
@@ -20,7 +20,7 @@
 &mscc_felix_port2 {
 	status = "okay";
 	phy-mode = "2500base-x";
-	phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
+	phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
 };
 
 &mscc_felix_port4 {
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 54f97014be..de85fdd045 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -203,94 +203,6 @@
 		};
 	};
 
-	i2c0: i2c@2000000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2000000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c1: i2c@2010000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2010000 0x0 0x10000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c2: i2c@2020000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2020000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c3: i2c@2030000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2030000 0x0 0x10000>;
-		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c4: i2c@2040000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2040000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c5: i2c@2050000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2050000 0x0 0x10000>;
-		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c6: i2c@2060000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2060000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
-	i2c7: i2c@2070000 {
-		compatible = "fsl,vf610-i2c";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		reg = <0x0 0x2070000 0x0 0x10000>;
-		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clock-names = "i2c";
-		clocks = <&clockgen 4 0>;
-		status = "disabled";
-	};
-
 	lpuart0: serial@2260000 {
 		compatible = "fsl,ls1021a-lpuart";
 		reg = <0x0 0x2260000 0x0 0x1000>;
@@ -484,5 +396,93 @@
 			#clock-cells = <2>;
 			clocks = <&sysclk>;
 		};
+
+		i2c0: i2c@2000000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2000000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@2010000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2010000 0x0 0x10000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@2020000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2020000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@2030000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2030000 0x0 0x10000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@2040000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2040000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@2050000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2050000 0x0 0x10000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c6: i2c@2060000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2060000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
+
+		i2c7: i2c@2070000 {
+			compatible = "fsl,vf610-i2c";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x2070000 0x0 0x10000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "i2c";
+			clocks = <&clockgen 4 0>;
+			status = "disabled";
+		};
 	};
 };
-- 
2.30.2


  parent reply	other threads:[~2021-10-05  8:40 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-05  8:37 [PATCH v4 00/29] arm: dts: ls1028a: sync device tree with linux Michael Walle
2021-10-05  8:37 ` [PATCH v4 01/29] armv8: ls1028a: use the official compatible string for the GPU Michael Walle
2021-10-05  8:37 ` [PATCH v4 02/29] arm: dts: ls1028a: remove /memory node Michael Walle
2021-10-05  8:37 ` [PATCH v4 03/29] arm: dts: ls1028a-{rdb, qds}: remove dm-pre-reloc property Michael Walle
2021-10-05  8:37 ` [PATCH v4 04/29] arm: dts: ls1028a: add an empty /soc Michael Walle
2021-10-05  8:37 ` [PATCH v4 05/29] arm: dts: ls1028a: move the clockgen node into /soc Michael Walle
2021-10-05  8:37 ` Michael Walle [this message]
2021-10-05  8:37 ` [PATCH v4 07/29] arm: dts: ls1028a: move the FlexSPI controller node Michael Walle
2021-10-05  8:37 ` [PATCH v4 08/29] arm: dts: ls1028a: move the SPI and eSDHC controller nodes into /soc Michael Walle
2021-10-05  8:37 ` [PATCH v4 09/29] arm: dts: ls1028a: move the UART " Michael Walle
2021-10-05  8:37 ` [PATCH v4 10/29] arm: dts: ls1028a: move the low-power UART " Michael Walle
2021-10-05  8:37 ` [PATCH v4 11/29] arm: dts: ls1028a: move the GPIO controller " Michael Walle
2021-10-05  8:37 ` [PATCH v4 12/29] arm: dts: ls1028a: move SATA and USB " Michael Walle
2021-10-05  8:37 ` [PATCH v4 13/29] arm: dts: ls1028a: move the PCIe " Michael Walle
2021-10-05  8:37 ` [PATCH v4 14/29] arm: dts: ls1028a: move the watchdog node " Michael Walle
2021-10-05  8:37 ` [PATCH v4 15/29] arm: dts: ls1028a: move the iRC node and its devices " Michael Walle
2021-10-05  8:37 ` [PATCH v4 16/29] arm: dts: ls1028a: update the labels Michael Walle
2021-10-05  8:38 ` [PATCH v4 17/29] watchdog: sp805_wdt: use correct compatible string Michael Walle
2021-10-05  8:38 ` [PATCH v4 18/29] spi: fsl_dspi: add new compatible fsl, ls1021a-v1.0-dspi Michael Walle
2021-10-05  8:38 ` [PATCH v4 19/29] spi: fsl_dspi: rename num-cs to spi-num-chipselects Michael Walle
2021-10-05  8:38 ` [PATCH v4 20/29] serial: lpuart: add new compatible fsl, ls1028a-lpuart Michael Walle
2021-10-05  8:38 ` [PATCH v4 21/29] scsi: ceva: rename the resource name to match the linux kernel one Michael Walle
2021-10-05  8:38 ` [PATCH v4 22/29] usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3 Michael Walle
2021-10-05  8:38 ` [PATCH v4 23/29] pci: layerscape: add official ls1028a binding support Michael Walle
2021-10-13  1:46   ` Z.Q. Hou
2021-10-13  7:49     ` Michael Walle
2021-10-31 13:23       ` Z.Q. Hou
2021-10-05  8:38 ` [PATCH v4 24/29] arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes Michael Walle
2021-10-05  8:38 ` [PATCH v4 25/29] arm: dts: ls1028a: move the PCI I/O window to match Michael Walle
2021-10-05  8:38 ` [PATCH v4 26/29] arm: dts: ls1028a: disable the PCIe controller by default Michael Walle
2021-10-05  8:38 ` [PATCH v4 27/29] arm: dts: ls1028a: drop non-removable property from esdhc controller node Michael Walle
2021-10-05  8:38 ` [PATCH v4 28/29] arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux Michael Walle
2021-10-05  8:38 ` [PATCH v4 29/29] arm: dts: sl28: sync dtbs Michael Walle

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